On SDM660, for sdcc there are two msm-bus paths:
1. AGGNOC->SNOC->BIMC
2. CPU->CNOC->SDC_CFG
For SDCC DATA-FIFO or DPRAM, write clock is HCLK
and read clock is MCLK for TX transactions and
vice-versa for RX transactions.
As both HCLK and MCLK are being used for data
transfers ,we need to provide bus bandwidth vote
from CPU(id:1) to SDC_CFG(id:606) which will be
used for register access and data transfers.
By default on sdm660, we observed cnoc_clk at only
19.2MHz which is very less and hence affecting eMMC
performance (drop upto 50%) for read/writes.
This change is updating bus voting from CPU to CNOC
and helps improving eMMC performance.
Change-Id: I9e3dadf307444be464a42f4a518b44e3f6e98a75
Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org>
A clk_get_rate in the clk_enable path would result in a BUG from sleeping
context, as clk_get_rate would hold a mutex when we have already acquired a
spinlock in the clk_enable.
Change-Id: I7b32292710bbea3565cdc51c79916fddc60f8bba
Signed-off-by: Taniya Das <tdas@codeaurora.org>
In the new SDM660 QRD devices, PM660 does not need the hardware
workround that cut-off voltage should be set to 3.7V, so delete
the qcom,fg-cutoff-voltage property.
CRs-Fixed: 2013279
Change-Id: Ica55128a2f426a668b0d43d04424e13672dd78fd
Signed-off-by: Yingwei Zhao <cyizhao@codeaurora.org>
This reverts commit 9f45a559c7 ("ARM: dts: msm:
add sb_4_tx_vi to support VI recording at msm8998")
It is unnecessary to support concurrency of VI sense
recording and speaker protection.
CRs-Fixed: 1113625
Change-Id: I13ee9fd2daed2ad55347c112eeb79a9bfe6495ba
Signed-off-by: Xiaojun Sang <xsang@codeaurora.org>
Add camera node including rear aux and front camera node, also
add corresponding eeprom actuator ois flash and torch node.
Change-Id: I84e3bfa11127ca7808491df728665f74c9222343
Signed-off-by: Pengfei Liu <pengfeiliu@codeaurora.org>
leds-qpnp-flash driver is not supported anymore. Remove it.
Change-Id: Ie2f570bad8171c460b8167f140d71c052ada2b17
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
When stack memory is provided to IPA HW as part of
descriptor it can lead to cache alignment issues.
Make changes to use heap memory whereever applicable.
Change-Id: I666f98cf2ec45a4743db0ab7bc6d2df821cce84a
Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com>
Signed-off-by: Sridhar Ancha <sancha@codeaurora.org>
Signed-off-by: Utkarsh Saxena <usaxena@codeaurora.org>
If userspace provides a circular list to isp kenrel
driver through an ioctl, then dirver loops forever.
This way the task might hog the CPU in while loop.
To fix this issue, added a preset count to break
the loop after 100 iterations.
CRs-Fixed: 1064608
Change-Id: Ie896fd3da326e5e972266d8004baecf8681aea6d
Signed-off-by: VijayaKumar T M <vtmuni@codeaurora.org>
Signed-off-by: Lokesh Kumar Aakulu <lkumar@codeaurora.org>
