Commit graph

10799 commits

Author SHA1 Message Date
Alex Deucher
d798f2f2c3 drm/radeon/dce8: properly handle interlaced timing
The register bits changed on DCE8 compared to previous
families.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:39 -04:00
Alex Deucher
9e05fa1d24 drm/radeon/cik: add hw cursor support (v2)
CIK (DCE8) hw cursors are programmed the same as evergreen
(DCE4) with the following caveats:
- cursors are now 128x128 pixels
- new alpha blend enable bit

v2: rebase

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:38 -04:00
Alex Deucher
cd84a27d18 drm/radeon/dce8: add support for display watermark setup
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:37 -04:00
Alex Deucher
bc19f59704 drm/radeon: update power state parsing for CI
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:36 -04:00
Alex Deucher
5115020714 drm/radeon: handle the integrated thermal controller on CI
No support for reading the temperature yet.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:36 -04:00
Alex Deucher
9ae94be523 drm/radeon: atombios power table updates (v2)
v2: further updates

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:35 -04:00
Alex Deucher
1da8f5fbb1 drm/radeon: upstream atombios.h updates (v2)
v2: further updates

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:34 -04:00
Alex Deucher
b7aa4cda22 drm/radeon: upstream ObjectID.h updates (v2)
v2: further updates

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-26 16:11:34 -04:00
Alex Deucher
7bf94a2c18 drm/radeon/cik: fill in startup/shutdown callbacks (v5)
v2: update to latest driver changes
v3: properly tear down vm on suspend
v4: fix up irq init ordering
v5: remove outdated comment

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2013-06-26 16:11:33 -04:00
Alex Deucher
d0e092d969 drm/radeon/cik: add support for doing async VM pt updates (v5)
Async page table updates using the sDMA engine.  sDMA has a
special packet for updating entries for contiguous pages
that reduces overhead.

v2: add support for and use the CP for now.
v3: update for 2 level PTs
v4: rebase, fix DMA packet
v5: switch to using an IB

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:34 -04:00
Alex Deucher
605de6b97e drm/radeon: implement async vm_flush for the sDMA (v6)
Update the page table base address and flush the
VM TLB using the sDMA.

V2: update for 2 level PTs
V3: update vm flush
V4: update SH_MEM* regs
V5: switch back to old style VM TLB invalidate
V6: fix packet formatting

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:33 -04:00
Alex Deucher
21a93e130d drm/radeon/cik: add support for sDMA dma engines (v8)
CIK has new asynchronous DMA engines called sDMA
(system DMA).  Each engine supports 1 ring buffer
for kernel and gfx and 2 userspace queues for compute.

TODO: fill in the compute setup.

v2: update to the latest reset code
v3: remove ib_parse
v4: fix copy_dma()
v5: drop WIP compute sDMA queues
v6: rebase
v7: endian fixes for IB
v8: cleanup for release

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:33 -04:00
Alex Deucher
9d97c99b18 drm/radeon/cik: log and handle VM page fault interrupts
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:32 -04:00
Alex Deucher
a59781bbe5 drm/radeon: add support for interrupts on CIK (v5)
Todo:
- handle interrupts for compute queues

v2: add documentation
v3: update to latest reset code
v4: update to latest illegal CP handling
v5: fix missing break in interrupt handler switch statement

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:31 -04:00
Alex Deucher
f6796caee6 drm/radeon: Add support for RLC init on CIK (v4)
RLC handles the interrupt controller and other tasks
on the GPU.

v2: add documentation
v3: update programming sequence
v4: additional setup

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:31 -04:00
Alex Deucher
f96ab48457 drm/radeon: implement async vm_flush for the CP (v7)
Update the page table base address and flush the
VM TLB using the CP.

v2: update for 2 level PTs
v3: use new packet for invalidate
v4: update SH_MEM* regs when flushing the VM
v5: add pfp sync, go back to old style vm TLB invalidate
v6: fix hdp flush packet count
v7: use old style HDP flush

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:30 -04:00
Alex Deucher
fbc832c7f5 drm/radeon: add ring and IB tests for CIK (v3)
v2: add documenation
v3: update the latest ib changes

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:29 -04:00
Alex Deucher
2cae3bc3f3 drm/radeon: add IB and fence dispatch functions for CIK gfx (v7)
For gfx ring only.  Compute is still todo.

v2: add documentation
v3: update to latest reset changes, integrate emit update patch.
v4: fix count on wait_reg_mem for HDP flush
v5: use old hdp flush method for fence
v6: set valid bit for IB
v7: cleanup for release

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:29 -04:00
Alex Deucher
841cf442fd drm/radeon: Add CP init for CIK (v7)
Sets up the GFX ring and loads ucode for GFX and Compute.

Todo:
- handle compute queue setup.

v2: add documentation
v3: integrate with latest reset changes
v4: additional init fixes
v5: scratch reg write back no longer supported on CIK
v6: properly set CP_RB0_BASE_HI
v7: rebase

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:28 -04:00
Alex Deucher
bc8273fe97 drm/radeon: add support mc ucode loading on CIK (v2)
Load the GDDR5 ucode and train the links.

v2: update ucode

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:27 -04:00
Alex Deucher
02c8132741 drm/radeon: add initial ucode loading for CIK (v5)
Currently the driver required 6 sets of ucode:
1. pfp - pre-fetch parser, part of the GFX CP
2. me - micro engine, part of the GFX CP
3. ce - constant engine, part of the GFX CP
4. rlc - interrupt, etc. controller
5. mc - memory controller (discrete cards only)
6. mec - compute engines, part of Compute CP

V2: add documentation
V3: update MC ucode
V4: rebase
V5: update mc ucode

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:27 -04:00
Alex Deucher
a00024b03d drm/radeon/cik: stop page faults from hanging the system (v2)
Redirect invalid memory accesses to the default page
instead of locking up the memory controller.

v2: rebase on top of 2 level PTs

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:26 -04:00
Alex Deucher
1c49165d0a drm/radeon: add support for MC/VM setup on CIK (v6)
The vm callbacks are the same as the SI ones right now
(same regs and bits). We could share the SI variants, and
I may yet do that, but I figured I would add CIK specific
ones for now in case we need to change anything.

V2: add documentation, minor fixes.
V3: integrate vram offset fixes for APUs
V4: enable 2 level VM PTs
V5: index SH_MEM_* regs properly
V6: add ib_parse()

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:25 -04:00
Alex Deucher
6f2043ce15 drm/radeon: Add support for CIK GPU reset (v2)
v2: split soft reset into compute and gfx.  Still need
to make reset more fine grained, but this should be a
start.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:25 -04:00
Alex Deucher
8cc1a5328b drm/radeon: add gpu init support for CIK (v9)
v2: tiling fixes
v3: more tiling fixes
v4: more tiling fixes
v5: additional register init
v6: rebase
v7: fix gb_addr_config for KV/KB
v8: drop wip KV bits for now, add missing config reg
v9: fix cu count on Bonaire

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:24 -04:00
Alex Deucher
efad86db4e drm/radeon: adapt to PCI BAR changes on CIK
register BAR is now at PCI BAR 5.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:23 -04:00
Alex Deucher
e282917ca3 drm/radeon: add DCE8 macro for CIK
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:23 -04:00
Alex Deucher
6eac752ec6 drm/radeon: add CIK chip families
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:22 -04:00
Alex Deucher
8f61b34ceb drm/radeon: add a reset work handler
New asics support non-privileged IBs.  This allows us
to skip IB checking in the driver since the hardware
will check the command buffers for us.  When using
non-privileged IBs, if the CP encounters an illegal
register in the command stream, it will halt and generate
an interrupt.  The CP needs to be reset to continue.  For now
just do a full GPU reset when this happens.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-25 17:50:21 -04:00
Daniel Vetter
5cef29aa52 drm: fix fb leak in setcrtc
Drivers are allowed (actually have to) disable unrelated crtcs in
their ->set_config callback (when we steal all the connectors from
that crtc). If they do that they'll clear crtc->fb to NULL.

Which results in a refcount leak, since the drm core is keeping track
of that reference.

To fix this track the old fb of all crtcs and adjust references for
all of them. Of course, since we only hold an additional reference for
the fb for the current crtc we need to increase refcounts before we
drop the old one.

This approach has the benefit that it inches us a bit closer to an
atomic modeset world, where we want to update the config of all crtcs
in one step.

This regression has been introduce in the framebuffer refcount
conversion, specifically in

commit b0d1232589
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Tue Dec 11 01:07:12 2012 +0100

    drm: refcounting for crtc framebuffers

Reported-by: Russell King <linux@arm.linux.org.uk>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: stable@vger.kernel.org
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-06-25 13:04:11 +10:00
Daniel Vetter
cc85e1217f drm: check that ->set_config properly updates the fb
Historically drm lacked fb refcounting, so the updating of crtc->fb
was done by the lower levels at a point convenient to get their own
refcounting (e.g. refcounts for the underlying gem bo, pinning
refcounts) right. With the introduction of refcounted fbs the drm core
handled the fb refcounts, but still relied on drivers to update the
crtc->fb pointer (this approach required the least invasive changes in
drivers).

Enforce this contract with a WARN_ON.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-06-25 13:04:10 +10:00
Daniel Vetter
372835a852 drm/crtc-helper: explicit DPMS on after modeset
Atm the crtc helper implementation of set_config has really
inconsisten semantics: If just an fb update is good enough, dpms state
will be left as-is, but if we do a full modeset we force everything to
dpms on.

This change has already been applied to the i915 modeset code in

commit e3de42b684
Author: Imre Deak <imre.deak@intel.com>
Date:   Fri May 3 19:44:07 2013 +0200

    drm/i915: force full modeset if the connector is in DPMS OFF mode

which according to Greg KH seems to aim for a new record in most
Bugzilla: links in a commit message.

The history of this dpms forcing is pretty interesting. This patch
here is an almost-revert of

commit 811aaa55ba
Author: Keith Packard <keithp@keithp.com>
Date:   Thu Feb 3 16:57:28 2011 -0800

    drm: Only set DPMS ON when actually configuring a mode

which fixed the bug of trying to dpms on disabled outputs, but
introduced the new discrepancy between an fb update only and full
modesets. The actual introduction of this goes back to

commit bf9dc102e2
Author: Keith Packard <keithp@keithp.com>
Date:   Fri Nov 26 10:45:58 2010 -0800

    drm: Set connector DPMS status to ON in drm_crtc_helper_set_config

And if you'd dig around in the i915 driver code there's even more fun
around forcing dpms on and losing our heads and temper of the
resulting inconsistencies. Especially the DP re-training code had tons
of funny stuff in it.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-06-25 11:01:30 +10:00
Daniel Vetter
cbdfebc972 drm/crtc-helper: no need to check for fb->depth/bpp
... since we already check for fb->pixel_format, which encodes all
this. The other two fields are only for backwards compat of older
drivers (and we might want to look into eventually just killing them).

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-06-25 11:01:09 +10:00
Daniel Vetter
e58de88078 drm/crtc-helpers: Enforce sane set_config api
There's no point in trying to clean up after driver-bugs, so just blow
up. Furthermore it's an interface abuse to set no mode but have an fb
and aslo to try to set an fb without enough connectors. These two
spefici cases of interface abuse have been committed by the fb helper,
but that's been fixed meanwhile in

commit 7e53f3a423
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date:   Mon Jan 21 10:52:17 2013 +0100

    drm/fb-helper: fixup set_config semantics

The i915 driver has been shipping since a while with these BUGs with
no reports, so should be save.

Note that this drops an ugly case where we clear crtc->fb behind the
upper levels back and so cause a refcounting mayhem, which Russell
Kins spotted while trying to hunt down a drm framebuffer leak.

Reported-by: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-06-25 11:00:53 +10:00
Al Viro
fdcdec06a3 drm_vm: drop explicit VM_IO setting
io_remap_pfn_range already sets this internally.

Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2013-06-24 06:26:50 +10:00
Arto Merilainen
ebae30b1fb gpu: host1x: Rework CPU syncpoint increment
This patch merges host1x_syncpt_cpu_incr to host1x_syncpt_incr() as
they are in practise doing the same thing. host1x_syncpt_incr() is
also modified to return error codes. User space interface is modified
accordingly to pass return values.

Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2013-06-22 12:43:55 +02:00
Arto Merilainen
ece66891ff gpu: host1x: Fix client_managed type
client_managed field in syncpoint structure was defined as an
integer. The field holds, however, only a boolean value. This patch
modifies the type to boolean.

Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2013-06-22 12:43:54 +02:00
Arto Merilainen
edeabfcbc1 gpu: host1x: Fix memory access in syncpt request
This patch fixes a bad memory access in syncpoint request code. If
no syncpoints were available, the code accessed unreserved memory
area causing unexpected behaviour.

Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2013-06-22 12:43:54 +02:00
Arto Merilainen
3364cd2890 gpu: host1x: Copy gathers before verification
The firewall verified gather buffers before copying them. This
allowed a malicious application to rewrite the buffer content by
timing the rewrite carefully.

This patch makes the buffer validation occur after copying the
buffers.

Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2013-06-22 12:43:53 +02:00
Terje Bergstrom
afac0e43c6 gpu: host1x: Don't reset firewall between gathers
The firewall was reinitialised for each gather. Because the filter
was reinitialised, it did not track the class over gather boundaries.
This allowed the user application to set host1x class to one class
in one gather and use that class in another gather without firewall
having knowledge about that.

Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2013-06-22 12:43:53 +02:00
Arto Merilainen
5060d8ec7c gpu: host1x: Check reloc table before usage
The firewall assumed that the user space always delivers a relocation
table when it is accessing address registers. If userspace did not
deliver a relocation table and tried to access the address registers,
the code performed bad memory accesses.

This patch modifies the firewall to check correctly that the firewall
table is available before accessing it. In addition, check_reloc() is
converted to use boolean return value (true when the reloc is valid,
false when invalid).

Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2013-06-22 12:43:52 +02:00
Terje Bergstrom
64c173d3a2 gpu: host1x: Check INCR opcode correctly
The firewall code used a wrong loop condition (pointer to a
structure) while checking INCR opcode. This patch fixes the code to
use correct loop condition (number of words remaining).

Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2013-06-22 12:43:52 +02:00
Laurent Pinchart
604faa7dcf drm/tegra: Remove DRIVER_BUS_PLATFORM from driver_features
DRIVER_BUS_PLATFORM is not a DRM driver feature flag, it must not be set
in the driver's driver_features field.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2013-06-22 12:43:51 +02:00
Thierry Reding
dc618db75d drm/tegra: Fix return value
Return NULL instead of 0 in host1x_bo_lookup().

Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2013-06-22 12:43:51 +02:00
Dave Airlie
9aa36876dd Merge branch 'drm-fixes-3.10' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
One user visible fix to stop misreport GPU hangs and subsequent resets.
* 'drm-fixes-3.10' of git://people.freedesktop.org/~agd5f/linux:
  drm/radeon: update lockup tracking when scheduling in empty ring
2013-06-21 08:52:19 +10:00
Jerome Glisse
8444d5c695 drm/radeon: update lockup tracking when scheduling in empty ring
There might be issue with lockup detection when scheduling on an
empty ring that have been sitting idle for a while. Thus update
the lockup tracking data when scheduling new work in an empty ring.

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Tested-by: Andy Lutomirski <luto@amacapital.net>
Cc: stable@vger.kernel.org
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-06-20 14:45:08 -04:00
Laurent Pinchart
227c1fb28c drm/shmobile: Enable compilation on all ARM platforms
This is required to support multi-arch kernels.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-06-20 10:07:14 +02:00
Laurent Pinchart
416c39000b drm/shmobile: Add DRM PRIME support
Just use the GEM CMA DRM PRIME helpers.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-06-20 10:07:14 +02:00
Laurent Pinchart
16ad3b2ce8 drm/shmobile: Use devm_* managed functions
This simplifies cleanup paths and fixes a probe time crash in the error
path when trying to cleanup mode setting before it was initialized.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-06-20 10:07:14 +02:00
Laurent Pinchart
2e7c9b351d drm/shmobile: Minor typo fix in debug message
Warning that an invalid value is valid doesn't make much sense, fix the
message.

Reported-by: Rob Clark <rob.clark@linaro.org>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
2013-06-20 10:07:14 +02:00