some missed dt nodes or props for sirf dts for 3.14.
Among them:
- add lost clocks for cphifbg
- add lost bus_width, clock and status for sdhci
- add clock, frequence-voltage table for CPU0
- add lost minigpsrtc device node
- add lost usp1_uart_nostreamctrl pin group for atlas6
- add pin group for USP0 with only RX or TX frame sync
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Merge tag 'sirf-dts-for-3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux into next/dt
ARM: sirf: dts update for 3.14
From Barry Song:
some missed dt nodes or props for sirf dts for 3.14.
Among them:
- add lost clocks for cphifbg
- add lost bus_width, clock and status for sdhci
- add clock, frequence-voltage table for CPU0
- add lost minigpsrtc device node
- add lost usp1_uart_nostreamctrl pin group for atlas6
- add pin group for USP0 with only RX or TX frame sync
* tag 'sirf-dts-for-3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux:
ARM: dts: SiRF: add pin group for USP0 with only RX or TX frame sync
ARM: dts: SiRF: add lost usp1_uart_nostreamctrl pin group for atlas6
ARM: dts: sirf: add lost minigpsrtc device node
ARM: dts: sirf: add clock, frequence-voltage table for CPU0
ARM: dts: sirf: add lost bus_width, clock and status for sdhci
ARM: dts: sirf: add lost clocks for cphifbg
Signed-off-by: Kevin Hilman <khilman@linaro.org>
- a tiny fix for the recent AT91 CCF implementation
- the switch of one platform to DT with board file removal
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Merge tag 'at91-cleanup2' of git://github.com/at91linux/linux-at91 into next/cleanup
From Nicolas Ferre:
Second cleanup pull-request for 3.14:
- a tiny fix for the recent AT91 CCF implementation
- the switch of one platform to DT with board file removal
* tag 'at91-cleanup2' of git://github.com/at91linux/linux-at91:
ARM: at91: switch Calao QIL-A9260 board to DT
clk: at91: fix pmc_clk_ids data type attriubte
Signed-off-by: Kevin Hilman <khilman@linaro.org>
- Move GPIO2 and GPIO3 to be registered from the core boardfile.
- Update the defconfig.
Defconfig changes:
- Enable GPIOLIB and PL061 for the Versatile.
- Build the Versatile using EABI.
- Enable the new LEDs in the defconfig.
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Merge tag 'versatile-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/soc
From Linus Walleij:
Versatile patches for v3.14:
- Move GPIO2 and GPIO3 to be registered from the core boardfile.
- Update the defconfig.
Defconfig changes:
- Enable GPIOLIB and PL061 for the Versatile.
- Build the Versatile using EABI.
- Enable the new LEDs in the defconfig.
* tag 'versatile-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: versatile: enable LEDs by default
ARM: versatile: build using EABI
ARM: versatile: enable GPIOLIB and PL061 by default
ARM: versatile: update defconfig
ARM: versatile: move GPIO2 and GPIO3 to core
Fixes to select missing configuration options, and update of the maintainer
file.
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Merge tag 'sunxi-core-for-3.14-2' of https://github.com/mripard/linux into next/soc
From Maxime Ripard:
Second round of core additions for the Allwinner SoCs
Fixes to select missing configuration options, and update of the maintainer
file.
* tag 'sunxi-core-for-3.14-2' of https://github.com/mripard/linux:
ARM: sunxi: select ARM_PSCI
MAINTAINERS: Update Allwinner sunXi maintainer files
ARM: sunxi: Select RESET_CONTROLLER
ARM: sun6i: Add SMP support for the Allwinner A31
dt-bindings: fix example of allwinner interrupt controller
ARM: sunxi: Register the A31 reset IP in init_time
ARM: sunxi: Select ARCH_HAS_RESET_CONTROLLER
reset: Add Allwinner SoCs Reset Controller Driver
Signed-off-by: Kevin Hilman <khilman@linaro.org>
- mvebu
- fix boot hang on Armada XP due to broken i2c offloading in A0 SoC revision
(specifically experienced on some early OpenBlocks AX3-4 boards)
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Merge tag 'mvebu-fixes-3.13' of git://git.infradead.org/linux-mvebu into next/fixes-non-critical
From Jason Cooper:
mvebu late fixes for v3.13
- mvebu
- fix boot hang on Armada XP due to broken i2c offloading in A0 SoC revision
(specifically experienced on some early OpenBlocks AX3-4 boards)
* tag 'mvebu-fixes-3.13' of git://git.infradead.org/linux-mvebu:
i2c: mv64xxx: Document the newly introduced Armada XP A0 compatible
i2c: mv64xxx: Fix bus hang on A0 version of the Armada XP SoCs
ARM: mvebu: Add quirk for i2c for the OpenBlocks AX3-4 board
ARM: mvebu: Add support to get the ID and the revision of a SoC
Signed-off-by: Kevin Hilman <khilman@linaro.org>
* r8a7790 (R-Car H2) SoC
- Correct I2C controller names
This fixes the issue introduced by
b448c904f5 "ARM: shmobile: r8a7790: add I2C support"
which is queued-up for v3.14.
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Merge tag 'renesas-soc-fixes-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Renesas ARM Based SoC Fixes for v3.14
* r8a7790 (R-Car H2) SoC
- Correct I2C controller names
This fixes the issue introduced by
b448c904f5 "ARM: shmobile: r8a7790: add I2C support"
which is queued-up for v3.14.
* tag 'renesas-soc-fixes-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7790: Fix I2C controller names
There was a copy/paste error when reading the nwe_pulse value.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@traphandler.com>
Acked-by: Boris BREZILLON <b.brezillon@overkiz.com>
Cc: stable <stable@vger.kernel.org> # 3.3
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Previously the custom GPIO header for the S3C24xx would in turn
bring in the custom pin control implementation from
<plat/gpio-cfg.h>. This is not good as it mixes up two
subsystems and makes the dependencies hard to track. Make
the dependency explicit by explicitly including the pin
control header where needed.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Mark Brown <broonie@kernel.org>
Cc: linux-samsung-soc@vger.kernel.org
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
When refactoring and breaking out the includes for the
machine-specific GPIO configuration, two files were created
in <linux/platform_data/gpio-samsung-s3c[24|64]xx.h>, but as
that namespace shall be used for defining data exchanged
between machines and drivers, using it for these broad macros
and config settings is wrong.
Move the headers back into the machine-local
<mach/gpio-samsung.h> file and think about the next step.
Reported-by: Arnd Bergmann <arnd@arndb.de>
Cc: Tomasz Figa <tomasz.figa@gmail.com>
Cc: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: linux-samsung-soc@vger.kernel.org
Acked-by: Mark Brown <broonie@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Pull clocksource/clockevent updates from Daniel Lezcano:
* Axel Lin removed an unused structure defining the ids for the
bcm kona driver.
* Ezequiel Garcia enabled the timer divider only when the 25MHz
timer is not used for the armada 370 XP.
* Jingoo Han removed a pointless platform data initialization for
the sh_mtu and sh_mtu2.
* Laurent Pinchart added the clk_prepare/clk_unprepare for sh_cmt.
* Linus Walleij added a useful warning in clk_of when no clocks
are found while the old behavior was to silently hang at boot time.
* Maxime Ripard added the high speed timer drivers for the
Allwinner SoCs (A10, A13, A20). He increased the rating, shared the
irq across all available cpus and fixed the clockevent's irq
initialization for the sun4i.
* Michael Opdenacker removed the usage of the IRQF_DISABLED for the
all the timers driver located in drivers/clocksource.
* Stephen Boyd switched to sched_clock_register for the
arm_global_timer, cadence_ttc, sun4i and orion timers.
Conflicts:
drivers/clocksource/clksrc-of.c
Signed-off-by: Ingo Molnar <mingo@kernel.org>
The first variants of Armada XP SoCs (A0 stepping) have issues related
to the i2c controller which prevent to use the offload mechanism and
lead to a kernel hang during boot.
This commit add quirk in the mvebu platform code to check the SoC
version and then update the compatible string for the i2c controller
according to the revision of the SoC. Currently only some OpenBlocks
AX3-4 boards are known to use an A0 revision so the check is done only
for these boards.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: stable@vger.kernel.org # v3.12+: af8d1c63af: ARM: mvebu: Add support to get the ID and the revision of a SoC
Cc: stable@vger.kernel.org # v3.12+
Fixes: 930ab3d403 (i2c: mv64xxx: Add I2C Transaction Generator support)
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
All the mvebu SoCs have information related to their variant and
revision that can be read from the PCI control register.
This patch adds support for Armada XP and Armada 370. This reading of
the revision and the ID are done before the PCI initialization to
avoid any conflicts. Once these data are retrieved, the resources are
freed to let the PCI subsystem use it.
Cc: stable@vger.kernel.org # v3.12+
Fixes: 930ab3d403 (i2c: mv64xxx: Add I2C Transaction Generator support)
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
ARMs ffs/fls implementations are not type compatible with x86, so when
they're used in combination with min()/max(), they provoke warnings.
Change these to be inline functions with the correct types, providing
the clz as a separate documentation, and document their individual
behaviours.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add the syscalls needed for supporting scheduling algorithms
with extended scheduling parameters (e.g., SCHED_DEADLINE).
In general, it makes possible to specify a periodic/sporadic task,
that executes for a given amount of runtime at each instance, and is
scheduled according to the urgency of their own timing constraints,
i.e.:
- a (maximum/typical) instance execution time,
- a minimum interval between consecutive instances,
- a time constraint by which each instance must be completed.
Thus, both the data structure that holds the scheduling parameters of
the tasks and the system calls dealing with it must be extended.
Unfortunately, modifying the existing struct sched_param would break
the ABI and result in potentially serious compatibility issues with
legacy binaries.
For these reasons, this patch:
- defines the new struct sched_attr, containing all the fields
that are necessary for specifying a task in the computational
model described above;
- defines and implements the new scheduling related syscalls that
manipulate it, i.e., sched_setattr() and sched_getattr().
Syscalls are introduced for x86 (32 and 64 bits) and ARM only, as a
proof of concept and for developing and testing purposes. Making them
available on other architectures is straightforward.
Since no "user" for these new parameters is introduced in this patch,
the implementation of the new system calls is just identical to their
already existing counterpart. Future patches that implement scheduling
policies able to exploit the new data structure must also take care of
modifying the sched_*attr() calls accordingly with their own purposes.
Signed-off-by: Dario Faggioli <raistlin@linux.it>
[ Rewrote to use sched_attr. ]
Signed-off-by: Juri Lelli <juri.lelli@gmail.com>
[ Removed sched_setscheduler2() for now. ]
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Link: http://lkml.kernel.org/r/1383831828-15501-3-git-send-email-juri.lelli@gmail.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Merge tag 'v3.13-rc8' into core/locking
Refresh the tree with the latest fixes, before applying new changes.
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Kexec disables outer cache before jumping to reboot code, but it doesn't
flush it explicitly. Flush is done implicitly inside of l2x0_disable().
But some SoC's override default .disable handler and don't flush cache.
This may lead to a corrupted memory during Kexec reboot on these
platforms.
This patch adds cache flush inside of OMAP4 and Highbank outer_cache.disable()
handlers to make it consistent with default l2x0_disable().
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
A number of situations currently require the heavyweight smp_mb(),
even though there is no need to order prior stores against later
loads. Many architectures have much cheaper ways to handle these
situations, but the Linux kernel currently has no portable way
to make use of them.
This commit therefore supplies smp_load_acquire() and
smp_store_release() to remedy this situation. The new
smp_load_acquire() primitive orders the specified load against
any subsequent reads or writes, while the new smp_store_release()
primitive orders the specifed store against any prior reads or
writes. These primitives allow array-based circular FIFOs to be
implemented without an smp_mb(), and also allow a theoretical
hole in rcu_assign_pointer() to be closed at no additional
expense on most architectures.
In addition, the RCU experience transitioning from explicit
smp_read_barrier_depends() and smp_wmb() to rcu_dereference()
and rcu_assign_pointer(), respectively resulted in substantial
improvements in readability. It therefore seems likely that
replacing other explicit barriers with smp_load_acquire() and
smp_store_release() will provide similar benefits. It appears
that roughly half of the explicit barriers in core kernel code
might be so replaced.
[Changelog by PaulMck]
Reviewed-by: "Paul E. McKenney" <paulmck@linux.vnet.ibm.com>
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Acked-by: Will Deacon <will.deacon@arm.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Mathieu Desnoyers <mathieu.desnoyers@polymtl.ca>
Cc: Michael Ellerman <michael@ellerman.id.au>
Cc: Michael Neuling <mikey@neuling.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Victor Kaplansky <VICTORK@il.ibm.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Oleg Nesterov <oleg@redhat.com>
Link: http://lkml.kernel.org/r/20131213150640.908486364@infradead.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
collie has several GPIO lines that act like keys - Sync/Wakeup button on
dock station is connected to GPIO line. Another one is connected to
on/off button. Add corresponding gpio-keys configuration.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Currently code has an inverted logic: opcode from user memory
is swapped to a proper endianness only in case of read error.
While normally opcode should be swapped only if it was read
correctly from user memory.
Reviewed-by: Victor Kamensky <victor.kamensky@linaro.org>
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
arch/arm/kernel/perf_event_cpu.c:274:25: warning: incorrect type in assignment (different modifiers)
arch/arm/kernel/perf_event_cpu.c:274:25: expected int ( *init_fn )( ... )
arch/arm/kernel/perf_event_cpu.c:274:25: got void const *const data
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The MPIDR contains specific bitfields(MPIDR.Aff{2..0}) which uniquely
identify a CPU, in addition to some non-identifying information and
reserved bits. The ARM cpu binding defines the 'reg' property to only
contain the affinity bits, and any cpu nodes with other bits set in
their 'reg' entry are skipped.
As such it is not necessary to mask the phys_id with MPIDR_HWID_BITMASK,
and doing so could lead to matching erroneous CPU nodes in the device
tree. This patch removes the masking of the physical identifier.
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The EXYNOS cpuidle driver code assumes that cpuidle core will handle
dev->state_count smaller than drv->state_count but currently this is
untrue (dev->state_count is used only for handling cpuidle state sysfs
entries and drv->state_count is used for all other cases) and will not
be fixed in the future as dev->state_count is planned to be removed.
Fix the issue by checking for the max supported idle state in AFTR
state's ->enter handler (exynos4_enter_lowpower()) and entering AFTR
mode only when cores other than CPU0 are offline.
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
The summary interrupt is #16 in the SPI space. Unfortunately,
when this device was translated from board files to DT we forgot
to subtract 16 from the interrupt number to translate it into a
SPI interrupt. Also, the register space is larger than 4k, increase
it appropriately so that the gpio driver doesn't try to access
registers outside of its mapping.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
ARCH_MSM is a hidden config option now so this defconfig needs to
be updated to select ARCH_MSM_DT instead. While we're here,
remove dead symbols (SSBI), drop selected symbols (ZRELADDR,
PHYLIB, USB_PHY) and enable the MSM random driver (HW_RANDOM_MSM).
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
regressions, typically boot failures or other unsafe system
configuration that causes badness.
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Merge tag 'clk-fixes-for-linus' of git://git.linaro.org/people/mike.turquette/linux
Pull clock fixes from Mike Turquette:
"Late fixes for clock drivers. All of these fixes are for user-visible
regressions, typically boot failures or other unsafe system
configuration that causes badness"
* tag 'clk-fixes-for-linus' of git://git.linaro.org/people/mike.turquette/linux:
clk: clk-divider: fix divisor > 255 bug
clk: exynos: File scope reg_save array should depend on PM_SLEEP
clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg clock
ARM: dts: exynos5250: Fix MDMA0 clock number
clk: samsung: exynos5250: Add MDMA0 clocks
clk: samsung: exynos5250: Fix ACP gate register offset
clk: exynos5250: fix sysmmu_mfc{l,r} gate clocks
clk: samsung: exynos4: Correct SRC_MFC register
Hopefully the last set of arm-soc fixes for 3.13, or at least only a
few stray patches after this.
There are a few fixes for Renesas platforms to fixup DMA masks (this
started causing errors once the DMA API added checks for valid masks in
3.13). Two more dealing with resources for MMC and PWM setup.
There's also a few TI/OMAP/DRA fixes for smaller stuff and a fix for
compilation failures on a PXA platform.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"A few fixes for Renesas platforms to fixup DMA masks (this started
causing errors once the DMA API added checks for valid masks in 3.13)"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: shmobile: mackerel: Fix coherent DMA mask
ARM: shmobile: kzm9g: Fix coherent DMA mask
ARM: shmobile: armadillo: Fix coherent DMA mask
add pin groups for USP0 only holding one of TX and RX frame sync. this
patch matches with the change in drivers/pinctrl/sirf.
Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com>
Signed-off-by: Barry Song <Barry.Song@csr.com>
this patch adds lost usp1_uart_nostreamctrl pin group for atlas6, which
matches with the change in drivers/pinctrl/sirf/pinctrl-atlas6.c.
Signed-off-by: Qipan Li <Qipan.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
This patch adds lost minigpsrtc device node for prima2 and atlas6,
which is behind rtc-iobg and whose offset is 2000.
Signed-off-by: Xianglong Du <Xianglong.Du@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
prima2 and atlas6 uses cpufreq_cpu0, here we put related clock, operation
points in dtsi.
Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
some nodes missed bus_width, clocks and status properties, here we fix them
in prima2 and atlas6 dtsi.
Signed-off-by: Bin Shi <Bin.Shi@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
As we switch to use the watchdog core which permits more than one
active watchdog in the system, rename platform driver to
"davinci-wdt" to be identifiable.
Acked-by: Wim Van Sebroeck <wim@iguana.be>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* qcom/soc2:
ARM: msm: Move MSM's DT based hardware to multi-platform support
ARM: msm: Only build timer.c if required
ARM: msm: Only build clock.c on proc_comm based platforms
Signed-off-by: Olof Johansson <olof@lixom.net>
The DT based MSM platforms can join the multi-platform builds, so
introduce a DT based ARCH_MSM option. This option allows DT based
MSM platforms to be built into the multi-platform kernel. Also
introduce a hidden ARCH_MSM config that both the DT and non-DT
platform support code select to avoid churn in places that depend
on CONFIG_ARCH_MSM.
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
The MSM timer is only used on MSM devices that don't have the
architected timers. Introduce a hidden Kconfig option for this
driver so that we don't build it on the platforms that don't need
it.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
The functionality provided by clock.c in mach-msm is only needed
on proc_comm based platforms. Only build the file if proc_comm is
enabled. This prevents compile failures for platforms that are
part of the multi-platform kernel.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
* qcom/drivers:
tty: serial: Limit msm_serial_hs driver to platforms that use it
mmc: msm_sdcc: Limit driver to platforms that use it
usb: phy: msm: Move mach dependent code to platform data
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch fix compilation error when driver is compiled
in multi-platform builds.
drivers/built-in.o: In function `msm_otg_link_clk_reset':
./drivers/usb/phy/phy-msm-usb.c:314: undefined reference to `clk_reset'
./drivers/usb/phy/phy-msm-usb.c:318: undefined reference to `clk_reset'
Use platform data supplied reset handlers and adjust error
messages reported when reset sequence fail.
This is an intermediate step before adding support for reset
framework and newer targets.
Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>
Acked-by: David Brown <davidb@codeaurora.org>
Cc: Daniel Walker <dwalker@fifo99.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
From Linus Walleij:
Ux500 core patches for the v3.14 series:
- Enable PRINTK_TIME
- Enable suspend with WFI
* tag 'ux500-core-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Enable system suspend with WFI support
ARM: ux500: turn on PRINTK_TIME in u8500_defconfig
Signed-off-by: Olof Johansson <olof@lixom.net>
From Christian Daudt, various defconfig udpates to bcm mobile.
* tag 'bcm-for-3.14-soc' of git://github.com/broadcom/bcm11351:
rename ARCH_BCM to ARCH_BCM_MOBILE (clocksource)
ARM: bcm_defconfig: Unset CONFIG_CRYPTO_ANSI_CPRNG
ARM: bcm_defconfig: Do not expect appended DTB
ARM: bcm_defconfig: CONFIG_OABI_COMPAT default off
Signed-off-by: Olof Johansson <olof@lixom.net>
