On LPAE, each level 1 (pgd) page table entry maps 1GiB, and the level 2
(pmd) entries map 2MiB.
When the identity mapping is created on LPAE, the pgd pointers are copied
from the swapper_pg_dir. If we find that we need to modify the contents
of a pmd, we allocate a new empty pmd table and insert it into the
appropriate 1GB slot, before then filling it with the identity mapping.
However, if the 1GB slot covers the kernel lowmem mappings, we obliterate
those mappings.
When replacing a PMD, first copy the old PMD contents to the new PMD, so
that we preserve the existing mappings, particularly the mappings of the
kernel itself.
[rewrote commit message and added code comment -- rmk]
Fixes: ae2de10173 ("ARM: LPAE: Add identity mapping support for the 3-level page table format")
Signed-off-by: Konstantin Khlebnikov <k.khlebnikov@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
enabling of twl4030 PM features. Turns out more work is needed
before we can enable twl4030 PM on n900.
I did not notice this earlier as I have my n900 in a rack
and the display did not get enabled for device tree based booting
until for v3.16.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT11p5AAoJEBvUPslcq6VzbEgQALyzdS0E48KFwfZZP2cafcRi
AtcOAenJiHLyPEt2ja4rx6op0lglxmMgniqVJCTujt7aNLxv6QoYLAgTIXvz3ZRp
3PyG7trH8aZ6DJXlVA9oxuyQ2n+WKWWo1A10V33IDC14VZVPwdtNr/cBO9VVy6n/
MvWEdZU9rUKgAkVgCCV1YfaodHY9jW6Nxdpbb8vvEWJWaLg4UB7GcRRkZhH0ZVDJ
dzv9kBNJKN9lV8Nb2QFQD8dL/PmUvdjw7Uj3XLTsXPLbiMcBGvd842zgu0RsGJMj
ns6VET8nZNdsOf0ap14lcYyMxjf0xD8cv851fK2ug3x7H4/WC2tDdHJNj26jk0cS
k9iyp+gO47hiSXBdmvHUO77fUoNCqn7qMM9L8i0F+3gKjZWFfUMOBnajDJ7rfsTM
pEVD1SAHmFnYJhjHqNF8sETNfhGxTU2A5VrUBXC62Wchu9bLIQHZnDDv1l7EoOAB
STewWGzltoLVoP+DDJPaTMW/atA7lEGmsOT8Abn27X2dOYns8/wwVmcq1RE87zwj
mT1efgy4iMYvZRUD2rsTG6xTFH/E0IOpu7uKbhIzXlPtzCXZx9tzLMIF998ePipC
ESNMoZth5qx0Rd6zwvYgKLE0N31HM91s/zII13s79BywkjY05W78rExBk1upkniD
zro4uxaG9tofeYULdYpM
=5XAH
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.16/n900-regression' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "omap n900 regression fix for v3.16 rc series" from Tony Lindgren:
Minimal regression fix for n900 display that got broken with
enabling of twl4030 PM features. Turns out more work is needed
before we can enable twl4030 PM on n900.
I did not notice this earlier as I have my n900 in a rack
and the display did not get enabled for device tree based booting
until for v3.16.
* tag 'omap-for-v3.16/n900-regression' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Revert enabling of twl configuration for n900
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
or the next one below it. This is intended to resolve some DSS problems.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/clock-b-v3.17/20140725061121/
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT0lK2AAoJEMePsQ0LvSpLUkEQAKpqkh9UYUixXBaeIQnoFcwH
uW7/cjYPfTY1ogFgMaFJN14cTmat+Xm97Es8hgEIZYyY5OmRNYqcdBXmfQ5Mls8b
mtxZu9FAPRfFZkfNst7Y1i969GoyTnOyOG3Ea7PlAzQacnjq7HVACLMKIDEOmGhG
rzDSj1eFaJWTUdY0yGFQAkwd5LvuNIfuXIwQ9DlHm84/tpKEpi32tmRJBPzLaKz1
Cu88ZiW1pfMR8BRw247wlJ9v2DJmhnrluhKhM6UFGJR6X31kw/s7wqbTi3+yNXqL
BToTQs1xVwMnnOAntM7sc39UFg3pgZBqWFemQCHtshGqhgo1MJ8nznIvxyPXAcAp
cLHMxMdBbs4Ds9vbJKTNVzntoam8PGO8mff0wMePqAPAuE/m/JMxBTPc5vZijI7f
SmjirUEhK47BEtUBRQNTVX/B1ABvmodaU93ous8gbKagjH358DkrIlCwP2rerJWc
eg9UxYNNRvK0iUsjl19vfr/qfT7vXnkp3YGfkJlR22KBJOQd1+M3X/NIBrU0fV2e
00H9O2YdScBGzFMLvbnT0LkH4/VgilR3667Kx6LkK/r62LrG1z296kTpnfwLtivH
1jfmhMyt1MfgOylPx/5Dh39xKqUqKeUVoBCFUr/45y3nFbEFZkILiNEuPzRNFUPK
AgSz5lyNGFfd4mb144hM
=fXvM
-----END PGP SIGNATURE-----
Merge tag 'for-v3.17/omap-clock-b' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.17/soc
Modify OMAP PLL rate rounding function to round to the exact rate requested
or the next one below it. This is intended to resolve some DSS problems.
Basic build, boot, and PM test results are available here:
http://www.pwsan.com/omap/testlogs/clock-b-v3.17/20140725061121/
If init_mm.brk is not section aligned, the LPAE fixup code will miss
updating the final PMD. Fix this by aligning map_end.
Fixes: a77e0c7b27 ("ARM: mm: Recreate kernel mappings in early_paging_init()")
Cc: <stable@vger.kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The fields are not used by the driver and will be removed from platform
data. Don't set them.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Joerg Roedel <jroedel@suse.de>
There are no existing users for OMAP1 mailbox driver
in kernel. Commit ab6f775 "Removing dead OMAP_DSP"
has cleaned up all the dead code related to the only
possible user, including the creation of the mailbox
platform device.
Remove this stale driver so that the OMAP mailbox
driver can be simplified and streamlined better for
converting to mailbox framework.
Signed-off-by: Suman Anna <s-anna@ti.com>
Acked-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Commit 9188883fd6 (ARM: dts: Enable twl4030 off-idle configuration
for selected omaps) allowed n900 to cut off core voltages during
off-idle. This however caused a regression where twl regulator
vaux1 was not getting enabled for the LCD panel as we are not
requesting it for the panel.
Turns out quite a few devices on n900 are using vaux1, and we need
to either stop idling it, or add proper regulator_get calls for all
users. But until we have a proper solution implemented and tested,
let's just disable the twl off-idle configuration for now for n900.
Reported-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Fixes: 9188883fd6 (ARM: dts: Enable twl4030 off-idle configuration for selected omaps)
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DMA engine is enabled for all DTs that derive from zynq-7000.dtsi.
There is no need to override the 'status' property in board DTs.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Exynos initialisation code now relies on obtaining the PMU address via
DT, so add the exynos5260 PMU compatible string to DT match table.
Signed-off-by: Vikas Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Exynos initialization code now relies on obtaining the PMU address,
so add the new 5410 value to the list of compatible string matches.
This unbreaks booting on 5410 based boards.
Fixes: fce9e5bb25 ("ARM: EXYNOS: Add support for mapping PMU base
address via DT")
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Exynos initialization code now relies on obtaining the PMU address,
so prepare a PMU node for Exynos5410.
Fixes: fce9e5bb25 ("ARM: EXYNOS: Add support for mapping PMU base
address via DT")
Signed-off-by: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Pull ARM AES crypto fixes from Herbert Xu:
"This push fixes a regression on ARM where odd-sized blocks supplied to
AES may cause crashes"
* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
crypto: arm-aes - fix encryption of unaligned data
crypto: arm64-aes - fix encryption of unaligned data
Update the bindings for touchscreen size.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Update the bindings for touchscreen size.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
- BCM Mobile SMP support
- BRCM STB platform support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT1mChAAoJEOfTILNwq7R4DDYQAJudlSqjwerAjQZwcdoe/xmP
74LjnWeCU3l1PhvtTynjPz3YWp+6VsHPDiHwJ00/ZTotCaa3Nl+zs5EbKs4aDeIb
R6YvvIJ4bmAaStmiWV32gM9UzC+4VGV8RsI8zbsbLFLhh6ChMYs47xTyLFeXd9Ks
999CW2T+TIQmvJHhD9hmpVFf6s+TWeDpS1VKagPeZAz1tTB7XTqKItQNalrobi+b
j4ak0Qsg/cYKjjG48320I2LuuXvUBZuW1nGLJ6sR90MKj1fWvUnwlJGv0Fyze1eF
B1mTBD5OznZyCOJqOUA8zXxesDFoCcPSjq4rrBgCBYu8KLTCeC7ZXUPiuYLihs1B
I64y7JzQThTqJghORgOb9oRq+DRHmO2hN6Ssfh41uJIJk9T6tssG3/qcwW6sdJPR
r64VknaQR3yyWTOWsCpWQwjY0VgTUvtH5WjVAnnx/MZzp/P8JDDYftYh4TPXnIu+
fhHPl6P1NoFm4hV6cYUNd1dT+tDACJDVOBytxRqgJ6BpcCOyPbe8aODDHES1ZOT7
XVTO0NSrO2ywbDb7JA/OteEHy1Ql7BL85Dx0+AK3WCsgOrZ7YjoODo2/5qr+I8p0
0hyYP+NZNljCrnXy0j4F1DNjJq1saVp1LS03ye9RqclsAdjqsrze9cmupZLNAj5o
qzDzm8AMGqRYBrM2gVfJ
=lUq9
-----END PGP SIGNATURE-----
Merge tag 'for-3.17/bcm-soc' of git://github.com/broadcom/mach-bcm into next/soc
Merge "ARM: mach-bcm: soc updates for 3.17" from Matt Porter:
- BCM Mobile SMP support
- BRCM STB platform support
* tag 'for-3.17/bcm-soc' of git://github.com/broadcom/mach-bcm:
MAINTAINERS: add entry for Broadcom ARM STB architecture
ARM: brcmstb: select GISB arbiter and interrupt drivers
ARM: brcmstb: add infrastructure for ARM-based Broadcom STB SoCs
ARM: configs: enable SMP in bcm_defconfig
ARM: add SMP support for Broadcom mobile SoCs
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- BCM Mobile SMP support
- BRCM STB platform support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJT1mIQAAoJEOfTILNwq7R4E9EQALNeAA80eWRF+xtGp7heShrt
lxm1gT8JUyCIG6GvCiYy5QvNpSaxaLqWpsSHdmxETfUHzexvICUJUECNmxUR49RX
9TScOu3P0lfQrd6+ZoAZdqTeiOv4nbQjdTrioIPvnjNKP/pk3FJy43ExkPaElDqG
792hrsPcKJ2Qet2Eu73Xx2LtEgarWoR9MDV/Yr1eI1CoKDiVobOCTeQlv+AtwEnW
Mj+DBRdMKykLvB5aS1fN1lRP+AOEibgn6mWyQExT1+8uVrqX5zjiuqtrxLqwgMep
9UFk1gUu4u/ao9CELi/thwBHm0BYt43y4h/mA9KspgOxE+eOoBXEruyxEb1s/hVU
nqF59FNfIJNVKA1dgOrYmph3xMTEMeenkf/EHBoXEsLOQRW84PIpHUYbsrj7akr2
aUte0nL7dWYXgcT+V6pn2IADWXGkp4AzAr1i8nAApHifDJmQ65a+ph7Y/J1s6eag
SWLdHLWQLcSS/YPHHyXWKSCwf3vHEx3GNfeoXqqpYgSLlfWifSXQpJc+Pi0hQrvv
12qmQkWmEc/wEDuJeOFmUedG1ZDW2ID03cCh10G2alkUCvn9i2STtfjV7Z7MkDtz
DbJCGoLfsQA92Zc0U5zHnuG7jDs+eCtODeKCpsrSuOoqOKUIze6gOStAfclC17sk
yigSWSFaOFhb6udn8dP5
=ZOoN
-----END PGP SIGNATURE-----
Merge tag 'for-3.17/bcm-dt' of git://github.com/broadcom/mach-bcm into next/dt
Merge "ARM: mach-bcm: dt updatees for 3.17" from Matt Porter:
- BCM Mobile SMP support
- BRCM STB platform support
* tag 'for-3.17/bcm-dt' of git://github.com/broadcom/mach-bcm:
ARM: brcmstb: dts: add a reference DTS for Broadcom 7445
ARM: brcmstb: gic: add compatible string for Broadcom Brahma15
ARM: brcmstb: add misc. DT bindings for brcmstb
ARM: brcmstb: add CPU binding for Broadcom Brahma15
ARM: dts: enable SMP support for bcm21664
ARM: dts: enable SMP support for bcm28155
devicetree: bindings: document Broadcom CPU enable method
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJTzJFGAAoJEHm+PkMAQRiGNzQH/087gQch5K+A2HKvPzjUXq57
G82DJHLONMMq8+NY3Vqhp8g2V8zRbXGJEvMJMsyuscO37Vo7ADcrYo8lqY9w5bIl
h+Zarhkqz0rqRs2SfMMIVzdd2W7MzL+lqj3GplGPxHztw0+qk7PRKILx6eRppGaH
JaD4NfkD5+1vfve/2d1ze9D5pCiw6PFNzjesKZxScQhNhIyLdRamfSTY4r9XeURo
CxpwjphEYfvAcgc39mwzEHPHyKSqULu0By6R8FXQpJ9QjVtzcGEiF+cPqGncpZOR
5ZSyU5e1CpBl9w8o6Lm9ewXmaCSnBU/VFrOwWvZrXfokZedXBOz7KdShU93XFjU=
=0VJM
-----END PGP SIGNATURE-----
Merge tag 'v3.16-rc6' into next/dt
Update to Linux 3.16-rc6 as a dependency for the broadcom changes.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Armada XP
- New board, Lenovo ix4-300d NAS
- Add Lenovo to vendor-prefixes
- Dove
- Add LCD controllers
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJT1l8ZAAoJEP45WPkGe8ZnoEAP/1tuwu6stZaEQSEEtI6TB5QP
RIjW19sMHcxNsH2s5uCXnG/Zrijkv+iPVizzx7uHs8upjvyo0Q4kPX3NYq4hQFMT
AriVnTHTVZ0ostX2IjflWWdikPwUi+a6yYmlZs2pUvUO/mrvuoMCDKNm4ry2zPZs
T4bXaKvHy+Y7LtqIQLTarr3oqkVi5N0zu+lVz7YMOj6plFrt+Q2ek0XiqJIjcR/+
59TozGocVQzS3p8zj2CJdHyqAdsId+mLQHsuLyMSHwQMADZsFtlmk71gFTlSrjdh
IL5IJbGaWXLVVelNo66T77a3bg3zpKetcA+4qwzIZjYQaZv9Et+old/dBUiAoumn
Vbo+QvqjumJRmFCY8ja3UNxKAjtPzdStZiomf2lCkJwEnxiFFwV2PCIxf9HkKGqC
tKU0vKG3fhmw1oOqkxRHNlNNtH8w+yfcAp1BDH6dnEUr3Og+vfZJeth+a6zDScaI
EBtTcBxHyfz9TmHw2SrUc8gjhEM0UkpE9UThukjy/futXxqlBn9BbgON9+s2IpqH
65s4I3ddtHcvO/ZamGC2IhHBmoorhdZ1HTYC2bkiq5IMrvkWEHWQpCZJlkEXfeLa
JxzFqU4i+W5824krYcYd2E46APE5CUT8d/tcuPog+LPy8B+T4Br2vhEzZ4bE9nTz
4VkOqw8kkJpAB3cIzXDy
=Ixkt
-----END PGP SIGNATURE-----
Merge tag 'mvebu-dt-3.17-4' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu DT changes for v3.17 (round 4)" from Jason Cooper"
- Armada XP
- New board, Lenovo ix4-300d NAS
- Add Lenovo to vendor-prefixes
- Dove
- Add LCD controllers
* tag 'mvebu-dt-3.17-4' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Add dts definition for Lenovo Iomega ix4-300d NAS
of: Add Lenovo Group Ltd. to the vendor-prefixes list.
ARM: dts: dove: add DT LCD controllers
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add a sample DTS which will allow bootup of a board populated
with the BCM7445 chip.
Signed-off-by: Marc Carino <marc.ceeeee@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: Matt Porter <mporter@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
Fix the same alignment bug as in arm64 - we need to pass residue
unprocessed bytes as the last argument to blkcipher_walk_done.
Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
Cc: stable@vger.kernel.org # 3.13+
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
The BCM7xxx series of Broadcom SoCs are used primarily in set-top boxes.
This patch adds machine support for the ARM-based Broadcom SoCs.
Signed-off-by: Marc Carino <marc.ceeeee@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Matt Porter <mporter@linaro.org>
Also explicitly set CONFIG_NR_CPUS to 2, limiting it to the most we
currently need.
Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
This patch adds SMP support for BCM281XX and BCM21664 family SoCs.
This feature is controlled with a distinct config option such that
an SMP-enabled multi-v7 binary can be configured to run these SoCs
in uniprocessor mode. Since this SMP functionality is used for
multiple Broadcom mobile chip families the config option is called
ARCH_BCM_MOBILE_SMP (for lack of a better name).
On SoCs of this type, the secondary core is not held in reset on
power-on. Instead it loops in a ROM-based holding pen. To release
it, one must write into a special register a jump address whose
low-order bits have been replaced with a secondary core's id, then
trigger an event with SEV. On receipt of an event, the ROM code
will examine the register's contents, and if the low-order bits
match its cpu id, it will clear them and write the value back to the
register just prior to jumping to the address specified.
The location of the special register is defined in the device tree
using a "secondary-boot-reg" property in a node whose "enable-method"
matches.
Derived from code originally provided by Ray Jui <rjui@broadcom.com>
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
Define nodes representing the two Cortex A9 CPUs in a bcm21644 SoC.
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
Define nodes representing the two Cortex A9 CPUs in a bcm28155 SoC.
Signed-off-by: Ray Jui <rjui@broadcom.com>
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Matt Porter <mporter@linaro.org>
In preparation to make the check_extension function available to VM scope
we add a struct kvm * argument to the function header and rename the function
accordingly. It will still be called from the /dev/kvm fd, but with a NULL
argument for struct kvm *.
Signed-off-by: Alexander Graf <agraf@suse.de>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
- convert to new clock driver
- bring structure in line with recent rk3288 comments
(no soc-nodes, using phandles when adding changes, sorted by address)
- i2c, board-pmic and pwm nodes nodes
- sd card slot and ir receiver on radxa rock
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJT1jA+AAoJEPOmecmc0R2BjLUH/0tqosFsfksVGJY+MX7+foRh
KClPetsBuktT+XbOxg9LkLE8MbBvEMbtMzQDoeUk4sRyBdbX5Je+EYkF4V97KkDv
zSAAfHCXOoPPVJpuxHoVQO/sCRG38oKUhtngTPzY70Lw3Gax8R0bAPRcG8c3R++C
Tep4q8TBkRenSnHBf94rk6kiyfs0ktUAroW4oWVWICPAGpKGpQU9kUpw91QmONe1
RdqUCW3g1yKHXj3n0DYjZmouIwrc/5fybMFH0tgy/PXeGFv02kZz+3ZkBTrWr/uz
yy9hhrIKrBvRbpz0WP5b6Ij5INQBDUSx3/rU2zGnWl2DRZl7YTPAMwXAUJCPLKs=
=wLux
-----END PGP SIGNATURE-----
Merge tag 'v3.17-rockchip-rk3xxx-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "ARM: dts: changes for existing rockchip boards" from Heiko Stuebner:
Collected changes for existing Rockchip boards
- convert to new clock driver
- bring structure in line with recent rk3288 comments
(no soc-nodes, using phandles when adding changes, sorted by address)
- i2c, board-pmic and pwm nodes nodes
- sd card slot and ir receiver on radxa rock
* tag 'v3.17-rockchip-rk3xxx-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rk3188-radxarock: add GPIO IR receiver node
ARM: dts: rockchip: add pwm nodes
ARM: dts: rockchip: add both clocks to uart nodes
ARM: dts: rk3188-radxarock: enable sd-card slot
ARM: dts: add i2c and regulator nodes to rk3188-radxarock
ARM: dts: rockchip: add tps65910 regulator for bqcurie2
ARM: dts: add rk3066 and rk3188 i2c device nodes and pinctrl settings
ARM: dts: rockchip: oder nodes by register address
ARM: dts: rockchip: remove address from pinctrl nodes
ARM: dts: uses handles to reference nodes for changes
ARM: dts: rockchip: add handles for shared nodes that don't have one yet
ARM: dts: rockchip: remove soc subnodes
arm: dts: rockchip: remove obsolete clock gate definitions
ARM: dts: rockchip: move oscillator input clock into main dtsi
ARM: dts: rockchip: add cru nodes and update device clocks to use it
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This is a dependency for the rk3288 DT updates, the branch should
first get merged through Mike's clk git.
* 'clk-rockchip' of git://git.linaro.org/people/mike.turquette/linux:
ARM: rockchip: Select ARCH_HAS_RESET_CONTROLLER
clk: rockchip: add clock controller for rk3288
dt-bindings: add documentation for rk3288 cru
clk: rockchip: add clock driver for rk3188 and rk3066 clocks
dt-bindings: add documentation for rk3188 clock and reset unit
clk: rockchip: add reset controller
clk: rockchip: add clock type for pll clocks and pll used on rk3066
clk: rockchip: add basic infrastructure for clock branches
clk: composite: improve rate_hw sanity check logic
clk: composite: allow read-only clocks
clk: composite: support determine_rate using rate_ops->round_rate + mux_ops->set_parent
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This is a dependency for the rk3288 DT updates, the branch should
first get merged through Mike's clk git.
* 'clk-rockchip' of git://git.linaro.org/people/mike.turquette/linux:
ARM: rockchip: Select ARCH_HAS_RESET_CONTROLLER
clk: rockchip: add clock controller for rk3288
dt-bindings: add documentation for rk3288 cru
clk: rockchip: add clock driver for rk3188 and rk3066 clocks
dt-bindings: add documentation for rk3188 clock and reset unit
clk: rockchip: add reset controller
clk: rockchip: add clock type for pll clocks and pll used on rk3066
clk: rockchip: add basic infrastructure for clock branches
clk: composite: improve rate_hw sanity check logic
clk: composite: allow read-only clocks
clk: composite: support determine_rate using rate_ops->round_rate + mux_ops->set_parent
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
In some cases it is desired to move a channel to a specific event queue.
Such a use case is audio, where it is preferred that it is served with
highest priority compared to other DMA clients.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Use the lowest priority queue as default for clients.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
As per example from the regulator subsystem: put all defines and
functions related to registering board info for GPIO descriptors
into a separate <linux/gpio/machine.h> header.
Cc: Andrew Victor <linux@maxim.org.za>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Alexandre Courbot <gnurou@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
dtc was giving warnings for missing #address-cells and #size-cells for
the new sun6i-a31-hummingbird.dts, which has a i2c-based rtc device.
This patch adds the properties for all i2c controller nodes for sun6i.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This adds a device tree node for the infrared receiver connected to a
GPIO pin on the Radxa Rock.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This adds the necessary nodex and pinctrl settings for the Rockchip PWM-driver.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Modified to use the new clock defines and added rk3066 pins.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Use the newly ammended dw_8250 clock binding to define both the baudclk as
well as the pclk supplying the ip.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This enables the 2nd i2c bus and adds the act8846 pmic as device.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The Curie2 uses a tps659102 as its main pmic, so add the i2c1 and tps65910
node as well as define the used voltages and regulator-names according to
the schematics.
Also fix the supply of the sd0 regulator, as it is supplied by the vio reg.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The pincontroller uses the GRF and PMU syscons nowadays, so should not
contain an address in its device node.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
