Sometimes ringbuffer timer is not getting updated due to
race with the preemption. This can cause dispatcher to
detect false timeout gpu faults. Remove preempt state
check in adreno_dispatch_process_drawqueue(), which will
allow to update ringbuffer timeout value irrespective of
the preemption state.
If the preemption completes successfully, preemption logic
updates timer for new_rb. We don’t need to care if it is
not updated for prev_rb. If preemption in-progress timer
will be updated for cur_rb in adreno_dispatch_process_drawqueue().
In both cases we are taking care to update ringbuffer timer.
Hence we don’t need to check preemption state.
CRs-Fixed: 1095344
Change-Id: I0e0ec655e2262c4f499748ce35a8d710ed15b5e3
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
Limit max secure concurrent instances to 5 due to
system wide limitations like memory, performance etc.
CRs-Fixed: 2005913
Change-Id: I430183633833986d6e70f78c2294f7fc221aa48c
Signed-off-by: Uma Mehta <umamehta@codeaurora.org>
For Mediabox project demux requires raise video frame events
only for MPEG-2 B frames and H264 non idr frames instead of all
frames. These changes are required for clock recovery & AV sync
for mediabox project.
CR's-Fixed: 2005724
Change-Id: I0c87d98b382c37381b9810b6de23267933e51c20
Signed-off-by: Udaya Bhaskara Reddy Mallavarapu <udaym@codeaurora.org>
Move the QSEE handle from user space to kernel space.
In addition, fix possible overflow, when checking that
the command and response buffers fit in the shared buffer.
CRs-Fixed: 1086530
Change-Id: I21b1866546a2825fe348a260c60e341bbe9600ea
Signed-off-by: Abir Ghosh <abirg@codeaurora.org>
There is a potential race between fuse_dev_do_write()
and request_wait_answer() contexts as shown below:
TASK 1:
__fuse_request_send():
|--spin_lock(&fiq->waitq.lock);
|--queue_request();
|--spin_unlock(&fiq->waitq.lock);
|--request_wait_answer():
|--if (test_bit(FR_SENT, &req->flags))
<gets pre-empted after it is validated true> TASK 2:
fuse_dev_do_write():
|--clears bit FR_SENT,
|--request_end():
|--sets bit FR_FINISHED
|--spin_lock(&fiq->waitq.lock);
|--list_del_init(&req->intr_entry);
|--spin_unlock(&fiq->waitq.lock);
|--fuse_put_request();
|--queue_interrupt();
<request gets queued to interrupts list>
|--wake_up_locked(&fiq->waitq);
|--wait_event_freezable();
<as FR_FINISHED is set, it returns and then
the caller frees this request>
Now, the next fuse_dev_do_read(), see interrupts list is not empty
and then calls fuse_read_interrupt() which tries to access the request
which is already free'd and gets the below crash:
[11432.401266] Unable to handle kernel paging request at virtual address
6b6b6b6b6b6b6b6b
...
[11432.456168] PC is at __list_del_entry+0x6c/0xc4
[11432.463573] LR is at fuse_dev_do_read+0x1ac/0x474
...
[11432.679999] __list_del_entry+0x6c/0xc4
[11432.687794] fuse_dev_do_read+0x1ac/0x474
[11432.693180] fuse_dev_read+0x6c/0x78
[11432.699082] __vfs_read+0xc0/0xe8
[11432.704459] vfs_read+0x90/0x108
As FR_FINISHED bit is set before deleting the intr_entry with input
queue lock in request completion path, do the testing of this flag and
queueing atomically with the same lock in queue_interrupt().
Change-Id: I84232771cf09a809806568144441fd356b87d46c
Signed-off-by: Sahitya Tummala <stummala@codeaurora.org>
During certain usecases like UHD 10 bit playback,
the bus bandwidth required for Venus is more than
the bandwidth currently voted by video driver.
Though the bandwidth is calculated properly, it
gets clamped to an upper range.
Fix the upper range to accommodate bandwidth for
all Venus usecases.
Change-Id: Ic9dd3d0cb0bde89a7f6e42b3197c22fbb5192fab
CRs-Fixed: 2004597
Signed-off-by: Vikash Garodia <vgarodia@codeaurora.org>
There is a chance for a CPR controller to use the run-time calibrated
step_quot of lower modes for higher modes. This can sometimes lead
to closed-loop voltage getting stuck at open-loop voltage. To avoid
this, configure APC0/1 and GFX CPR controllers in sdm660 to first use
the default step_quot and then later switch to the run-time calibrated
step_quot.
CRs-Fixed: 2003482
Change-Id: Ic355a3a533ab65d9e2b28c67b7fca7df1dd49d48
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
There is a possible race condition when debugfs files are concurrently
accessed by multiple threads. Fix this.
CRs-Fixed: 1109420, 1109326
Change-Id: I19e9107079ac8d039b12a37ae612727f824552d4
Signed-off-by: Ankit Sharma <ansharma@codeaurora.org>
wil6210 is required for 11ad card that is present
in qrd-qvr. Hence update the device node status
to reflect this.
Change-Id: I43eb45fcb00449fd7b714c6407d9aa8cc9c518a9
Signed-off-by: Hamad Kadmany <hkadmany@codeaurora.org>
On msm8998 HDK device, NC(normal close) jack pin is used for
headset left detection. Set to 0 to correct it.
CRs-Fixed: 2007005
Change-Id: I9244b913ebc1b05428408193113a80be4477cddd
Signed-off-by: Meng Wang <mwang@codeaurora.org>
There is a possible race condition when FG debugfs files are concurrently
accessed by multiple threads. Fix this.
CRs-Fixed: 1105481
Change-Id: I154e7f3cdd8d51cf67ef1dfd9d78f423f183cb64
Signed-off-by: Ankit Sharma <ansharma@codeaurora.org>
Add support for devfreq and cpufreq nodes on SDM630 target
which are needed to scale cpu and DDR frequency.
Change-Id: Ic1051e712a3a6578eb6448538e15be9acb85dc89
Signed-off-by: Santosh Mardi <gsantosh@codeaurora.org>
When an upmigrate ineligible task running on the maximum capacity CPU,
we check if it can be migrated to a lower capacity CPU in tick path.
Add a power cost based check there to prevent the task migration
from a power efficient CPU.
Change-Id: I291c62d7dbf169d5123faba5f5246ad44a7a40dd
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Compute the CPU search mask once by taking task affinity,
cpu_active_mask and cpu_isolated_mask into account and cache
it in cpu_selection_env. This prevents doing the same cpumask
operations multiple times.
Change-Id: I78f35c59e6ee9437b3a522ac7ad856c0251f81ec
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Set the TSPP configuration to enable LPASS time stamps in TSIF HW.
The TSIF adds LPASS timestamps to Transport Stream packets instead
of TSIF internal clock timestamps. This change is required for clock
recovery & AV sync for mediabox project based on LE platform.
CR's-Fixed: 2005724
Change-Id: I43f0e8c2593b12e65e603f23a6c1acb663ef439e
Signed-off-by: Udaya Bhaskara Reddy Mallavarapu <udaym@codeaurora.org>
Signed-off-by: Arun Menon <avmenon@codeaurora.org>
Add audio stream buffer interface to write the Audio demux data
to audio decoder buffers. Add support in TSIF driver to append
LPASS subsystem time stamps to Transport Stream packets in TSIF HW.
This is required for AV sync & clock recovery handling
for mediabox project based on LE platform.
CR's-Fixed: 2005724
Change-Id: I39d2544e958c31ff1abdd2ad77412a87bc2a189b
Signed-off-by: Udaya Bhaskara Reddy Mallavarapu <udaym@codeaurora.org>
Signed-off-by: Arun Menon <avmenon@codeaurora.org>
Add CONSTANT_CHARGE_CURRENT_MAX, to set and get fcc.
CRs-Fixed: 2004173
Change-Id: I3dfed0ca7b2a477e1c106955fa112ba5206e3fa4
Signed-off-by: Harry Yang <harryy@codeaurora.org>
AFE calibration data block is sent to DSP only if ACDB ID matches with
ACDB ID that is updated from routing driver. For hostless FE DAIs, ACDB
IDs are not updated in routing driver, which results in failure while
sending AFE calibration block to DSP. Fix this issue by sending default
AFE calibration data in acdb ID mismatch cases.
Change-Id: Icaa399f9251e69ce456e4d560101cb842efcd230
Signed-off-by: Vidyakumar Athota <vathota@codeaurora.org>
Add new SCM ID to register listener when smcinvoke is supported. Then
TZ, depending on how the listener has been registered, will either
behave in the old way (i.e. rsp[1]=QSEE_LISTENER_ID), or the new way
(rsp[1]=app_id) when smcinvoke is supported. And qseecom will first
to register listener with new SCM ID, if failed, then fallback to
use old ID.
Change-Id: Ia27055db6ec8f26705669ee913919b29461121ca
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
Disable CONFIG_ICNSS_DEBUG now that solution is stable.
CRs-fixed: 2006760
Change-Id: Ic2cd7a02f3486ab81739e8b2fe2259087e3539d6
Signed-off-by: Prashanth Bhatta <bhattap@codeaurora.org>
