This change adjusts the bandwidth limits for the
mdp core in the v2 of msmcobalt.
Change-Id: I3559ed2b6984ac9cec8e219f59f634410aaf57c9
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
when event is generated during CMI SEND state, process the
event explicitly without waiting for response to complete.
This change fixes response timed out errors for start and
stop commands.
Change-Id: I2e8d877b57c4d547688fdd7a2e71d06dfec3d4ab
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
Update USB bus ib voting value to 100Mhz or 800000 kbps to allow
SVS when usb cable is connected.
Change-Id: I4692242f65bcf09baeab1a85681ec8c2f3b4cf61
Signed-off-by: Vamsi Krishna Samavedam <vskrishn@codeaurora.org>
To support Split A2DP over slimbus, it will share
slimbus port 16 with SCO channel. A2DP configuration
has been added into slimbus port 16.
Signed-off-by: Sungjun Park <sjpark@codeaurora.org>
Change-Id: I55bc9cda07ef3c2d3ff5713f1ce83d8b344bed6a
Flash type is automatically detected in kernel based on dtsi
entries.
It checkes in this order:
1) I2C flash
2) PMIC flash
3) GPIO flash
CRs-Fixed: 1028059
Change-Id: I7e57a4d6c67a58728bb3ef7f3ea0312380f84486
Signed-off-by: Rajesh Bondugula <rajeshb@codeaurora.org>
Currently qsee_ipc_irq_bridge driver is using an incorrect clear mask
when it handles an incoming level triggered interrupt. This causes
an interrupt storm.
Update the IRQ clear mask entry to appropriate value.
CRs-Fixed: 1053076
Change-Id: I6bfe7aecd73a13401a218e89874f2225ac91d18f
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
Currently the driver checks for interrupt type and subsytem name before
parsing the RX IRQ Reset Regiser. Checking for the subsystem name is
redundant and prone to typo errors which will lead to incorrect parsing
of Device Tree entries and eventually an interrupt storm.
Check only for the interrupt type and parse the Device Tree entries
completely.
CRs-Fixed: 1053076
Change-Id: I22719898b86534f1821104a6a629e7fd37b0d823
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@codeaurora.org>
The UFS driver does not need the GDSC driver to set the core
and peripheral memory retention bits for certain UFS clocks
on it's behalf. Remove doing so.
CRs-Fixed: 1052994
Change-Id: I845eb2014056203d203ee6be66de0cc161c2dedb
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
In case of GPU idle (NAP), schedule DCVS call to obtain updated
GPU load for correct GPU frequency scaling.
Change-Id: Ifcf05ffde0a054839e51d3f8173b8449fe177aa0
CRs-Fixed: 1050000
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
Current sleep state entry compatible string is tied with
remote processor ID which is not always true.
Use generic compatible string for sleep state entry to
support for any remote processor ID.
CRs-Fixed: 1043377
Change-Id: I6ef2810b07960006b0fe4c573d5ce2bead90ee97
Signed-off-by: Dhoat Harpal <hdhoat@codeaurora.org>
Add sysfs entries to upgrade firmware from userspace.
Firmware upgrade is triggered when the device's firmware
version mismatches with userspace's firmware file.
Force firmware upgrade sysfs entry is added to force
the firmware upgrade even when the firmware versions
match.
Change-Id: I48189abe60b4bd9d54a1bbc4657707213d8eb166
Signed-off-by: Mohan Pallaka <mpallaka@codeaurora.org>
Signed-off-by: Shantanu Jain <shjain@codeaurora.org>
QCOM_ICE_INVALID_CCFG_ERR_STTS is now also dumped in case of error
for ICE 3.0
Change-Id: Ib7f522d0143f5131880c8c1badf4e64461810e72
Signed-off-by: Andrey Markovytch <andreym@codeaurora.org>
Add support for AFE encoder configuration.
Add new mixer controls to support AFE input channel
and encoder configuration.
Add support in AFE to set the encoder and input
channel configuration.If encoder configuration is set
ADSP will encode the PCM steam and send over backend.
Change-Id: I56581533ffff3b61f5b5ee128841ab61b62674d7
Signed-off-by: Naresh Tanniru <ntanniru@codeaurora.org>
Add support of route control to set ADM input channel
config. This is used to help open adm with different
channel config compare to AFE output.
Add new mixer command to override adm channel count set
by hw_params. This is useful in cases where BE hw_params
is different from the ADM channel configuration for cases
such as A2DP exercising ADSP path.
Change-Id: I93ad53016a28efe0d8592ac0092d6c8896a66072
Signed-off-by: Naresh Tanniru <ntanniru@codeaurora.org>
In soundwire control drivers, some pointers are not
set as NULL after the memory is freed, which will
leave many dangling pointers. Set them to NULL
explicitly to avoid potential risk.
CRs-Fixed: 997062
Change-Id: I18bd73397173187f87af28c78564835eed6d6a10
Signed-off-by: Meng Wang <mwang@codeaurora.org>
In wcd core drivers, some pointers are not set as NULL
after the memory is freed, which will leave many
dangling pointers. Set them to NULL explicitly to
avoid potential risk.
CRs-Fixed: 997062
Change-Id: I5dd4a9dd8f757d0850d75575d7e522e2a22f46f3
Signed-off-by: Meng Wang <mwang@codeaurora.org>
In machine drivers, some pointers are not set as NULL
after the memory is freed, which will leave many
dangling pointers. Set them to NULL explicitly to
avoid potential risk.
CRs-Fixed: 997062
Change-Id: Ifa27a21cb76688101b758a34eddf69b160c27c79
Signed-off-by: Meng Wang <mwang@codeaurora.org>
Currently when selecting a PDO the request object is specifying
900mA as the operating current, which is suboptimal if the
supply is capable of more. Instead, simply request for the
maximum available. In the case where a PDO does not meet the
minimum current, set the capability mismatch flag and indicate
the required amount via the maximum field in the request.
Change-Id: I521059ab1c1d95df95fdede84512e73c5d9b2329
Signed-off-by: Jack Pham <jackp@codeaurora.org>
In codec drivers, some pointers are not set as NULL
after the memory is freed, which will leave many
dangling pointers. Set them to NULL explicitly to
avoid potential risk.
CRs-Fixed: 997062
Change-Id: I1fde78158af71d57c958ac9f5668d4b65c9a7a3f
Signed-off-by: Meng Wang <mwang@codeaurora.org>
Update the graphics and multimedia clock frequencies and FMAXes
to align with the v2 and vq frequency plans. While doing so,
remove support for the gpu_pll1 PLL since it is not going to be
used to generate any frequencies.
CRs-Fixed: 1051170
Change-Id: I4d6547d95bd76d8ca6f4d729009d8b4a78716d5b
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Auto hibern8 is useful during active requests for efficient power
savings. Since we are anyway in suspend path, disable auto
hibern8 until a successful resume. This prevents unnecessary hibern8
enter/exit during the suspend/resume path.
Change-Id: Ie5a76dddd662e67ae8ce6e6f37f437ff4665b066
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Set the memory retention flags for certain hardware clocks to
save power. Memory does not need to be retained for these
clocks since the driver reinitializes the FD hardware
whenever the clocks are turned on.
CRs-Fixed: 1044373
Change-Id: I7ffa9d7bd9c39696b2ca0c688fdc13ce947ae1c7
Signed-off-by: Gautham Mayyuri <gmayyuri@codeaurora.org>
Set the memory retention flags for certain hardware clocks to
save power. Memory does not need to be retained for these
clocks since the driver reinitializes the jpeg hardware
whenever the clocks are turned on.
CRs-Fixed: 1044373
Change-Id: Idd83064eaea2dee48b78a352a715633c04347217
Signed-off-by: Gautham Mayyuri <gmayyuri@codeaurora.org>
The axi clock is needed while voting for bus bandwidth and needs
to be turned on along with other cpp clocks, Remove cpp rcg clk.
CRs-Fixed: 1044777 1044373
Change-Id: I644cdf84c6cf71bcb8f4ea24c0efb9a3603ca435
Signed-off-by: Gautham Mayyuri <gmayyuri@codeaurora.org>
GDSC driver is removing control for USB memory power states.
DWC driver need to explicitly call clk_set_flag() API to turn
off both memory core and periphery upon vbus off. When core
clock is turned on both of them will be turn on automatically.
Change-Id: I7e442daf51c6ece39b8fe5cc8a38d3405163c9b5
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Add smmu iova address and size for ICNSS. It will be used to
attach to smmu driver.
CRs-Fixed: 1049889
Change-Id: I7aad55ba6ac69ad2ca7a8783bf4fdd8241d112cc
Signed-off-by: Yuanyuan Liu <yuanliu@codeaurora.org>
Previously the dma fifo read watermark was set to default value
which is 1/2 full. The full FIFO size is 512B, and this means the
read would be blocked for the first 256B and as soon as it is
consumed, it might expect the next 256B immediately. This may
result in underflow if sufficient data is not produced. To avoid
such cases, set read watermark to 15/16, so it is blocked until
full FIFO size data is generated.
Change-Id: I39bd10ccb7db3c4fe37ea609babdd6305fc19a7d
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
