Align the cpu node indentation with the rest of the file
[gc]: added a commit description
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
- use the mvebu-mbus driver
- prep for LPAE support
Depends:
- mvebu/cleanup (tags/cleanup_for_v3.10)
- mvebu/drivers (tags/drivers_for_v3.10)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQEcBAABAgAGBQJRbApqAAoJEAi3KVZQDZAeiUkH+gI3KNnIEmwbMANGy+zdX70Y
mVj5X51MkXCawqNPLT6KYTO16Ap8STBXDxLfQfll1BuIeATgQgqs8dCcykiYQ4me
45Hj9+6uZhfPpN43u4syFPoYaLSAMT9Oe/9ntcpdnyu4fEsRmGGh2Dg8bhYcG1B2
+IVB67qSJ3vU0D2bcqsbSPuSu9MW2Qloc5+SMR74TcsyseZw10kbvL6cdwi9DpNt
ru2c/bXqO88U1pmeedJ8Cxl0KGFDhocYWV6orqph+2jIxuCDYd7DjOXFKeMHwcDX
lj54wMUyp8EzTs+huhnK3qL6waXTyccmMDDvgIL6WiFywvklTOJOFz0BnfHIHpk=
=RK7u
-----END PGP SIGNATURE-----
Merge tag 'tags/soc_for_v3.10' into mvebu/dt
Pulling in mvebu branches which contain changes to armada*.dts? files for LPAE
conversion.
mvebu soc changes for v3.10
- use the mvebu-mbus driver
- prep for LPAE support
Depends:
- mvebu/cleanup (tags/cleanup_for_v3.10)
- mvebu/drivers (tags/drivers_for_v3.10)
- Kirkwood
- a couple of small fixes for the Iomega ix2-200 board (ether and led)
- mvebu
- allow GPIO button to work on Mirabox when running SMP
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQEcBAABAgAGBQJRZZxwAAoJEAi3KVZQDZAerwcIAKR1xRKuagtXvfij+xfVVRQ6
1G645hTIthFXmNiEeo3Y/mswHhVooZvu8SWh3o3J2Wsbnzeh+ch6jTsl+g6Tnb3E
KmRFU0mcalRmsyYsh4PH9nDi8/oWyP+i3ZytgfcMlsSPNiE+Ek35NdTTWMLCTT8V
MkGysVc8MWoOmMf47mNboy5UUUTXRdnSUJSjv1ubrsTK33LT7Ii9Ce+eoNvpvF+5
+6RenfRMzRSwkZf9AaCRPAhXISQKbMAwz6lKGo2GGAW+73Z+JclXXmiCfQ8pWie2
pfyqiEYigZFqe6Ly5BUtGoVfDjmOLDs+ATTUDOlOj0uaEc7pOwwKoAtpVRdck24=
=yK1f
-----END PGP SIGNATURE-----
Merge tag 'tags/mvebu_fixes_for_v3.9_round3' into mvebu/dt
pulling in mvebu branches which changes armada*.dts? files for LPAE changes
mvebu fixes for v3.9 round 3
- Kirkwood
- a couple of small fixes for the Iomega ix2-200 board (ether and led)
- mvebu
- allow GPIO button to work on Mirabox when running SMP
The Marvell Armada XP GP board has 3 physical full-size PCIe slots, so
we enable the corresponding PCIe interfaces in the Device Tree.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Marvell evaluation board (DB) for the Armada 370 SoC has 2
physical full-size PCIe slots, so we enable the corresponding PCIe
interfaces in the Device Tree.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Globalscale Mirabox platform uses one PCIe interface for an
available mini-PCIe slot, and the other PCIe interface for an internal
USB 3.0 controller. We add the necessary Device Tree informations to
enable those two interfaces.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Marvell evaluation board (DB) for the Armada XP SoC has 6
physicals full-size PCIe slots, so we enable the corresponding PCIe
interfaces in the Device Tree.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The PlatHome OpenBlocks AX3-4 has an internal mini-PCIe slot that can
be used to plug mini-PCIe devices. We therefore enable the PCIe
interface that corresponds to this slot.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Armada XP SoCs have multiple PCIe interfaces. The MV78230 has 2
PCIe units (one 4x or quad 1x, the other 1x only), the MV78260 has 3
PCIe units (two 4x or quad 1x and one 4x/1x), the MV78460 has 4 PCIe
units (two 4x or quad 1x and two 4x/1x). We therefore add the
necessary Device Tree informations to make those PCIe interfaces
usable.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Armada 370 SoC has two 1x PCIe 2.0 interfaces, so we add the
necessary Device Tree informations to make these interfaces availabel.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The changes needed to migrate the mach-mvebu (Armada 370 and Armada
XP) to the mvebu-mbus driver are fairly minimal, since not many
devices currently supported on those SoCs use address decoding
windows. The only one being the BootROM window, used to bring up
secondary CPUs.
However, this BootROM window needed for SMP brings an important
requirement: the mvebu-mbus driver must be initialized at the
->early_init() time, otherwise the BootROM window cannot be setup
early enough to be ready before the secondary CPUs are started.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Now that the clock driver supports the gatable oscillator as one single
clock, drop osc24M_fixed and move the relevant properties to osc24M
Signed-off-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add da850 EHRPWM & ECAP DT node along with pin-mux details.
Also adds OF_DEV_AUXDATA for EHRPWM & ECAP driver to use EHRPWM & ECAP
clock.
Signed-off-by: Philip Avinash <avinashphilip@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
These patches are changes to the MSM timer code that will be for
upcoming targets, including a generalization of the binding and
preventing a missing timer interrupt.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQIcBAABAgAGBQJRaInuAAoJEOa6n1xeVN+CP5oP/3HMkT/Ihqcm85H9SXSG9M9d
1LY2Nu6wWoSZk5qbBc8zAEFaoP3WDOJ/zgonXRFxOa59x5ZopEyw2xzQ5HO7+vHe
umH9uGA644rrTysSsx1Zox1H6AskxKTzPXTrDeTXH1W4s3Rmsqzg+08Ie72WTKJn
UROFI/zv1HS6G8Eq33fpbsq4juZtbqTJLiIDICDB3x1pEXh96MZTgC6LXuU6RTHh
ORN7QNf8LjaNU1lZdRdYXsdO8CIb51Ur2OKNG8G+L711Khr4fdwIEEFQUH4CS9Mq
RXPY47h+rwc4q7KHzEpF3rRITDDJnq5nbazEpSMFKq8ACr6fH6u5zUr0nknIWAL+
cYZMu6axuYLCMe4QCEf2xuASdggsHiXnq8MWJCsrx4h4VWKq9TcsfZkytdZu5epi
M9RY2c1VfcCFEIsBhb/s00ZRZkZaQq8S9wvbt431bSHBlvsGp9Ofqxj2siYcmMC+
ozE6ClI4IQMB+iBdk3MNV0sK8Boj0ywo/2KgnfCGJ+f+LcuAhQMScvOY4JPjMxpZ
8RcfZzg49mbN7hV4+IHJWW9Nfo6mPlw4k3vavx6kcChYQeQiGANO0kg+2ldagDIE
blxh0PxXSgpkB91Epova/tGPXncGPgG2k9eOrZ3pmZtmBL4215Axlx2zjc8elFeG
/pEkYdZqddjwVm8ryHWQ
=SbqQ
-----END PGP SIGNATURE-----
Merge tag 'msm-core-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into next/soc
From David Brown:
Patches for MSM core
These patches are changes to the MSM timer code that will be for
upcoming targets, including a generalization of the binding and
preventing a missing timer interrupt.
* tag 'msm-core-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm:
ARM: msm: Wait for timer clear to complete
ARM: msm: Rework timer binding to be more general
Signed-off-by: Olof Johansson <olof@lixom.net>
* Enable anatop, well bisa and RBC for suspend to optimize the power
consumption a little bit
* Clock changes for TVE, LDB, PATA, SRTC support
* Add System Reset Controller (SRC) support for imx5 and imx6
* Add initial imx6dl support based on imx6q code
* Kconfig for cpufreq-cpu0, defconfig updates and few other changes
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJRZ/viAAoJEFBXWFqHsHzOyqUH/2t7CCwlfTVUJYDCeo6PaE9x
41cV5zG6RvX1OfkRUmJ2N2klGn4zhwg6GHsCDQmvs+IODs4E7JeB9M92FAaPng71
NnuuwCQ01iIoaTtkz8z/n3tSet3fYB+xfNCMJoWIyS0edFFkCjOgnqRsA0pHRIOp
G6ey1kU80D0f4+DjAUg1mkIvJrZxbRKDwmwqfDGJzQ4VU7cv70n027YuMKbeMyCC
zdeKmpKSEl9AY+O/zeMrf03zEW+kdZ4eB6cTUFlpzYwPYY9o+XHx0U0535F7/x4+
KObUZ9Qg7liP5WO3ZzkVff5HJqPs6s/q99eOsU4/okF1x0fpq2mSgIHlSw4HpK8=
=TuTx
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc2
From Shawn Guo:
The imx soc changes for 3.10:
* Enable anatop, well bisa and RBC for suspend to optimize the power
consumption a little bit
* Clock changes for TVE, LDB, PATA, SRTC support
* Add System Reset Controller (SRC) support for imx5 and imx6
* Add initial imx6dl support based on imx6q code
* Kconfig for cpufreq-cpu0, defconfig updates and few other changes
* tag 'imx-soc-3.10' of git://git.linaro.org/people/shawnguo/linux-2.6: (275 commits)
ARM i.MX53: set CLK_SET_RATE_PARENT flag on the tve_ext_sel clock
ARM i.MX53: tve_di clock is not part of the CCM, but of TVE
ARM i.MX53: make tve_ext_sel propagate rate change to PLL
ARM i.MX53: Remove unused tve_gate clkdev entry
ARM i.MX5: Remove tve_sel clock from i.MX53 clock tree
ARM: i.MX5: Add PATA and SRTC clocks
ARM: imx: do not bring up unavailable cores
ARM: imx: add initial imx6dl support
ARM: imx1: mm: add call to mxc_device_init
ARM: imx_v4_v5_defconfig: Add CONFIG_GPIO_SYSFS
ARM: imx_v6_v7_defconfig: Select CONFIG_PERF_EVENTS
ARM: i.MX53 Add the cko1, cko2 clock outputs.
staging: drm/imx: Use SRC to reset IPU
ARM i.MX6q: Add GPU, VPU, IPU, and OpenVG resets to System Reset Controller (SRC)
ARM: imx: do not use regmap_read for ANADIG_DIGPROG
ARM i.MX6q: set the LDB serial clock parent to the video PLL
ARM i.MX6q: Add audio/video PLL post dividers for i.MX6q rev 1.1
ARM i.MX6q: fix ldb di divider and selector clocks
ARM i.MX53: fix ldb di divider and selector clocks
ARM i.MX: Add imx_clk_divider_flags and imx_clk_mux_flags
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Trivial change/change conflict in arch/arm/mach-imx/mach-imx6q.c resolved.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRYvOSAAoJEA0Cl+kVi2xqSxAQAKYKxx8PRNweKw3IeqIRQ+gs
Ia+0ZkHqPgoD/ezASGUmaTDGvAGVlNFqFTpzYiCLqFII5O4NzjFO9BfwE80PxaDe
I/tcofrU6aWNfYtT/0YsrvcdqVsSNxJwPBxfpEHyCK+4xoXsV6xJV0IpvE/u9bNT
2hLMfGndPkeTTqk7H3MpdJVB5DZOnE6LEwFVz1hVpBcCoQPJnpltIAGs/m4Rri7p
hlgdHxKAqo+VUcmmcP3HanylFvWwbJdtemdgPXTalzOFTZJ16RFJ3+ylRf7PbWjK
zVmjg7tFCmuAnh6HQTdm4hsnIohkL/GJfJClvNS52xL8ovfVWvjSF/x8LLZi5+4G
HBRZh2A1jIOGWxfSbpkPD64/rAp1aYZBeBVEQwAkeJdPCqlgvx8YS7vxZZT8i/1g
vck+d4zKzUCldGADu1YAHGBhRFAbmv1sJR4fzvkYrKGyzd+5jbyFx4fdZFpj6XEO
95P5CJgN6UIywBHrTG0CLP/828sdM7V8rmAnkvmAFXFv/MUJfPR5H81OUMWL5KAY
3a+ZJLPcwizb/cBMl7Qqq/YIXoV+o1byd49+/1rJvcD9KLlGwLawnbE/ZZp6PlQz
td2TNONzj3bqEXBDNx+PwpqcjSvO7KQFp+iFijZI7yRR6t+kfoqad5Vv+J0H7ATP
MxNZ7mSIKLa/rTDWK8LV
=YqMV
-----END PGP SIGNATURE-----
Merge tag 'dt-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/dt2
update device tree for exynos4 and exynos5
* tag 'dt-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (125 commits)
ARM: dts: add PDMA0 changes for exynos5440
ARM: dts: Add cpufreq controller node for Exynos5440 SoC
ARM: dts: Fix gmac clock ids due to changes in Exynos5440
ARM: dts: add device tree file for SD5v1 board
ARM: dts: update bootargs to boot from sda2 for exynos5440-ssdk5440
ARM: dts: add PMU support in exynos5440
ARM: dts: Add node for GMAC for exynos5440
ARM: dts: list the interrupts generated by pin-controller on Exynos5440
ARM: dts: Add FIMD DT binding Documentation
ARM: dts: Add FIMD node and display timing node to exynos4412-origen.dts
ARM: dts: Add FIMD node to exynos4
ARM: dts: Add SYSREG block node for S5P/Exynos4 SoC series
ARM: dts: Add display timing node to exynos5250-smdk5250.dts
ARM: dts: Add FIMD node to exynos5
ARM: dts: Add virtual GIC DT bindings for exynos5440
ARM: dts: Document usb clocks in samsung,exynos4210-ehci/ohci bindings
ARM: dts: add usb 2.0 clock references to exynos5250 device tree
ARM: dts: Add architected timer nodes for exynos5250
ARM: dts: Declare the gic as a15 compatible for exynos5250
ARM: dts: Add HDMI HPD and regulator node for Arndale board
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds the required node for the SDHC controller on WM8505 SoCs.
Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Olof Johansson <olof@lixom.net>
Move the integrator-cp timer init to timer-sp.c and use CLKSRC_OF. There is
no reason to use the aliases, so drop them from the init code.
The integrator-cp timers are mistakenly called sp804 timers in the dts, but
in fact they are not sp804 dual timers, but single timers with the same
programming model. Fix the dts to reflect this.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
The motherboard sp804 timer is used, but core tile sp804 timer is not.
According to Russell King, the clock configuration is undocumented and
defaults to 32kHz which is not desireable. So mark core tile sp804 timer
as disabled.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
In order to be able to use more than 4GB address-cells and size-cells
have to be set to 2
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Lior Amsalem <alior@marvell.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Plat'home Openblocks AX3 has a 128 MiB NOR flash device connected
to the Device Bus. This commit adds the device tree node to support this device.
The SoC supports a flexible and dynamic decoding window allocation scheme;
but since this feature is still not implemented we need to specify the window
base address in the device tree node itself.
This base address has been selected in a completely arbitrary fashion.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The Armada XP Development Board DB-MV784MP-GP has a NOR flash device
connected to the Device Bus. This commit adds the device tree node
to support this device.
This SoC supports a flexible and dynamic decoding window allocation
scheme; but since this feature is still not implemented we need
to specify the window base address in the device tree node itself.
This base address has been selected in a completely arbitrary fashion.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Armada 370 and Armada XP SoC have a Device Bus controller to
handle NOR, NAND, SRAM and FPGA devices.
This patch adds the device tree node to enable the controller.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
- Kirkwood
- a couple of small fixes for the Iomega ix2-200 board (ether and led)
- mvebu
- allow GPIO button to work on Mirabox when running SMP
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.19 (GNU/Linux)
iQEcBAABAgAGBQJRZZxwAAoJEAi3KVZQDZAerwcIAKR1xRKuagtXvfij+xfVVRQ6
1G645hTIthFXmNiEeo3Y/mswHhVooZvu8SWh3o3J2Wsbnzeh+ch6jTsl+g6Tnb3E
KmRFU0mcalRmsyYsh4PH9nDi8/oWyP+i3ZytgfcMlsSPNiE+Ek35NdTTWMLCTT8V
MkGysVc8MWoOmMf47mNboy5UUUTXRdnSUJSjv1ubrsTK33LT7Ii9Ce+eoNvpvF+5
+6RenfRMzRSwkZf9AaCRPAhXISQKbMAwz6lKGo2GGAW+73Z+JclXXmiCfQ8pWie2
pfyqiEYigZFqe6Ly5BUtGoVfDjmOLDs+ATTUDOlOj0uaEc7pOwwKoAtpVRdck24=
=yK1f
-----END PGP SIGNATURE-----
Merge tag 'mvebu_fixes_for_v3.9_round3' of git://git.infradead.org/users/jcooper/linux into fixes
From Jason Cooper <jason@lakedaemon.net>:
mvebu fixes for v3.9 round 3
- Kirkwood
- a couple of small fixes for the Iomega ix2-200 board (ether and led)
- mvebu
- allow GPIO button to work on Mirabox when running SMP
* tag 'mvebu_fixes_for_v3.9_round3' of git://git.infradead.org/users/jcooper/linux:
arm: mvebu: Fix the irq map function in SMP mode
Fix GE0/GE1 init on ix2-200 as GE0 has no PHY
ARM: Kirkwood: Fix typo in the definition of ix2-200 rebuild LED
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Note that the branch has dependencies to two other branches:
- omap-devel-b-for-3.10 from Paul to get the AM33xx missing
hwmod and thus avoid a regression with Santosh's hwmod
cleanup including in this DT series [1]. It avoids breaking
bisect if this series is merged before Paul's fixes.
- omap-for-v3.10/usb branch to avoid nasty merge conflict in
omap3.dtsi and omap4.dtsi due to the DTS patches contained
in the USB branch because of a screw up by the unnamed person
typing this signed tag based on Benoit's comments.
[1] https://patchwork.kernel.org/patch/2366291/
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIcBAABAgAGBQJRY41OAAoJEBvUPslcq6Vz584QANm+lTNlS2+RYkRD/nUDtdS4
B4NZmeai/KBA/x4tApuI0wFmMPU57EU64K1SYSv/rP49Ohuxqf84POTLLFyhTxFC
0mBrffcRHFH480imZRpoJ+QwSvkreneyHs79ZbnB7OOd6tJC6njeex+Hp8uzCDXM
n0E6eOqOzGuNTT42BnyC1b9oM26/Tb7KMvkJbwuPEoyLIDR11h0r8+Dn5/fHpuYc
bVyTfRJfLCLfoLqheoW+BIuKtWT1ZjSzO1WNzRbrc6Ri78HTsOFxSKt2uA3lC1cx
tT5uaWKzYyo6ZV6uPTil6EIpYhDukpvncbwHw1n8g2gOQcPDngXw+zbNFDw7Vpq3
D4FbK4Lp/51scIQlmqAX31Wd/CvSlLLCCQzQ0JW6AznCx5OHOvfBDF9xMQZIlGGy
LoabMyILad7xYacVEvp1xyEMy3hX64laLf7Eu3GahiKrwvBMTKnbOqBODZZYKWwp
uqlSdUlkXTQ2aA7GQK0Dda+8xGcf603TLD5u20ZUEhXbdwmu91Ov++k1pOcoTFHx
qNLSu5SfUJW2VsEupw0DLsohnDQqGlkDYCo+m4AKwG1n4siASD12Y1z/DDaeNt09
WZZ5s4qi7vWcAMMnUcGQJdun2MVDGErCiTlg1VfmOtXmys/6f79g1W+Bj/4sMNqq
pbNDU9x/VzIvytxinzF5
=X5rc
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v3.10/dt-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt2
From Tony Lindgren:
Device tree updates for omaps via Benoit Cousson <b-cousson@ti.com>.
Note that the branch has dependencies to two other branches:
- omap-devel-b-for-3.10 from Paul to get the AM33xx missing
hwmod and thus avoid a regression with Santosh's hwmod
cleanup including in this DT series [1]. It avoids breaking
bisect if this series is merged before Paul's fixes.
- omap-for-v3.10/usb branch to avoid nasty merge conflict in
omap3.dtsi and omap4.dtsi due to the DTS patches contained
in the USB branch because of a screw up by the unnamed person
typing this signed tag based on Benoit's comments.
[1] https://patchwork.kernel.org/patch/2366291/
* tag 'omap-for-v3.10/dt-signed-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (69 commits)
ARM/dts: OMAP3: fix pinctrl-single configuration
ARM: dts: Add OMAP3430 SDP NOR flash memory binding
ARM: dts: Add NOR flash bindings for OMAP2420 H4
ARM: dts: Update OMAP3430 SDP NAND and ONENAND properties
ARM: dts: OMAP2+: Identify GPIO banks that are always powered
ARM: OMAP2+: Populate DMTIMER errata when using device-tree
ARM: dts: OMAP2+: Update DMTIMER compatibility property
ARM: OMAP: Add function to request timer by node
ARM: OMAP: Force dmtimer restore if context loss is not detectable
ARM: OMAP: Simplify dmtimer context-loss handling
ARM: dts: AM33XX: Corrects typo in interrupt field in SPI node
ARM: dts: OMAP4460: Add CPU OPP table
ARM: dts: omap4-panda: move generic sections to panda-common
ARM: dts: OMAP443x: Add CPU OPP table
ARM: dts: OMAP3: use twl4030 vdd1 regulator for CPU
ARM: dts: OMAP36xx: Add CPU OPP table
ARM: dts: OMAP34xx/35xx: Add CPU OPP table
Documentation: dt: gpio-omap: Move interrupt-controller from #interrupt-cells description
ARM: OMAP2+: hwmod: Don't call _init_mpu_rt_base if no sysc
ARM: OMAP2+: hwmod: extract module address space from DT blob
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Remove sunxi.dtsi and only use one dtsi for each SoC
- Various compatible renamings to be consistent with the other platforms
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRZDknAAoJEBx+YmzsjxAgxVsQAKZrcA+wcznKXjDIqYy2RS+J
cGW/aJIOtqt9mrTr5eBTfpUrDLKQ5EsxuAWDL4vskmKkp6BMSYCZkgVGrwSW1AQv
cNDCnIoHxGQaxtTdQA43wx8QNuaROIpXxQP/NUokGwWJzEUj5WZDcbQfnInBX9kW
Pd1UUSTMA4pYN483TW7D5Q6gXcazESrSM2PMClbQtn4Ji96cHbmkYRKETEdPQRv0
qehRrArQtIem9yFIx+ulA2i2EY8I1u67E8dWeKXNo3KlUVq21Nj4w8B2mtvboZXu
fSYG6To1Z7la+9ROzQHidKo9/gj3s47a7gUPJmmW0Eb/qoKATnkk0IcEFLk27kM+
yvMi+7ZLOX78E+7ecpzbQcCVjkEGbIcsfAiIvrHtqiKDftiXJOwPOUjJY9lKmn72
Ht+8QMIcX9W1L3yJIsA4smUYCw9DkQynOttOM3+WP0NI1/5gPsYkiXKNOWxlJzMS
0lrwd0mSmBe5CuXOCpRJ1OIfeas08AYIgexhU8wLaui2+OGh5MTD5XdF0YGbvK+9
7fdmpiwr28yTnVzIerqkce294yozTgGw5p3sxoDsfO6aox7G6JJMDKnVso0rys4O
oHVLSdk/gm10xYsLbYfiu1nev1FdzZP5XEkIh+McwZnYQsDE4S3OCc8tfFdYOxUE
XM10vZvCBobTs4GCNGam
=AIlR
-----END PGP SIGNATURE-----
Merge tag 'sunxi-dt-for-3.10-3' of git://github.com/mripard/linux into next/dt
From Maxime Ripard:
SunXi dt additions for 3.10, take 3
- Remove sunxi.dtsi and only use one dtsi for each SoC
- Various compatible renamings to be consistent with the other platforms
* tag 'sunxi-dt-for-3.10-3' of git://github.com/mripard/linux:
ARM: sunxi: dt: Update watchdog compatible string
ARM: sunxi: dt: Update interrupt controller compatible string
ARM: sunxi: dt: Update timer compatible string
ARM: sunxi: dt: Reorganize the dtsi
Signed-off-by: Olof Johansson <olof@lixom.net>
The ARM perf core code used to rely on the pmu node being
compatible with "arm,cortex-a9-pmu", even when the PMUs
of the different Cortex-A processors are not really
compatible... This is no longer required and actually
became harmful, so remove all the offending values
from Versatile Express DTS files.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
A series dealing with gpio configuration cleanup from Haojian Zhuang.
* 'armsoc/pxa' of git://github.com/hzhuang1/linux:
ARM: pxa: move debug uart code
ARM: pxa: select PXA935 on saar & tavorevb
ARM: mmp: add more compatible names in gpio driver
ARM: pxa: move PXA_GPIO_TO_IRQ macro
ARM: pxa: remove cpu_is_xxx in gpio driver
Signed-off-by: Olof Johansson <olof@lixom.net>
Since more driver names are added into platform id, do the same thing on
compatible names for DT mode.
Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
LaCie has released two products under the CloudBox name. The
netspace_mini_v2 machine is embedded in the oldest product. The cloudbox
machine is embedded in the newest one. In order to allow a CloudBox user
to select the right machine support, this patch adds some informations
to the netspace_mini_v2 Kconfig description. A comment is also added to
the dts file.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This patch adds DT board setup for the LaCie NAS CloudBox. The CloudBox
is a low cost NAS based on the Network Space v2.
Chipset list:
- CPU MARVELL 88F6702 1Ghz
- SDRAM memory: 256MB DDR2-800 (2x128MB x8) 400Mhz
- 1 Ethernet Gigabit port (PHY MARVELL 88E1318)
- SPI flash, NOR 512KB
- 1 push button
- 2 LEDs (red and blue)
There is no EEPROM and no USB ports embedded.
Note that this board must not be confused with the Network Space Mini v2
which is embedded in a previous LaCie product also named CloudBox.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRYugaAAoJEA0Cl+kVi2xqvi0QAKyF/UbDR6aOSIOoCzgm1iUC
+F9WvvCLyJdy0y09IKEbwM+aZyzsfC7vO/9wp58ROv1AhD9f1/yk1H+O8NRS668v
jt8RZlrL30ea0HkRjHRgTCS2sObCXG2pGOduX9i5XKCC4EnM9P/qNe4uJjziY8K8
FmAanWpJahe0E9szLnWDuF7hhsRkTpjrLWtYYmc1H4LXydoZnxEgGM3xjbqL+m4/
BPwlCrPtu/WsZzM7Tdx6fVIC2wryrwoH5e1EL3fI2IrWhreOtVWYzoTwUoSy7Xbz
ERjQoCt3yNVmPO1TwfS9nR/bc0+j8gsFuJRzN42PsP09JFQPVt8Q1o1cpIIHWgvZ
/pkJAsaBfbQgPOLNof5uHasPVSZYe38TIey782hYA0pmT1RCt46FuJ6zM9M0483q
4vysYCU/Vc3GOtAQOpsCNbsEMthRzjtjsJoZ5owDsCaiV+eNWC3VrWI2Wm1EO7Mn
FUthkBY58jPM/9BdFC67ZwBPtSSUhAeZpcUXkcaNj8pgw8Rvfcip/09Vy0Uh0Ef8
A5dYZec8CNyZKECspzUTlgwyK7xiWD0r3uyr4/a413qb1pr9zdOFlZeespT9bgfI
uD+tMPpJ+R9fK9BSbRw9FMx1Pe395vZRUmu9WepvQDwQDvoYSi/SVKBMYtn27Bsm
CD/r/wUs1ktL2rPNcXVz
=Os9U
-----END PGP SIGNATURE-----
Merge tag 'mct-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers
From Kukjin Kim <kgene.kim@samsung.com>:
add support exynos mct device tree and move into drivers/clocksource
* tag 'mct-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
clocksource: mct: Add terminating entry for exynos_mct_ids table
clocksource: mct: Add missing semicolons in exynos_mct.c
ARM: EXYNOS: move mct driver to drivers/clocksource
ARM: EXYNOS: remove static io-remapping of mct registers for Exynos5
ARM: dts: add mct device tree node for all supported Exynos SoC's
ARM: EXYNOS: allow dt based discovery of mct controller using clocksource_of_init
ARM: EXYNOS: add device tree support for MCT controller driver
ARM: EXYNOS: prepare an array of MCT interrupt numbers and use it
ARM: EXYNOS: add a register base address variable in mct controller driver
Conflicts:
drivers/clocksource/Makefile
drivers/clocksource/exynos_mct.c
[arnd: adapt to CLOCKSOURCE_OF_DECLARE interface change]
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Adds devicetree binding and documentation for the smc handler
Updates from V1:
- Created this separate patch for the DT portion
- Added SoC compatible to smc binding
Signed-off-by: Christian Daudt <csd@broadcom.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
This branch contains the majority of the device tree changes for Tegra.
Highlights include:
* Many changes for Tegra114, and the Dalmore board, to enable pinctrl,
SDHCI/MMC, PWM, DMA, I2C, KBC, SPI, battery, regulators.
* Adding or enabling suspend wakeup sources on many boards, and adding
suspend timing parameters, to support the system suspend patches.
* Adding clocks to the audio-related nodes, so that in 3.11, the audio
driver can pull these clocks from device tree rather than hard-coding
clock names.
* Some small DT fixes/cleanup.
This branch is based on the previous clk pull request.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRXv7mAAoJEMzrak5tbycxfzIQAMPNW66IgtRLDKat5R2ixBqp
2LE4qQnndwYvql54WeIHCHPm71mO0E6oOtss+0jmDh0nmeQ0D0CzxCrV1JjbFNJK
Eo9ayRdujCrYn3V3ru6k4NyVZa3keupCVKTJRwxGxRYqwXBxFLBPhzBiHhBoOi9W
lJZNUQ+MRa4YpTQgUa9xmVwHaPJZMoWs1WQwJMllFyWABTlP+/y3JmfyqQ0A+CGF
myToy57ZN6YDAoWxNw+dixRW7O0wk4kweVZuf3s+/Sg0FxuJL+FZgtPVD8DeeFxz
zhROxF2Cy75V9Z+48cECbjm0HxqBZAhkkomTOpL6eSMw61DCr4OzWLEi6A7ILO/Y
02kRDqbQ/IRL4Di7nvoKhY6wLg3AdZXyvZkf+W0bLu19WrHbah7ruba/9uTA72ZI
W7gx3QYKRrCvJOFNkeIHO84Lp7FEV60L/GYQgWXHTwozxP9PLmqg4bRSLX20rhPD
3Vi9zjpRJ9C2GstljVr+aORRn4A1QbWciYAkv2CCIIrh0xwm8YSclgWiTf95AVka
xmPp3fwhc3VZLGHhD1wpT5UJnzzZekBQzP0+QF6K+nSp7TMtPrTFuWwMCJybq463
vjagS6m7DDXNCTvJee+D/3dHkeDCgIPGGr0LbjopxB/FKsCevZWFOtNCJxkbi+t6
ojwrLwqs++Yq59pBFvee
=avad
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/dt2
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: device tree changes
This branch contains the majority of the device tree changes for Tegra.
Highlights include:
* Many changes for Tegra114, and the Dalmore board, to enable pinctrl,
SDHCI/MMC, PWM, DMA, I2C, KBC, SPI, battery, regulators.
* Adding or enabling suspend wakeup sources on many boards, and adding
suspend timing parameters, to support the system suspend patches.
* Adding clocks to the audio-related nodes, so that in 3.11, the audio
driver can pull these clocks from device tree rather than hard-coding
clock names.
* Some small DT fixes/cleanup.
This branch is based on the previous clk pull request.
* tag 'tegra-for-3.10-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: (25 commits)
clk: tegra: Fix cdev1 and cdev2 IDs
ARM: dts: tegra: add the PM configurations of PMC
ARM: tegra: add non-removable and keep-power-in-suspend property for MMC
ARM: tegra: whistler: add wakeup source for KBC
ARM: tegra: add power gpio keys to DT
ARM: tegra: keep power on to SD slot on Dalmore
ARM: tegra: add clocks property to AC'97 sound nodes
ARM: tegra: add clocks property to sound nodes
ARM: tegra: dalmore: add fixed regulator node
ARM: tegra: dalmore: add TPS65090 node
ARM: tegra: dalmore: add cpu regulator node
ARM: tegra: Add sbs-battery node to Dalmore
ARM: tegra: add DT binding for i2c-tegra
ARM: tegra: add SPI nodes to Tegra114 DT
ARM: tegra: add KBC nodes to Tegra114 DT
ARM: tegra: add aliases and DMA requestor for serial nodes of Tegra114
ARM: tegra: add I2C nodes to Tegra114 DT
ARM: tegra: add APB DMA nodes to Tegra114 DT
ARM: tegra: add PWM nodes to Tegra114 DT
ARM: tegra: fix the status of PWM DT nodes
...
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This branch contains most fixes and enhancements to the Tegra common
clock driver. The main new feature is a driver for Tegra114, which
coupled with later device tree changes enables many devices on that
chip, such as MMC, I2C, etc.
This branch depends on a patch in:
git://git.linaro.org/people/mturquette/linux.git clk-for-3.10
Mike has stated that this branch is stable, and is aware of this
dependency and merge.
Mike's branch is based on v3.9-rc3, which includes a USB change which
causes problems on Tegra. That problem was fixed in v3.9-rc4. Hence,
this branch pulls in v3.9-rc4 to ensure bisectability as much as
possible.
This branch is based on v3.9-rc4, followed by a merge of previous Tegra
"soc" pull request, followed by a merge of clk-for-3.10.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRXv21AAoJEMzrak5tbycxRAsQAK0U+y5RWQJVR1wQYAuw2AhP
wX/5BcpDWhH4HrFKUGp0NrVvASHv706bbvnbSsUFeKtMGqRFaiOW756B80R0mnIG
xjILt64A7kXCMRJeUoXhdJtXQfzNbgGqKUsBJknVHHBw72OhYBXop5ihMWqI9Kk6
yEsr+/CB9VlV7ZbiLaAXelKuh7oSdaG8ada6qFeRCJhpVVdrFP4aGYkt0iipOBAU
GBnoISkmp/ocExXlC2n5nIEE0rukJ+KyPwR1bY4+Yj2ZFXL24Nczh8cEZFrV2yz8
Sa+/6qrowGTw/wPUK+R8+vCvfzKdCYG6rrnyWwwb9UbsP6LAcYz/WB+q0puPZeuZ
2T82osvbFxjGMYWnR2Uc4CRTid1ophxGWRh810fg1UGMIK4HRMmCxrV6D5Af3FPz
rXNEf3CCd4iKJQBBYXZAR1TNn5vSX/USeqXvb0810qwe2jwJsiZP5FhZH5Ogfvod
W825UpmS1zmEz4MI65/CE3fxZ8SsM9Khdp4tl25YfTJ5RMjShzRdsl4BATa8nXpr
nDfBb8pE2s6hyUWXbnNHw+k4jmQMreEHp+guE6LWYmqBcVlrJpq5joIHqwRl4dyD
iri9unSvbOAN+fJMXti0uW8zruitfbZgfzwRwwFy1TP0DPQBWVWwN7AABFlItD6M
pWI9Uf3VL5wAHZmWe6Gq
=Hasc
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-3.10-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/drivers
From Stephen Warren <swarren@wwwdotorg.org>:
ARM: tegra: clock driver development
This branch contains most fixes and enhancements to the Tegra common
clock driver. The main new feature is a driver for Tegra114, which
coupled with later device tree changes enables many devices on that
chip, such as MMC, I2C, etc.
This branch depends on a patch in:
git://git.linaro.org/people/mturquette/linux.git clk-for-3.10
Mike has stated that this branch is stable, and is aware of this
dependency and merge.
Mike's branch is based on v3.9-rc3, which includes a USB change which
causes problems on Tegra. That problem was fixed in v3.9-rc4. Hence,
this branch pulls in v3.9-rc4 to ensure bisectability as much as
possible.
This branch is based on v3.9-rc4, followed by a merge of previous Tegra
"soc" pull request, followed by a merge of clk-for-3.10.
* tag 'tegra-for-3.10-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra:
clk: tegra: fix enum tegra114_clk to match binding
clk: tegra: Remove forced clk_enable of uartd
ARM: dt: Add references to tegra_car clocks
clk: tegra: devicetree match for nvidia,tegra114-car
clk: tegra: Implement clocks for Tegra114
ARM: tegra: Define Tegra114 CAR binding
clk: tegra: Workaround for Tegra114 MSENC problem
clk: tegra: Add flags to tegra_clk_periph()
clk: tegra: Add new fields and PLL types for Tegra114
clk: tegra: move from a lock bit idx to a lock mask
clk: tegra: Add PLL post divider table
clk: tegra: introduce TEGRA_PLL_HAS_LOCK_ENABLE
clk: tegra: Add TEGRA_PLL_BYPASS flag
clk: tegra: Refactor PLL programming code
clk: tegra: provide dummy cpu car ops
clk: tegra: defer application of init table
clk: tegra: Fix cdev1 and cdev2 IDs
clk: tegra: Make gr2d and gr3d clocks children of pll_c
clk: tegra: Export peripheral reset functions
clk: tegra: Fix periph_clk_to_bit macro
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adds a cpus/cpu@0 node for imx51 with default operating
points for the cpufreq-cpu0 driver. There is currently no regulator
support, so the voltages are 0 here.
Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This adds the PATA device and the pinctrl group for to the i.MX51 dts.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>