Enable the configuration which keeps the CPR sensors active
when LDO is in auto-bypass mode. The sensors only stay
bypassed when LDO is regulating.
CRs-Fixed: 1027469
Change-Id: I6b8c2a3fd8fe22a64b6d24c458a7c60641195e45
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Add a DT property to adjust the open-loop voltage for the LDO
corners, this will be useful for voltage adjustments after
LDO characterization.
While at it, update the LDO MIN_VOLTAGE value for 8953.
CRs-Fixed: 1010052
Change-Id: I7479ebbf0ac7253eb355246d36f15a91ce96cd9a
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Change the LDO_EN bit definition for GFX LDO on MSM8953 and
remove the LDO bypass fusing logic as it is not supported.
While at it, add the debugfs node to disable ldo_mode.
Disable LDO mode: echo 1 > /d/msm_gfx_ldo/ldo_mode_disable
Enable LDO mode: echo 0 > /d/msm_gfx_ldo/ldo_mode_disable
CRs-Fixed: 989270
Change-Id: Ibc7aa921380e89da4963571408b89bc417dec245
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Remove all reference to internal code name msmtitanium
and replace them with msm8953, as there is an official
announcement for msm8953 SoC.
Change-Id: If99bbf20756a524c5a3bd7ba49366c29e158289e
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
Enable the PWMs mapped to the RGB module and specify
the lpg-lut-size.
While at it, enable the haptics and flash node.
Change-Id: I83cf7882d1abb96c343973894c2a7ab3f932dfb1
Signed-off-by: Anirudh Ghayal <aghayal@codeaurora.org>
Currently one gic interrupt is mapped to one mpm pin.
Support multiple mpm pins to get enabled with single irq
with client drivers using enable_irq_wake API.
Change-Id: Iea575079c24ed0986b74fb6e86c7b8100474f19e
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
The IOVA allocator used by these calls supports IOVA address
zero so properly handle IOVA address zero.
Change-Id: I012452d4cf3534dfb79e6deb15b7ff74f5e3bb40
Signed-off-by: Liam Mark <lmark@codeaurora.org>
The smb138x device has been duplicated across many board level files.
Refactor the smb138x device to a separate dtsi file so it can be
included in any board level files.
Change-Id: I9520595f2a40e197ad2227a8391bed79412b19f8
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Add the QSMMU device nodes that is used for address translations on
msmtriton.
Change-Id: Iff419eef01ce58fe540e8f3bd7c8a1553a340d28
Signed-off-by: Charan Teja Reddy <charante@codeaurora.org>
This enables the assertion of CX ipeak mitigation during
MSS restart.
Change-Id: I113037aabafeacba7079d530ca859833f475f649
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
Clear the CX iPeak bit if it was set by MSS before crash.
MSS sets this bit if it was in Turbo state. In a situation
where all the votes were set (including MSS), It would have
resulted in CDSP throttling. But when MSS is in crashed state,
It cannot be cleared by MSS, So PIL needs to do this. It
would allow possible clearance of throttle state.
Change-Id: Ia561436a362dc5b0e1cb22c30ce9f5b8bb027a1f
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
Add support of PMFALCON PMIC and enable PMIC specific
workarounds in charger driver.
Change-Id: Id21fde25b9b741b9cb570ab5348959715e53e6cb
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
Charger and Fuel Gauge peripherals are on slave-id 0. Update
charger and FG device node to reflect the same.
Change-Id: I99d1e47a20fd5c3304249aa4f6c64e5967874312
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
Correct the required regulator node for Modem PIL for MSMFALCON Interposer
and also enable Modem pil.
Change-Id: I106ae84303f6a0b1de13ce564600f7788dd382b3
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
Add aggre2_snoc_axi_clk handle in USB3 node which is required to be
voted from USB driver before enabling USB core clock for msmfalcon.
Change-Id: I190233c1fc483f3d519e09784ed19e6c09ccb2bd
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
It is required to put/get vote for aggre2_snoc_axi_clk before turning
ON USB core clock for read/write transactions to be successful over
NOC from USB->DDR. Hence add support for voting aggre2_snoc_axi_clk
before enabling USB core clock as part of exiting low power mode.
Change-Id: Icb17d65fbbe49d93971905948c3dc9ab17de152a
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
Add initial version of msmfalcon GPU properties.
This is needed to support Graphics driver functionality
on msmfalcon target.
Change-Id: I7b0ccdc9a4aafef8f91ae8194f5f89838b5acbee
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
Correct the required regulator node for Slpi PIL and also enable Slpi
PIL.
Change-Id: Ia9cb83e7f7f5c74737ddf6f6987b5acfae11e224
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
Correct the required regulator node for Lpass pil for MSMFALCON Interposer
and also enable Lpass pil.
Change-Id: I69d8cdddf847c3f327b03884eba7c976349ac08c
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
Change ufs regulators for msmfalcon interposer QRD. Reduce
maximum power load that can be drawn from vcc and vccq2 supply.
Add the required minimum and maximum voltages of ufs phy.
CRs-Fixed: 1093028
Change-Id: Ic534c518116c18e98bd4e421365831400ef967f4
Signed-off-by: xiaonian <xiaonian@codeaurora.org>
Disable CONFIG_CRYPTO_DEV_QCE flag from defconfig,
which is not required for msmfalcon.
Change-Id: I29cf58d7069d758239c2f5712e70e94be20a42d3
Signed-off-by: Brahmaji K <bkomma@codeaurora.org>
Add qrng device node with all the necessary parameters,
to enable the qrng driver on msmfalcon.
Change-Id: Ibf1eb081e58e8bf653f68cbcdfb894b6d8dab167
Signed-off-by: Brahmaji K <bkomma@codeaurora.org>
Add tz-log device node with all the necessary parameters,
to enable the TZ log driver on msmfalcon.
Change-Id: I83b13e60c46ed7565fe202a2d1ba8d2b8c06bdcc
Signed-off-by: Brahmaji K <bkomma@codeaurora.org>
Add qcrypto and qcedev device nodes with all the necessary
parameters, to enable crypto drivers on msmfalcon.
Change-Id: I9d9d4eeeb5ee41ff8a61676b19bb01b9280ae7ca
Signed-off-by: Brahmaji K <bkomma@codeaurora.org>
