Gamut may not be present in all targets. The device tree
offset for gamut can indicate presence of block on target.
Program gamut if gamut offset is present in mdss device
tree. Also allow parsing of further PP block offsets in
device tree even when gamut entry is absent.
Change-Id: I87d057190dcfdb3cb57d88ea3b6d68f02deac5fa
Signed-off-by: Krishna Chaitanya Parimi <cparimi@codeaurora.org>
The HDMI transmitter core can be used to program the sample
present value of the audio sample packet. The sample present
value is determined in the audio driver and sent as part of
the parameters to the audio setup interface.
Change-Id: I8d580f95467343328ec0d24efc48dabf8a41ad49
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
[cip@codeaurora.org: Removed sound/soc/codecs/msm_hdmi_codec_rx.c changes]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Set the dmap to correct translated physical address during
dsi_alloc_buf and also include GPF_DMA flag during kzalloc
to ensure the address allocated is 32-bit.
Change-Id: I5b0445eda6c4a93ca321ca9469626ecce4a167e9
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
The previous AD backlight calculation formulas assume that the
BL_LIN, BL_LIN_INV and BL_ATT LUTs are monotonically increasing,
which can cause miscalculation when non monotonic LUTs are used.
This patch fixes the problem by removing the above assumption.
Change-Id: Ifee9dc067de8c6dbd24aac407ba702a13241f782
Signed-off-by: Ping Li <pingli@codeaurora.org>
The backlight update between unblank and kickoff
call may result in garbage/snow screen on panel
based on panel ram initialized status.
For ex:
-> Unblank the panel - black frame transfer start,
panel is on but ram is still
uninitialized.
-> backlight update - turn on the backlight. It will show
data from uninitialized ram because
frame transfer is not complete yet.
This can be avoided by blocking the backlight update
request between unblank and first frame kickoff. This
gives guarantee that panel has valid data to display
when backlight was turned on.
Change-Id: I09c707cd10acd53bd6aa0935885269ffc5aec649
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Use proper timeout values for polling scrambling status from sink.
Clear the interrupts and stop polling after timeout if scrambling
status is not updated by sink indicating it has not detected
scrambling signal.
Change-Id: I3cac01ef261ee958fd0bbecf88edde5305b20ee7
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Change initial line buffering calculations for DSC as per updated
recommendations. Without enough buffering, in certain conditions DSI
underflow can be observed.
CRs-fixed: 932124
Change-Id: Ia1b04558104061020981ade9a9c86777902360c2
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Implement timers as per HDCP 2.2 standard for every message exchanged
with sink. The standard provides round trip timeout values for each
transaction. Use these timeout values and consider it as authentication
failure if timer expires.
Change-Id: I1fb647b70b8c3aafaeb6e91fd3f636d387247133
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
The pipe_mapped and pipe_next_map are used to keep track of the
pipes staged in the mixer. The former is used to keep track of the
pipes which are currently used by the hw while the latter keeps track
of the pipes staged for the next frame. During overlay off, this seems
to be off track as only the pipe_next_map would have the updated status
and both would be in sync only after the next commit cycle. This would
cause the mixer to check for invalid pipes during the ctl_stop. Fix the
pipe_mapped state to have the current staged pipes during overlay_off.
Change-Id: I554f753441c54ceedb9dec809effc1119063e59d
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
MDSS driver uses file pointer to track the client
and associates the resources based on it. There can
be a race condition between to clients ioctl call
and it can lead to track resources with wrong
caller. This can leads to release/reallocate
resources prematurely to other client which may
show blank screen on display.
One good example client call flow is:
<-step:1-> fb_open by client-X
<-step:2-> fb_open by client-Y
<-step:3-> fb_ioctl by client-X
<-step:4-> fb_ioctl by client-Y
<-step:5-> fb_ioctl by client-X
<-step:6-> fb_close by client-Y
If step-5 and step-6 both are running on two different
CPUs at same time then it may overwrite the file node
unintentionally.
This change tries to pass the file pointer as one of
the argument to IOCTL call. It avoids usage of mutex
lock to support the concurrent calls.
Change-Id: I0bfd76358c80892c8e4f56298bce6c33b4132550
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Register debugfs node to read from and write to the panel command
data type. The default data type is DCS_LONG_WRITE 0x39.
Give following command in adb shell to read panel register:
cat /sys/kernel/debug/mdp/panel_cmd_data_type
To write panel command data type:
echo "command_data_type" >
/sys/kernel/debug/mdp/panel_cmd_data_type
Change-Id: I6dbe5bccb3142e93400825eddf7f05180acfc710
Signed-off-by: Yang Xu <yangxu@codeaurora.org>
By reusing pipes from cleanup pool, there is no need to
block user client while commit with cleanup is in progress.
This allows async calls from user space during prepare
cycle.
Change-Id: I688196320ed5ffad36b9f09b89fd512035887d6d
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Current driver has an optimization where if pipe parameters are not
changed between consecutive updates then it will skip pipe's HW register
programming. However when partial update is enabled and ROI is changed
compared to previous update, pipe's HW programming should not be skipped
because HW is programmed with stale ROI for that given pipe. Fix this by
forcing pipe HW programming update if ROI is changed.
Change-Id: Iebff043ecbb35b22ffbe344bdffa830602437252
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
When 2 soft slices per DSC encoder without merge is used, HW expects
certain DSI pixel clock to MDP clock ratio. If not maintained, DSI can
underflow. This happens if full-frame is split into 4 slices, thus
requiring 2 DSC encoders, 2 soft slices per encoder. Now if partial update
frame is left-only or right-only with 2 slices then normal topology would
dictate using 1 DSC encoder with 2 soft slices. However during partial
update, we don't change the pixel clock, but mdp clock is reduced because
less number of pixels needs to be processed. This changes the ratio
mentioned earlier and DSI underflows. To fix this, either we increase the
MDP clock rate or change the topology such a way that we use 2 DSC
encoders with 1 slice each. Implement later option to avoid increasing
MDP clock.
Change-Id: Ia37d8045baefcd1e680902446b4725d279db6a89
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Any smart panel with DUAL_LM_SINGLE_DISPLAY split mode with support for
partial update requires runtime topology changes when update is using
only one layer mixer. Specifically, when right-only partial update is
needed, MDP topology needs to switch to ping-pong associated with right
layer mixer and disable left layer mixer path. Add changes to support
these use-cases dynamically.
Now when Display Stream Compression (DSC) is used with this split mode,
there are certain restriction from HW when switching from left+right
update to right-only update. During such scenarios we cannot use right
layer mixer based data path and have to use left layer mixer based
data path. Add quirk based logic to use this mode.
Change-Id: Ic450cab4762337c94a5b1cb14b1d979a83fceee6
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
ich_reset override should be used only when partial update is enabled
where full frame and partial frame have different number of slices.
Since it is not dependent on panel, remove its configuration from
panel device tree and dynamically configure based on current frame
information.
Change-Id: Ia7d66e4a3e1b8bb1bab71e6a2d24eb58e00c238c
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
[cip@codeaurora.org: Removed .dtsi updates]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
When Display Stream Compression (DSC) based smart panel is used, MDSS
can drive data to panel in various different data path topologies.
Now when partial update is enabled, along with change in data path
topologies, DSC configuration also changes, i.e. number of slices
per line, number of encoders used, picture size etc. Enable left+right
or left-only partial update for DSC based smart panels.
Change-Id: I03b5eb6c7f0b010078ccc0112d8ce3aca2da6b7b
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
[cip@codeaurora.org: Resolved merge conflict]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Fix FPS calculation when a new resolution is found in DTD
of EDID of the sink.
Change-Id: I5bb168f269a7328331884591a7d882496a6f6ece
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Update audio routing based on minimum encryption level requirements.
In case current HDCP status is different than what is required, do not
switch audio to sink and set avmute. If required level is minimum,
route audio to sink and unset avmute.
Change-Id: Icef9d4901682d774c3ace95c6dbe6b8fe67eac0f
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Make DDC hardware to poll for rxstatus during link integrity
check and acknowledge corresponding interrupts. Stop polling and
wait for timeout on getting new message, re-authentication required
or message ready interrupts based on rxstatus.
Change-Id: Ie8b1bc1b700589196f41b00ceb759458102f4064
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Validate current hdcp lib state before starting new hdcp session.
Double buffer the sink message and protect its access with mutex
to handle fast re-authentication requests.
Change-Id: I039b1a0c818a2e66eef583afb15420ce8587a75c
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Enable both software and hardware interrupts for DDC to
properly check for DDC engine being idle before any new
DDC transaction.
Change-Id: Iaab95483954e76397620a9f708982de060318d8a
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Calculate timeout values in terms of hsync with respect to resolution
timing. For a given timeout value, calculate number of lines that will
take that much of time to be transmitted to sink. Use that value to
program the hardware for timeout.
Change-Id: I9606180d4c9b2d666dbac3d807f5bb61b84af68e
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
DSC pkt_per_line is not mapping to register directly.
value 0 is for 1 pkt, value 1 for 2 pkt and value 2
is for 4 pkt. 3 pkt per line is not support.
Change-Id: I43ff34018668feb7a52eaa8f4b2de632fc9ab59b
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
When ping-pong split mode is used, there is only 1 layer mixer is used.
Thus fb_split should be 0. However, current implementation incorrectly
reports fb_split which leads user-space to split layer into 2 pipes. But
in low tier chips number of pipes are less and this leads to display
boot-up failure. Fix this by sending lm_width as 0 when ping-pong split
is used.
Change-Id: Id7feb1a3fd1932e68bc910c7e7ecd3dcdf63cb5e
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
If ctl reset is called from rotator, ctl's mfd is NULL.
This might cause NULL pointer dereference leading to
kernel panic. Fix this by adding required check.
Conflicts:
drivers/video/msm/mdss/mdss_mdp_ctl.c
Change-Id: Icbd3e2e3ffc7cc0521222185d30ae0ca6adad5c4
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
With current implementation, vsync handler is never removed
in case of shell stop if the call doesn't come from HAL. Due
to this in certain cases the vsync ref count is unbalanced.
MDP driver should ensure that the vsync handler is always
removed explicitly during shell stop. Fix this issue by using
separate variable for SLAVE ctx and using MASTER ctx for
removing vsync handler.
Change-Id: I281b9db0623f9760efea5b2ceb978e648083f156
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
This change updates the enable sequence for DSI 28nm PHY
as per HW recommendation.
Change-Id: I9d294e807a40110bfd6c48243fc41b402fcc539d
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
When the phone is in suspend mode, the panel turns ON and
OFF whenever it receives the message for ambient display.
There are cases whenever the Power Key is pressed, it skips
the Panel ON because already the state of the Panel is ON
and the esd_rdy didn't turn to true, which was set to false
during Panel OFF event. This result in ESD being disabled
sometimes when we coming out of ambient mode. Hence set
esd_rdy to true once during bootup and never set this back
to false.
Change-Id: I0cb4d7f02e0018125b6886651be99e93551f3301
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Dsi errors happen at interrupt context while xlog
dumps can only be called at normal priority. This change
makes sure that xlog registers dumps and panic happen
from a work queue during dsi erros to prevent slow
path errors.
Change-Id: Ib9928d653221d0dbb0b87a5965ef3c4b20ebb662
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Most of the DSI panels do not support refresh rate lesser than 48.
So change the default value to 48.
Change-Id: Id47fe3488d7cd85b1eefaea18f3a7b9e6e8b3e31
Signed-off-by: Prashant Nukala <pnukala@codeaurora.org>
Since DFPS mode can be dynamically configured through device node,
shadow clocks used by DFPS clk mode need to be initialized during boot
time regardless the default DFPS mode specified in device tree.
Change-Id: I580a05ed62a2207666ea6569abbdf588a4f8d39d
Signed-off-by: Huaibin Yang <huaibiny@codeaurora.org>
Signed-off-by: Vishnuvardhan Prodduturi <vproddut@codeaurora.org>
Allocate buffer for panel register results, which is
to support any length of register reading request.
Change-Id: I67905b3771ecfe5d56fe29928b2953b8435f1d71
Signed-off-by: Yang Xu <yangxu@codeaurora.org>
Bringup 2 instances of ADV7533 for 8996. Change all register writes
from constant to pdata variables. Move the DBA init from
mdss_dsi.c to mdss_dsi_panel.c.
Change-Id: Ib0fc9f7c2348efa04a44bc021cb50973e90d7f22
Signed-off-by: Siddharth Zaveri <szaveri@codeaurora.org>
[cip@codeaurora.org: Removed spurious drivers/video/msm/Makefile change]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Prevent accessing memory beyond buffer size. Prior to this check
rotator was page faulting trying to handle invalid requests, in which
offset + region of interest size was greater than the image size.
Change-Id: Ifffed0e908b29fb6e326314ec1eda148bb72db64
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
When framebuffer device is released, the AD status variables need
to be reset.
Change-Id: I7240a43949b429214cc8e0b4fa7c59823aeafb87
Signed-off-by: Ping Li <pingli@codeaurora.org>
During MDSS DSI controller initialization, program the DSI HS
timer value with the recommended value from the DSI h/w team.
This is needed for proper trigger of DSI HS timeout errors.
Change-Id: Ia83a5abd901ec7d632cb9ad8588249a5a64d4d1f
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
While exiting ULPS, there are instances where the phy incorrectly
reports an error causing the logs to be flooded with the error prints.
Disable printing such error message during such cases only.
Crs-fixed: 800136
Change-Id: I8fd321f57f5c00910e2b0637d31da0dc7f9d88b2
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Signed-off-by: Vishnuvardhan Prodduturi <vproddut@codeaurora.org>
All clients need to call register API exposed by DBA module to check
if the down stream transmitter driver is configured or not. In case
DBA is not enabled, define a null register function which returns
a NULL pointer to let the clients know of non availability of DBA.
Change-Id: I2b6066babe5a7e464a31752720da8f299997e977
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Signed-off-by: Siddharth Zaveri <szaveri@codeaurora.org>
Add driver for ADV7533 to support DSI to HDMI output.
Configure the ADV7533 via I2C for audio/video setup.
Change-Id: Iec0b922e1257d6974ea1755b49a6087f85eb8499
Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
Signed-off-by: Siddharth Zaveri <szaveri@codeaurora.org>
[cip@codeaurora.org: Moved adb7533.c location]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Add display bridge abstraction driver to provide an abstract interface
for different types of bridge chips used on MSM platforms. This
interface allows driver development for bridge chips from different
manufactorers while allowing users, of the funcationality provided by
these bridge chips, to re-use the same code across different boards.
Change-Id: I64457e3a44479a3b1be5482691d4727a86dc9b87
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>
Signed-off-by: Siddharth Zaveri <szaveri@codeaurora.org>
[cip@codeaurora.org: Moved file locations]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
If userspace tries to set the same autorefresh enable value as before
do not return an error, since it is not, and bail out silently.
Change-Id: If2699817dc5cb06dd8182e5125c1ae868c925ddf
Signed-off-by: Saurabh Shah <saurshah@codeaurora.org>
Currently, RESET event is being issued from commit which
assumes panel power on has been successful. In case RESET of
the panel fails, this error needs to be propagated back to
unblank to avoid display commits.
Move issuing of RESET event to panels to unblank to detect
panel power on failure and stop the display thread.
Change-Id: Id13cc479b6a837e0c28a1504bda9f23e0c251f45
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Vishnuvardhan Prodduturi <vproddut@codeaurora.org>
If continuous splash screen feature is disabled and ULPS during suspend
feature is enabled, DSI phy initialization does when device is booting
up, due to incorrect checks in the current implementation. Fix this issue
by ensuring that DSI phy initialization is always done when DSI interface
is turned on.
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Change-Id: Icdc90eef8d5f3380b47f67268249eb670f8ca824
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
DSI phy reset and initialization should only be done when as part of
the power up sequence. This can happen at two different places:
(1) During bootup or resume sequence
(2) When exiting idle power collapse in static screen
The checks in the current implementation to ensure the above make use
of the panel blank status. However, it is possible that the DSI clocks
can be toggled even after panel has been blanked. This may result in phy
init sequence getting called resulting in spurious transitions on the
DSI lanes. Fix this issue by modifying the existing sequence
appropriately.
Change-Id: I1f67b24058b3c98fb4472867c0421ae47fdcd9c7
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
acquire pipe before overlay start so that splash cleanup
can happen in overlay start.
Change-Id: I1ef3dbabf264925fee2eb903beed183eba335bb2
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Anusha Koduru <kanusha@codeaurora.org>
