Enable CoreSight abort for msmcobalt. CoreSight driver will
dump any trace present in the current sink in case we hit a
kernel panic, user fault or an undefined instruction.
Change-Id: Iff2fdfb547617425182429d95fb1d3b9a2e4321f
Signed-off-by: Satyajit Desai <sadesai@codeaurora.org>
This reverts commit 9d6fd2c3e9 ("Merge remote-tracking branch
'msm-4.4/tmp-510d0a3f' into msm-4.4"), because it breaks the
dump parsing tools due to kernel can be loaded anywhere in the memory
now and not fixed at linear mapping.
Change-Id: Id416f0a249d803442847d09ac47781147b0d0ee6
Signed-off-by: Trilok Soni <tsoni@codeaurora.org>
Add the audio codec as a child node of the MSM External display
node. The audio codec probe will happen after the External
display probe, and will allow the audio codec to register with
the External display independently of the display interface(s)
that will the added after a hotplug event.
Change-Id: I481e475ceff2ea0a07a0dfc4083526982674954c
CRs-Fixed: 1009284
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
Update power attributes for cpu and cluster's low power modes based on
the measurements on the device.
Breakeven points for v1 hardware:
Power Cluster -
Min us Max us Mode selected
83 1810 c1
1810 c3
Note: C2d is disabled in v1
L2 - Power Cluster
Min us Max us Mode selected
99 975 d1
976 3398 d2d
3399 9182 d2e
9183 d4
Perf Cluster
Min us Max us Mode selected
86 1704 c1
1704 c3
Note: C2d is disabled in v1
L2 - Perf Cluster
Min us Max us Mode selected
99 905 d1
906 3380 d2d
3381 9418 d2e
9419 d4
CCI
Min us Max us Mode selected
16744 e3
Change-Id: Iaf9930c0589e193c8a366ff44808d75c6d6b360b
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
DEEP-NAP and SLEEP states are not used in targets of previous
two generations. They are neither saving GPU power, nor saving
system power. Remove to reduce maintenance overhead.
CRs-Fixed: 1053516
Change-Id: If2fc2701548f90bb7ea9559a87752e13a7b0f736
Signed-off-by: George Shen <sqiao@codeaurora.org>
For WLAN hardware to enter low power mode, LDO25 voltage needs to
be at 3.1V. Change the regulator node to add this change.
Also for icnss driver votes for LDO7, LDO17 and LDO25, use pin
control regulator votes.
CRs-fixed: 1059101
Change-Id: I894631f6085410bd9961a0e00ca5eb2cd7d0c5bd
Signed-off-by: Prashanth Bhatta <bhattap@codeaurora.org>
Hardware characterization has shown that ROs 10 and 12 should be
used along with RO 13 on MSMCOBALT v2 for the highest VDD_GFX CPR
corner (Turbo L1). Specify their target quotient values.
Change-Id: Id2084fd8913468372ad78ecf0d41427171f87bab
CRs-Fixed: 1054539
Signed-off-by: David Collins <collinsd@codeaurora.org>
Updating the GPU SMMU settings to match the settings
used during pre-sil testing.
Change-Id: I70e0b87c3575f5778726ae2855d68bf0e560206a
Signed-off-by: Jonathan Wicks <jwicks@codeaurora.org>
Set the status property of the qcom,memlat-mon-cpu4 device. This is
required for partial binned devices.
Change-Id: I246a5f5149e492aba4f7c3920296d4bd3d873de0
Signed-off-by: David Keitel <dkeitel@codeaurora.org>
IPA-driver should request for aggre2_noc_clk
via bus driver, add entry in dtsi.
Change-Id: I98726deff99b373344fe75f8bdcb11fcad83e621
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Compile Video driver as a Loadable Kernel Module
on msmcortex.
CRs-Fixed: 1058390
Change-Id: I166e3e3854439c8ae15fd1e5a10e671da76ef044
Signed-off-by: Chinmay Sawarkar <chinmays@codeaurora.org>
Update the Display-Port PHY and PLL configuration
with the recommended settings. Remove the
support for 9.72Ghz VCO frequency. Update the divider
settings to support the new frequency plan.
Update the Phy Aux settings and voltage/pre-emphasis
settings according to recommended configuration.
Change-Id: Ic4d206da3dc6b45214e7601e7556cfb0bef81a7d
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
The config option has been removed. Update all defconfigs to reflect
that.
Change-Id: Ia1aa0405e8d7c7c48fe8023691b57fba00c6a22b
Signed-off-by: Syed Rameez Mustafa <rameezmustafa@codeaurora.org>
Add DCVS plan to support new GPU frequencies and voltage corners
on msmcobalt v2.
CRs-Fixed: 1056661
Change-Id: Ie0bde4d908189da86077b69be52c51f2a35596a8
Signed-off-by: George Shen <sqiao@codeaurora.org>
Add initial device trees for msmcobalt QRD SKUK board.
Change-Id: I9426d3651c704fbef302c6d49170c9e996cb9179
Signed-off-by: Xiaogang Cui <xiaogang@codeaurora.org>
Get msmfalcon defconfigs up to date with msmcobalt
defconfigs, in order to bring in all the latest changes.
Change-Id: Ia670dab963bd337bf3aa395e15f4ec8e8f213e1c
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
Enable smcinvoke driver so that TZ apps and client can communicate
using new MINK architecture.
Change-Id: I4e869d276ce4e8ecfe35a9ffe6892a6b586fe372
Signed-off-by: Dinesh K Garg <dineshg@codeaurora.org>
Add qfprom and hdcp register addresses to display port
device so that it can run the hdcp 1.x protocol.
Change-Id: Ib28eb08cc3c8a45a0e87ae1c4f84c904e66652f6
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Add trace events to control aborting CoreSight trace
dynamically based on module parameter.
Coresight driver will dump any trace present in the current sink
in case we hit a kernel panic, user fault or an undefined instruction.
Change-Id: Iee1ccf5cbd7b767753a3115c0570e63fbe2aa8f3
Signed-off-by: Satyajit Desai <sadesai@codeaurora.org>
Current implementation doesn't take care of multiple regulator
and clock voting. Add changes to take care of multiple regulator
configuration as well as clock configuration through device tree.
CRs-fixed: 1054503
Change-Id: I049821c960e4b53901cc2a07290d6ccedb8b971b
Signed-off-by: Prashanth Bhatta <bhattap@codeaurora.org>
