Commit graph

15273 commits

Author SHA1 Message Date
Marek Szyprowski
3f6065dd9d ARM: S5P: add required chained_irq_enter/exit to gpio-int code
This patch adds chained IRQ enter/exit functions to gpio interrupt
handler in order to function correctly on primary controllers with
different methods of flow control.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-08-19 20:57:38 +09:00
Marek Szyprowski
70b0e82bc7 ARM: EXYNOS4: add required chained_irq_enter/exit to eint code
This patch adds chained IRQ enter/exit functions to external interrupt
handler in order to function correctly on primary controllers with
different methods of flow control.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-08-19 20:57:37 +09:00
Marek Szyprowski
995b528ad2 ARM: SAMSUNG: Add chained enrty/exit call to timer interrupt handler
This patch adds chained IRQ enter/exit functions to timer
interrupt handler in order to function correctly on primary
controllers with different methods of flow control.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-08-19 20:57:37 +09:00
Abhilash Kesavan
f98d429d7a ARM: S3C64XX: Fix build break in PM debug
When S3C_PM_DEBUG_LED_SMDK is enabled for suspend/resume debugging, the following
compilation error occurs:

arch/arm/mach-s3c64xx/pm.c: In function 's3c_pm_debug_smdkled':
arch/arm/mach-s3c64xx/pm.c:41: error: implicit declaration of function 'gpio_set_value'
arch/arm/mach-s3c64xx/pm.c:41: error: implicit declaration of function 'S3C64XX_GPN'
arch/arm/mach-s3c64xx/pm.c: In function 's3c64xx_pm_init':
arch/arm/mach-s3c64xx/pm.c:184: error: implicit declaration of function 'gpio_request'
arch/arm/mach-s3c64xx/pm.c:188: error: implicit declaration of function 'gpio_direction_output'

Fix the error by including linux/gpio.h

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-08-19 20:57:36 +09:00
Abhilash Kesavan
7e1291dea2 ARM: S5PV210: Fix build warning
Fixed the following warning for S5PV210.

arch/arm/mach-s5pv210/pm.c: In function 's5pv210_pm_add':
arch/arm/mach-s5pv210/pm.c:139: warning: assignment from
incompatible pointer type

Also, staticized the function.

Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-08-19 20:57:35 +09:00
Sylwester Nawrocki
5a1993f0c6 ARM: EXYNOS4: Fix the IRQ definitions for MIPI CSIS device
This is a regression fix after migration to the external GIC.
The breakage has been introduced in commit 69644a8e23
("ARM: EXYNOS4: modify interrupt mappings for external GIC")

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: added commit id]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-08-19 20:57:34 +09:00
Huang Weiyi
6b875cb741 ARM: EXYNOS4: remove duplicated inclusion
Remove duplicated #include('s) in
  arch/arm/mach-exynos4/cpu.c

Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-08-19 20:57:25 +09:00
Jonghwan Choi
af8a9f63b4 ARM: EXYNOS4: Fix wrong devname to support clkdev
Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-08-19 20:57:21 +09:00
Kyungmin Park
c1a238aadf ARM: EXYNOS4: Use the correct regulator names on universal_c210
Use the correct regulator names for cpufreq

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-08-19 20:57:20 +09:00
Kukjin Kim
b8a297d3f8 ARM: SAMSUNG: Fix Section mismatch in samsung_bl_set()
WARNING: vmlinux.o(.text+0xf47c): Section mismatch in reference from the function samsung_bl_set() to the (unknown reference) .init.data:(unknown)
The function samsung_bl_set() references
the (unknown reference) __initdata (unknown).
This is often because samsung_bl_set lacks a __initdata
annotation or the annotation of (unknown) is wrong.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-08-19 20:57:20 +09:00
Kukjin Kim
ac0d1516a2 ARM: S5P64X0: Replace irq_gc_ack() with irq_gc_ack_set_bit()
According to commit 659fb32d1b
("replace irq_gc_ack() with {set,clr}_bit variants"), this
should be fixed.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2011-08-19 20:56:17 +09:00
Axel Lin
6c58addca8 ARM: 7019/1: Footbridge: select CLKEVT_I8253 for ARCH_NETWINDER
Since commit 8560a6cfc9
"arm: Footbridge: Use common i8253 clockevent",
ARCH_NETWINDER needs to select CLKEVT_I8253.

This patch fixes below build error with "make netwinder_defconfig".

  LD      .tmp_vmlinux1
arch/arm/mach-footbridge/built-in.o: In function `isa_timer_init':
isa-rtc.c:(.init.text+0x12c8): undefined reference to `clockevent_i8253_init'
isa-rtc.c:(.init.text+0x12d0): undefined reference to `i8253_clockevent'
arch/arm/mach-footbridge/built-in.o:(.data+0x198): undefined reference to `i8253_clockevent'
make: *** [.tmp_vmlinux1] Error 1

Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-19 08:51:27 +01:00
Russell King
70e5f5efcc ARM: io: remove IO_SPACE_LIMIT from SA11x0
SA11x0 only uses IO_SPACE_LIMIT for SOC_COMMON, so we can use the
default value in asm/io.h.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-17 08:44:17 +01:00
Russell King
4b34f7d62e ARM: io: remove IO_SPACE_LIMIT from platforms without PCI/ISA
Nothing should be using PCI/ISA IO on these platforms, so their
IO_SPACE_LIMIT definitions are irrelevent.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-17 08:44:17 +01:00
Russell King
deb9a75e62 ARM: io: remove IO_SPACE_LIMIT from platforms with ISA/PCI and 64K window
Remove IO_SPACE_LIMIT definitions from platforms which have a well
defined ISA or PCI, and has a 64K window.

EBSA110 - well defined set of ISA devices.
Footbridge, Integrator, IXP4xx, VT8500 - PCI platforms.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-17 08:44:17 +01:00
Russell King
04e1c83806 ARM: io: add a default IO_SPACE_LIMIT definition
Add a default IO_SPACE_LIMIT definition.  Explain the chosen value and
suggest why platforms would want to make it larger.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-17 08:44:17 +01:00
Russell King
0d26449dd6 ARM: io: RiscPC: eliminate private inb() et.al. definitions
As we've got rid of the bit-31 set IO addresses, we can now use the
standard inb() definitions and reduce the IO space limit to 64K.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-17 08:44:16 +01:00
Russell King
5e4cdb83ed ARM: io: RiscPC: make EASI_BASE a void iomem pointer
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-17 08:44:16 +01:00
Russell King
06cf0b5468 ARM: io: ecard: remove ioaddr() from ecard.c
Remove ioaddr() usage from ecard.c, updating (and renaming) the
constants in RiscPC's hardware.h to contain the proper translation.
As this gets rid of the last ioaddr() usage, kill that too.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-17 08:44:16 +01:00
Russell King
1ace756628 ARM: io: ecard: move ioaddr() inside __ecard_address
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-17 08:44:16 +01:00
Russell King
d0a84e72eb ARM: io: RiscPC: define io addresses relative to IO_BASE
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-17 08:44:16 +01:00
Russell King
fb1dddd73d ARM: io: s3c2410: remove ioaddr()
There is only one user of ioaddr() in the kernel, and that is the Acorn
expansion card core code.  S3C2410 does not use this code, and so the
definition of ioaddr() is redundant.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-17 08:44:15 +01:00
Catalin Marinas
145e10e173 ARM: 7015/1: ARM errata: Possible cache data corruption with hit-under-miss enabled
This patch is a workaround for the 364296 ARM1136 r0p2 erratum (possible
cache data corruption with hit-under-miss enabled). It sets the
undocumented bit 31 in the auxiliary control register and the FI bit in
the control register, thus disabling hit-under-miss without putting the
processor into full low interrupt latency mode.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-15 11:58:59 +01:00
Srinivas Kandagatla
43c734be55 ARM: 7014/1: cache-l2x0: Fix L2 Cache size calculation.
This patch fixes L2 Cache size calculations for L2C-210, L2C-310 and
PL310, by changing the L2X0_AUX_CTRL_WAY_SIZE_MASK from 2 bits to 3
bits.

The Auxiliary Control Register for L2C-210, L2C-310 and PL310 has 3bits
[19:17] for Way size, however the existing code only uses 2 bits to
get this value. This results in incorrect cachesize calculations.

It also results in performing operations on the whole cache when we
erroneously decide that the range is big enough (due to l2x0_size being
too small) and also prints incorrect cachesize.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: Will Deacon <will.deacon@arm.com>
Cc: stable@kernel.org
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-15 11:58:59 +01:00
Petr Štetiar
505ed6fd82 ARM: 6967/1: ep93xx: ts72xx: fix board model detection
Fix the obvious error in board detection logic, because according to the TS's
manual, the model is stored in the least three significant bits. For example
the byte read on my ts-7300 is 0x23 and the detection then fails.

Cc: Ryan Mallon <ryan@bluewatersys.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-15 11:58:59 +01:00
Petr Štetiar
2a004c686e ARM: 6965/1: ep93xx: add model detection for ts-7300 and ts-7400 boards
Cc: Ryan Mallon <ryan@bluewatersys.com>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-15 11:58:59 +01:00
Nicolas Pitre
daece59689 ARM: 7013/1: P2V: Remove ARM_PATCH_PHYS_VIRT_16BIT
This code can be removed now that MSM targets no longer need the 16-bit
offsets for P2V.

Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-13 11:26:40 +01:00
Stephen Boyd
9e775ad19f ARM: 7012/1: Set proper TEXT_OFFSET for newer MSMs
MSMs post 8x50 have 2Mb at the beginning of RAM reserved for
shared memory. Since the kernel hasn't typically been told this
RAM exists, PHYS_OFFSET has been set to 0xN0200000 and the memory
atags passed to the kernel have matched. This doesn't play nicely
with things such as AUTO_ZRELADDR, which doesn't work at all, and
dynamic phys to virt, which requires an MSM specific workaround.

Work around these issues by telling the kernel RAM starts at
0xN0000000 (it actually does) and fixup the atags from the
bootloader (if necessary) to say the same. In addition, make sure
to set TEXT_OFFSET at least 2Mb beyond the start of RAM so that
the kernel doesn't end up being decompressed into shared memory.

After doing this, AUTO_ZRELADDR should work on MSM with no
problems and ARM_PATCH_PHYS_VIRT_16BIT should no longer be
necessary.

Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: David Brown <davidb@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-13 11:26:18 +01:00
Russell King
e426f8e39b Merge branch '3.1-fixes-for-rmk' of git://linux-arm.org/linux-2.6-wd into fixes 2011-08-13 09:43:19 +01:00
Linus Torvalds
c44efbaa0e Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (32 commits)
  ARM: mmp: Change the way we use timer 0 as clockevent timer.
  ARM: mmp: Switch to using timer 1 as clocksource timer.
  ARM: mmp: Also start timer 1 on boot.
  ARM: pxa168/gplugd: free correct GPIO
  ARM: pxa168/gplugd: get rid of mfp-gplugd.h
  ARM: pxa: fix logic error in PJ4 iWMMXt handling
  mach-sa1100: fix PCI build problem
  omap: timer: Set dmtimer used as clocksource in autoreload mode
  OMAP3: am3517crane: remove NULL board_mux from board file
  arm: mach-omap2: mux: use kstrdup()
  arch:arm:plat-omap:iovmm: remove unused variable 'va'
  Update Nook Color machine 3284 to common Encore name
  am3505/3517: Various platform defines for UART4
  OMAP: hwmod: fix build break on non-OMAP4 multi-OMAP2 builds
  OMAP: Fix linking error in twl-common.c for OMAP2/3/4 only builds
  iMX: Fix build for iMX53
  ARM: mx5: board-cpuimx51.c fixup irq_to_gpio() usage
  OMAP2+: PM: SmartReflex: use put_sync_suspend for IRQ-safe disabling
  OMAP3: beagle: don't touch omap_device internals
  OMAP1: enable GENERIC_IRQ_CHIP
  ...
2011-08-12 20:42:02 -07:00
Arnd Bergmann
696314cf53 Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 into fixes 2011-08-12 20:37:43 +02:00
Arnd Bergmann
419bb4e064 Merge branch 'fix' of git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into fixes 2011-08-12 15:49:38 +00:00
Arnd Bergmann
143ed290f0 Merge branch 'imx-fixes-for-arnd' of git://git.pengutronix.de/git/imx/linux-2.6 into fixes 2011-08-12 15:45:44 +00:00
Will Deacon
72dc53acd5 ARM: cache: detect VIPT aliasing I-cache on ARMv6
The current cache detection code does not check for an aliasing
I-cache if the D-cache is found to be VIPT aliasing.

This patch fixes the problem by always checking for an aliasing
I-cache on v6 and later.

Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-08-12 15:41:15 +01:00
Will Deacon
dfc40b24c0 ARM: twd: register clockevents device before enabling PPI
The smp_twd clockevents driver currently enables the local timer PPI
before the clockevents device is registered. This can lead to a kernel
panic if a spurious timer interrupt is generated before registration
has completed since the kernel will treat it as an IPI timer.

This patch moves the clockevents device registration before the IRQ
unmasking so that we can always handle timer interrupts once they can
occur.

Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-08-12 15:41:08 +01:00
Will Deacon
5cb843ca0f ARM: realview: ensure visibility of writes during reset
The various reset routines in mach-realview rely on an FPGA to
power-cycle the board after writing some magic runes to memory-mapped
registers.

This patch adds a dsb() following the writes, so that they become
visible before we mdelay(1000) in the arch_reset code. Without this
patch, the timeout would expire sporadically, causing the reset to fail.

Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-08-12 15:40:57 +01:00
Mark Rutland
7fdd3c4962 ARM: perf: make name of arm_pmu_type consistent
Commit f12482c9 ("ARM: 6974/1: pmu: refactor reservation") changed
{release,reserve}_pmu to take an enum arm_pmu_type as a parameter, but
inconsistently named the parameter `type' or `device'. It would be nice
if these were consistent.

This patch makes use of enum arm_pmu_type consistent, always using
`type'. Related printks are updated, explicitly mentioning `type' also.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-08-12 15:40:21 +01:00
Mark Rutland
49bef8331a ARM: perf: fix prototype of release_pmu
Commit  f12482c9 ("ARM: 6974/1: pmu: refactor reservation") changed the
prototype of release_pmu, but missed the stub for when
CONFIG_CPU_HAS_PMU is not selected by the platform.

This patch changes the prototype of the stub, preventing possible build
failures when CONFIG_CPU_HAS_PMU is not selected.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2011-08-12 15:40:21 +01:00
Russell King
c1becedc88 ARM: enable ARM_PATCH_PHYS_VIRT by default
Enable virtual to physical translation patching by default in all
kernels.  Hide the option behind EMBEDDED.

This can still be turned off if people desire, and they know what
they're doing, to shrink the size of the kernel to a minimum.

Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-08-11 10:23:49 +01:00
Lennert Buytenhek
af9dafb1dc ARM: mmp: Change the way we use timer 0 as clockevent timer.
Instead of setting up a match interrupt for 'current_time + delta'
on ->set_next_event(), program timer 0 to count down from 'delta - 1'
and trigger an interrupt when it reaches zero.

Signed-off-by: Lennert Buytenhek <buytenh@laptop.org>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2011-08-11 10:10:46 +08:00
Lennert Buytenhek
71c0c34140 ARM: mmp: Switch to using timer 1 as clocksource timer.
Signed-off-by: Lennert Buytenhek <buytenh@laptop.org>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2011-08-11 10:10:45 +08:00
Lennert Buytenhek
7ce5ae39c4 ARM: mmp: Also start timer 1 on boot.
Currently, arch-mmp/time.c uses timer 0 both as a clocksource timer
and as a clockevent timer, the latter by setting up a comparator
interrupt to match on 'current_time + delta'.  This is problematic
if delta is small enough, as that can lead to 'current_time + delta'
already being in the past when comparator setup has finished, leading
to the requested event not triggering.

As there is also a silicon issue that requires stopping a timer's
counter while writing to one of its match registers, we'll switch to
using two separate timers -- timer 0 as clockevent timer, which we'll
start and stop on every invocation of ->set_next_event(), and timer 1
as clocksource timer, which will be free-running.

This first patch enables timer 1 on boot, so that we can use it as
clocksource timer.

Signed-off-by: Lennert Buytenhek <buytenh@laptop.org>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2011-08-11 10:10:44 +08:00
Tanmay Upadhyay
4c22ea8f44 ARM: pxa168/gplugd: free correct GPIO
Signed-off-by: Tanmay Upadhyay <tanmay.upadhyay@einfochips.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2011-08-11 10:10:43 +08:00
Tanmay Upadhyay
3647a40f36 ARM: pxa168/gplugd: get rid of mfp-gplugd.h
Move definitions from mfp-gplugd.h to mfp-pxa168.h as they aren't
gplugD specific.

Signed-off-by: Tanmay Upadhyay <tanmay.upadhyay@einfochips.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2011-08-11 10:10:43 +08:00
Lennert Buytenhek
392ba787bc ARM: pxa: fix logic error in PJ4 iWMMXt handling
This got added in:

	commit ef6c84454f
	Author: Haojian Zhuang <haojian.zhuang@marvell.com>
	Date:   Wed Nov 24 11:54:25 2010 +0800

	    ARM: pxa: add iwmmx support for PJ4

which does:

-       mrc     p15, 0, r2, c15, c1, 0
-       orr     r2, r2, #0x3                    @ enable access to CP0 and CP1
-       mcr     p15, 0, r2, c15, c1, 0
+       @ enable access to CP0 and CP1
+       XSC(mrc p15, 0, r2, c15, c1, 0)
+       XSC(orr r2, r2, #0x3)
+       XSC(mcr p15, 0, r2, c15, c1, 0)

but then later does:

-       mrc     p15, 0, r4, c15, c1, 0
-       orr     r4, r4, #0x3                    @ enable access to CP0 and CP1
-       mcr     p15, 0, r4, c15, c1, 0
+       @ enable access to CP0 and CP1
+       XSC(mrc p15, 0, r4, c15, c1, 0)
+       XSC(orr r4, r4, #0xf)
+       XSC(mcr p15, 0, r4, c15, c1, 0)

Signed-off-by: Lennert Buytenhek <buytenh@laptop.org>
Acked-by Haojian <haojian.zhuang@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2011-08-11 10:10:26 +08:00
Linus Torvalds
068ef73912 Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: drop experimental status for ARM_PATCH_PHYS_VIRT
  ARM: 7008/1: alignment: Make SIGBUS sent to userspace POSIXly correct
  ARM: 7007/1: alignment: Prevent ignoring of faults with ARMv6 unaligned access model
  ARM: 7010/1: mm: fix invalid loop for poison_init_mem
  ARM: 7005/1: freshen up mm/proc-arm946.S
  dmaengine: PL08x: Fix trivial build error
  ARM: Fix build error for SMP=n builds
2011-08-10 17:37:17 -07:00
Linus Walleij
ac9cf9ff4f mach-sa1100: fix PCI build problem
The PCI nanoengine driver in the SA1100 machine probably has not
been building for some time. It probably dragged hardware.h
in implicitly and now it doesn't anymore. After this an SA1100
build selecting all system variants will build successfully.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2011-08-10 16:00:48 +00:00
Hemant Pedanekar
e9d0b97eef omap: timer: Set dmtimer used as clocksource in autoreload mode
If CONFIG_OMAP_32K_TIMER is not selected and dmtimer is used as clocksource, the
timer stops counting once overflow occurs as it was not set in autoreload mode.
This results into timekeeping failure: for example, 'sleep 1' at the shell after
the timer counter overflow would hang.

This patch sets up autoreload when starting the clocksource timer which fixes
the above issue.

Signed-off-by: Hemant Pedanekar <hemantp@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-08-10 07:36:45 -07:00
Johan Hovold
133e6b55b1 OMAP3: am3517crane: remove NULL board_mux from board file
Since 7203f8a48b (arm: mach-omap2: remove
NULL board_mux from board files) NULL board_mux is defined in mux.h.

Signed-off-by: Johan Hovold <jhovold@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-08-10 04:54:48 -07:00
Thomas Meyer
dccb3b0eb6 arm: mach-omap2: mux: use kstrdup()
Use kstrdup rather than duplicating its implementation

The semantic patch that makes this output is available
in scripts/coccinelle/api/kstrdup.cocci.

More information about semantic patching is available at
http://coccinelle.lip6.fr/

Signed-off-by: Thomas Meyer <thomas@m3y3r.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2011-08-10 04:53:28 -07:00