There are use-cases where pipe is reused with a lower resolution than
previous one. In such cases, it is possible that SMP requirement is lower
than before. Current implementation will reject pipe configuration where
any SMP change is requested. This may lead to GPU fall-back option and
eventually consume more power. But on high end targets we have enough
number of SMPs available for use such that we can still allow the use-case
and not run out of SMPs to use. Based on this knowledge, change the logic
to allow extra SMPs during pipe reuse.
Change-Id: Icad5ca284a6b5ec1810d65bb1755d2f9572db7f0
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Currently, when BLANK is called to turn off the panel during suspend, we
set the backlight to level 0. The backlight pwm driver interprets this
as requiring pwm_disable() only. However, in order to prevent any
garbage data from being displayed on the panel during resume, we should
set the pwm level to 0 before disabling the pwm backlight node.
Change-Id: Ifc12c49cbfcac76a5ca07e8c5e16b0fd023e1eeb
CRs-Fixed: 711782
Signed-off-by: Benet Clark <benetc@codeaurora.org>
Add fudge factor to ib vote for scenarios with high
bandwidth request whenever a single pipe is present,
this is to account for inefficiencies as recommended.
Change-Id: I6bdfb8d71c61f58a26fae95bdbd5bc9a2d043957
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
BWC decode works at 2 pixels/clk and MDP clock requirement needs to be
adjusted to account for this. If BWC decode is enabled and MDP clock is
not sufficient then real-time pipeline might suffer from throughput
delays and might result in under-runs. Prevent this by calculating MDP
clock rate when BWC decode is needed and then choose max MDP clock rate
by comparing normal MDP clock and bwc MDP clock.
Change-Id: I92afc5a3c7ec29602ffdeec1ada0d67c57c4497f
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
The Color Space Conversion hardware is only instantiated once as
CSC_1. There is no CSC_0 hardware in the MDSS. Remove any mention of CSC_0
in order to be clear.
Change-Id: Ie7f8ef4dbb6e5f6ba1550020938dc101fec64800
Signed-off-by: Benet Clark <benetc@codeaurora.org>
The play count will not be reset to 0 in static screen case.
However, we still need to reset the CSC setup because the
registers would be reset.
Change-Id: Id2f6d9317b4da561ec31b6454166704493880b81
CRs-Fixed: 716190
Signed-off-by: Benet Clark <benetc@codeaurora.org>
Enable partial update for MDP3. Use ROI provided by
HAL and program the DMA pipe accordingly.
Change-Id: I2dd2d59bf178383b6139a1432274efa516e21fcc
Signed-off-by: Dileep Kumar Reddi <dkumarre@codeaurora.org>
This code change modifies the mdp3 clock control
based on 8909 platform clock plan.
Change-Id: I316fd51ec05d4eb1d1d3a138bbb672b036f1bbc0
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
When trying to boot a dual dsi panel with single dsi configs,
the kernel takes the pref-panel for dsi1. This change avoids the
pref-panel selection when the dsi1 panel string is none.
Change-Id: I433d81a3813f359ed0ba513a3d5412b1c476bccc
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Setting the correct return value for successful ion memory mapping
and handling the unmapping for ion memory.
Change-Id: I005ed3c4b09ddc9e559fa41929f11beb702d373d
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
UBWC format is supported for pipe input and WB0 & WB1
output for MDPv(1.7). This new format also has specific
buffer configuration requirement for bit stream and
meta data. This change adds UBWC support in MDSS
driver and put checks for format support in various
use cases and register configuration.
Change-Id: I29c262a94461d7571bead63f60517875eaaa5e5b
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
MDSS driver defines new input format for all fetch
type modes Ex: linear vs tile mode. Such redifintion
in driver is not scallable for supporting new formats
in future. This cleans up fetch mode specific definition
from MDSS driver and make it ready to accept new input/
output image formats for future targets.
Change-Id: Ia2bb6684f7eb6c06323734c9c9bbdacb788c51e0
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Remove logs which are showing up quite frequently and
doesn't help in debugging.
Change-Id: Ibdc24bce17c798cbd0697ef00718b478a2c20a32
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Replace completion structures with waitq and track the completion of
ping pong transfer with a single kickoff count variable. This prevents
race conditions when using completion structure and provides a cleaner
way to identify whether wait is required.
CRs-Fixed: 720541
Change-Id: Iebb8077d520649db427470fc4963d892967a920c
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Added appropriate error code for hardware limitation on mdp overlay
vertical scaling. On encountering the error, it is expected to ignore
the error and fallback to GPU.
Change-Id: Ib3a7767a856ed4d80632aabd7e371d2766b53dc1
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
When entering doze mode, ensure that the tear-check setup is not
torn down. In addition, do not disable the split-display configuration.
This is to ensure that mdss driver can continue to handle any display
updates in doze mode. Similarly, when transitioning from doze power
state to blank power state, ensure that we do not send panel unblank and
panel on events. These events should only be sent when transitioning to
unblank power state.
Change-Id: If5ca1cdd20bb442e773912575c0a6e204c0ca1a2
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Fixed a possible null dereference in qpic panel
Change-Id: Ie2299090a45dadd189b4075d2e5a6744879da710
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
"dcs_cmd_by_left" indicates that dcs commands can be only sent
for left DSI controller. Tear_on and Tear_off should not be send
to right controller when above flag is set. This change fixes the
tear_on and tear_off APIs with input validation.
CRs-Fixed: 728424
Change-Id: Ia4e37456bf4377f7dc4c7a3c1d929c06420b05e4
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
During DCM mode it is needed to keep display
thread to process display commands.
Change-Id: I39e56b79dc484f328a046a397f7416769453df3d
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
For split display case there has possibilities of race condition
may happen during dsi clocks control between add_vsync and
clokc_off thread which could end dsi clock is turned off
instead of turn on as add_vsycn thread expect. Therefore
clocks control of both dsi controllers should be atomic.
CRs-Fixed: 724861
Change-Id: I537502bad2611769d5323cd05ed50c505af6371a
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
For programming the hwcursor through the cursor ioctl in msm8994 needs
the compat utils support to make the data compatible
Change-Id: If4c05e103f90f04a6ac7475b4d3bc584290934ac
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
This change adds version macro for msm8994v2 and
uses this version where ever necessary in the driver.
Change-Id: I20603d98c154c4e414adab6740233507c7b09c7b
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
The right mixer for hwcursor was not configured, making it to work
only on dsi0. This change configures the left and right mixers
appropriately based on single/dual dsi.
Change-Id: Ib12589777b3b7a2a202447c89bb079ffb969cf7c
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Current code tries to force a color fill if it does not
find a buffer associated with the pipe, this is wrong
and causes underruns due misconfiguration in the pipe.
This fix modify this behavior to only do color fill
if it is requested through the flags.
Change-Id: I019da850a05a3c26f0a72626f1c442cfdac8733b
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Current code tries to do the prefill bandwidth
calculation for the solid color fill use cases.
This is wrong since in this scenario driver does not
need to calculate prefill bandwidth and this could
cause a kernel panic since smps are not allocated;
add check to avoid this condition.
Change-Id: Ia5c7ec2473121b7c419fa9facb92a4f747cab43c
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
MDP v(1.7) supports fixed SMP. mdp_smp_reserve API should not reserve
any SMP for this MDP version. This change fixes the API call to avoid
smp reservation when fixed SMP is enabled
Change-Id: Idf5594e216115c51f4cb4f7a2ad6ea7b9690b641
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
For some video mode panels, there is a requirement to go to ULPS
state during suspend. Add support for this feature. Also the DSI
CTRL power module needs to be kept enabled during suspend. This
is needed for the DSI PHY to maintain ULPS state. Add changes to
take care of this also.
Change-Id: I9547725719ef94d31cea81f66896b9cbe47b74e1
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
To support per-panel tuning during run-time, panel name/id needs
to expose to tuning service in userspace, so tuning service can
apply proper tuning configs against different panels detected
dynamically via LK bootloader.
Change-Id: I193bb375495ea0963560ea698881176b52727d62
Signed-off-by: Zohaib Alam <zalam@codeaurora.org>
There is a deadlock in use cases where fb shutdown
is called. To avoid this condition we need to
kill display thread before release happens during
shutdown.
Change-Id: I24b03e60179c605a8572b5a011d746002e26ca18
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
mdp clocks on 8909 is similar to 8916. Add changes to
take care of this. Also remove dsi_clk and lcdc_clk as
they are not needed for 8909.
Change-Id: I17d9268d99681bb354f2e1803db5ddb38ba97afa
Signed-off-by: Shivaraj Shetty <shivaraj@codeaurora.org>
Sometimes the DSI lanes can overflow due to the CLK lane getting
stuck at HS state and not transiting to LP state. Add support
for display recovery in such cases for video mode panels.
Add code so that this recovery is done during the active period.
Change-Id: Ib56e7bccb4b3b9525ff0f4c4fca54971610a7326
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
In dual DSI command mode case, both interfaces need to finish before the
panel is turned off. In order to make sure these are synchronized, both
interfaces need to be stopped before sending blank/off events to panel
driver.
Change-Id: Ie5bcf5ce53515a5c02696c7be1665c3330be0417
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Continuous splash flag for the second dsi interface is not set
to 0 which leads to host init for the second dsi interface not
getting called.
Change-Id: Icba4820922714e3f096e93914f0d3c718c81ae62
Signed-off-by: Vineet Bajaj <vbajaj@codeaurora.org>
These APIs are deprecated as securing and unsecuring for secure
buffers is done on allocation and free respectively by the secure
heap layer. Clients don't have to call these explicitly.
Change-Id: If88cd1c47cba346446ebdcad494850b54ba954ab
(cherry picked from commit 171909b3ee7af285d939a8c384be64605d817716)
[veeras@codeaurora.org: Done as part of 3.18 upgrade
Remove files from commit, as its not related to display
drivers/media/platform/msm/vidc/msm_smem.c
drivers/media/platform/msm/vpu/vpu_resources.c
drivers/media/platform/msm/wfd/enc-venus-subdev.c
drivers/media/platform/msm/wfd/mdp-5-subdev.c
drivers/staging/android/ion/msm/msm_ion.h
drivers/staging/android/ion/msm/secure_buffer.c]
Signed-off-by: Shalaj Jain <shalajj@codeaurora.org>
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
While validating the pixel extension values, reset the pixel
extension flag in case of failure. If this flag is not reset,
driver will programm the wrong configuration into hardware
registers in the commit ioctl.
Change-Id: I6fb90ca331f39e704a8aa915a04b6be776bcff55
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
When destination split is enabled, we have a single control path
and two interface timing engines. Add changes to support variable
refresh rate (VRR) using vertical porch method for these cases.
Change-Id: Iad78c2282e7620454eddf839ed94618731b9621b
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
On 8939, the flush bit for TIMING_2 interface is BIT-31 whereas,
it is BIT-29 for other targets. Add change to take care of this.
Also the CTL flush bit for timing interfaces should be based on
ctx->intf_num variable rather than ctl->intf_num. This is to
handle cases related to destination split.
Change-Id: I8c750714ca931341e179057f5c53edce0ad2803e
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
For RGB 666 panel format on DSI, a change has been made earlier to set the
alignment to MSB. This was causing color corruption on EDP panel as it
requires LSB alignment. This fix is to set the MSB alignment for RGB666
format only on DSI panels, so that it doesn't affect EDP.
Change-Id: If07b915bb30b00ff1824c7c662bbf4db8a217a6b
Signed-off-by: Vineet Bajaj <vbajaj@codeaurora.org>
Add a check to compare whether parameters have changed from previously
set parameters and only then do reprogramming of structure. This can
save some time by not needing to reprogram the hardware and makes it
easier to debug by showing logs only when there are some changes in
parameters.
Change-Id: Ic26db2906358594fa6475010df6d6e05bc0cb4ad
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Update mdp version for ferrum which is MDP3.05. Also align the
iommu domain index for mdp3 with mdp5 as DSI 6g uses this.
Change-Id: I89d5b6daaf76c7fa9a4a077d83800b8bba0d4942
Signed-off-by: Shivaraj Shetty <shivaraj@codeaurora.org>
Certain DSI panels need 5v boost gpio to be configured
to work. Add support to define and enable 5v boost gpio as a
panel property. These panels in older targets were relying on
the platform enable gpio to enable the 5v boost on the panel.
This maintains back compatibility for those targets which use
the same panels.
Change-Id: I0410a83044e17648e67a9e8556c5620c75472e62
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Upon successful connection, audio should switch over to HDMI only for
CEA resolutions. In the current implementation, when HDCP authentication
succeeds, the audio switch device is notified irrespective of the
selected resolution even though no audio related setup is done. This can
lead to unintended consequences during video playback. Fix this by
notifying the audio switch device only for CEA resolutions.
Change-Id: If1372c0d6171d6d8091a768462043bffc41109d1
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Check for null pointer before disabling the regulators.
During cable connect/disconnect and suspend/resume check for
previous power state of mhl to avoid enabling/disabling gpio's
and regulators twice.
Change-Id: I44dc51122da4630974147b829236cb39c1ad54b0
Signed-off-by: Raghavendra Ambadas <rambad@codeaurora.org>
When source split is enabled, all the layers residing on right
layer mixer (LM) have their dst_x offset relative to left LM's left top
co-ordinate except base layer. Base layer is a special case where it
doesn't abide by this HW rule and to make it work when source split is
enabled, either dst_x of base layer on right LM needs to be relative to
right LM's left top or base layer needs to be staged on both LMs. Since
later approach doesn't fit well with other use-cases, use the first
approach.
Change-Id: Ifa36cdf26f6baf68723d0e0ccad6cad089e8bedb
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
After coming out of mdss power collapse, need scm call to restore secure
configuration and allow access to protected hardware registers.
Change-Id: Ie1294e37674bb8e9065e438e1c1a2deee80d49e0
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Currently, we clear the RDBK_DATA registers after we perform
every read. This is to clear the read count in the register so
that the count starts from zero for the next read. But, the read
count can increment for non-read use cases as well such as
non-read BTA, error conditions of non-read commands. Hence, clear
the RDBK_DATA registers before every read.
Change-Id: I1197451f5ca42e9235a81d256f075c2c3b8cc05c
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
