For all rpm clocks, max rate request is going to RPM
during handoff which always shows max requested rate
value from APSS so fix the same.
Change-Id: I4f184ea053fc1a40830eb9f555c24fdf17ba3fa1
Signed-off-by: Amit Nischal <anischal@codeaurora.org>
Update qrng block address and interrupt number for crypto hardware
for SDM660.
Change-Id: I5f0066a1d2086830747156d8c65746a2dac87feb
Signed-off-by: Brahmaji K <bkomma@codeaurora.org>
Enable watchdog node for sdm660 which is
used to detect system hang.
Change-Id: I463f7320a068b678370b295558689c37d8073fb7
CRs-fixed: 1056777
Signed-off-by: Amey Telawane <ameyt@codeaurora.org>
Use correct property name for passing voltage values for voting
core_ldo which is required for QMP PHY.
Change-Id: I042905f5971c653f580a6f4388555744ff3160cc
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
Update vdd-current-level as per latest hardware documentation
and interrupt related properties of sdhc2 for sdm660.
Change-Id: I93fa440bc7ae0f72cb19949fdb9e4c5f6322d253
Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org>
PMI GPIO1 is used to enable and disable WLED for msm8998 QVR,
we should also invert the gpio level according to HW design.
CRs-Fixed: 1101647
Change-Id: If29e41d12a697d7fd6671f1134a1e798c80c3523
Signed-off-by: Yahui Wang <yahuiw@codeaurora.org>
Added attributes for forcing a buffer mapped as coherent or
non-coherent by using the DMA_ATTR_FORCE_COHERENT and
DMA_ATTR_FORCE_NON_COHERENT.
Change-Id: Ifecad81dd96b99ab63854bddce378ff775c22d38
Acked-by: Viswanatham Paduchuri <vpaduchu@qti.qualcomm.com>
Signed-off-by: Sathish Ambley <sathishambley@codeaurora.org>
This reverts commit c996cdd384 ("USB: rndis:
Free the rndis response queue during REMOTE_NDIS_RESET_MSG"). RNDIS host
sends GET_ENCAP_RESP for every RESP_AVAILABLE_NOTIFICATION from device.
As result if REMOTE_NDIS_RESET_MSG comes device rndis driver frees all the
previous responses and once notify request gets completed for previous
RNDIS request message it sends reset message completion resonse. When
response available request corresponding to RNDIS reset message gets
completed host RNDIS driver sends GET_ENCAP_RESP and device sends stall
because all RNDIS responses are freed due to RNDIS reset message.
Change-Id: I8a785d1ea8175c5c6aa08cda5cdd00cfd0c561b5
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
When SSR happens at WLAN driver, the cfg80211 stop AP can fail at driver.
Make sure that the beacon interval is reset, even when this API fails.
Change-Id: I459f55ce5f4bc44c4d0e20170bd50a83c2d609b4
Signed-off-by: Sameer Thalappil <sameert@codeaurora.org>
CRs-fixed: 1078172
When rotator job finished, driver needs to send out done signaling to
notify fbdev driver to perform a commit. However, there are occasions
that the SMMU disabling take quite long time and delaying the fbdev
commit time. To reduce this unpredict latency, move the SMMU disabling
much later in the rotator done handling, and also remove unnecessary
SMMU disabling call during commit phase.
CRs-Fixed: 1100633
Change-Id: I76ad017661aa6f760a2adc3579f59a7b66ab8e40
Signed-off-by: Benjamin Chan <bkchan@codeaurora.org>
If read function is waiting for interrupt and after that
NFCC goes to recovery, MW will call ioctl (0) and ioctl (1),
In ioctl (0) call we are disabling interrupt so read function
was waiting for interrupt and ioctl call has disabled interrupt,
now there is no possibility interrupt will be enabled again
because only read function enables the interrupt.
Enabled interrupt in ioctl (1) so that we can receive data
after reset/recovery.
Change-Id: I1677a50129534b1eaa4b8c20820a15db299cd9c1
Signed-off-by: Gaurav Singhal <gsinghal@codeaurora.org>
Vote minimum possible voltage corner on system regulator in
regulator disable path when the CPR controller manages an
underlying LDO of type LDO300.
Also, fix the regulator get failure print when vdd-supply
not specified for CPRh controllers.
CRs-Fixed: 1108988
Change-Id: Ic1c7b6fd4bf93dd213b2f639aa21b47890906478
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
Properly initialize local variable in the SDE rotator WB done handler.
Under error condition, it is possible that the handler access the
uninitialized variable.
CRs-Fixed: 1110015
Change-Id: I4c76fd6400c528f5dd7773aa9b3718dd86b2b01a
Signed-off-by: Benjamin Chan <bkchan@codeaurora.org>
Some platforms don't configure qcom,secondary-pon-reset like 8998.
So set boot_reason when "qcom,system-reset" node exists to avoid
setting a wrong value to boot_reason.
CRs-Fixed: 1102732
Change-Id: I9e9ff2f2d0ffac6baa5d0663664001eb30638e87
Signed-off-by: Mao Jinlong <c_jmao@codeaurora.org>
Add IPA stats support on AP+STA mode for V2 driver
when CNE queries. Also add metering funtionality
on WIFI interface to stop the data transfer
when quota reached on WIFI-case.
Change-Id: I51a771423e6a35ea0453b978be484d0464bddf14
Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com>
Signed-off-by: Utkarsh Saxena <usaxena@codeaurora.org>
Do not send CMD13 after sending switch command for HS, HS_DDR,
HS200 and HS400 modes. It seems that below problem can occur -
1. After sending switch CMD6, card will switch to mentioned bus speed
mode.
2. At this moment the controller will be in different bus speed mode,
unless the timing of the controller is switched to match with that of
card.
During this time, if CMD13 follows CMD6 to switch the bus speed
mode in card. Then it may cause timeouts or other errors because
of mismatch in timing of controller and card.
Thus send CMD13 to see the status once both controller and card are
switched to same timings.
Change-Id: If796c8cfce2cbdc1bce460460e3276886ae1be0c
Signed-off-by: Ritesh Harjani <riteshh@codeaurora.org>
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>
Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org>
nt36850 wqhd command panel will be used for sdm660 QRD,
so enable it for sdm660 QRD.
CRs-Fixed: 1107352
Change-Id: Ia7a691949bfef8777f78e846b6fb92e01658441f
Signed-off-by: Yahui Wang <yahuiw@codeaurora.org>
Add TLB dump entries to setup memory space for the cpuss dump
driver to dump TLB entries.
Change-Id: I7514969c1540d18d2102088b43d959adec68152f
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
__qseecom_update_cmd_buf_64() called __qseecom_allocate_sg_list_buffer()
to allocate memory from within a for loop. Should it fail on any other
than the first time through the loop, the prior allocations will not be
deallocated, make change to deallocate memory in this error case.
Change-Id: I8cb71a3b141249d8266aec4890632f200d147405
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
When VCONN is enabled while OTG is disabled the CC line which is not
configured for VCONN can be internally pulled down. If the Type-C plug
were removed then Type-C detection would still see that Rd is applied and
not detect the removal.
Fix this by ensuring that OTG is enabled while VCONN is enabled. If OTG
were disabled due to an over-current event then VCONN must also be
disabled.
Implement a retry mechanism if over-current is detected on either VCONN or
VBUS.
Change-Id: Iccfb923bce8f06c7c1270943211ce134ea9ef616
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Since clusters can vary significantly in the power and performance
characteristics, there may be a need to have different CPU selection
policies based on which cluster a task is being placed on. For example
the placement policy can be more aggressive in using idle CPUs on
cluster that are power efficient and less aggressive on clusters
that are geared towards performance. Add support for per cluster
wake_up_idle flag to allow greater flexibility in placement policies.
Change-Id: I18cd3d907cd965db03a13f4655870dc10c07acfe
Signed-off-by: Syed Rameez Mustafa <rameezmustafa@codeaurora.org>
GPU RBCPR clocks needs to registered separately, as GFX CPR would require
the rbcpr clocks to register the regulator handle.
Change-Id: I59def76e7dd69600be8faf47eb867a97ab04739e
Signed-off-by: Amit Nischal <anischal@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Change SVS clock for vfe_clk_src from 384MHz to 480MHz.
Change-Id: Ieff3fed56bc669e5b36022bb3282f17120cf949f
Signed-off-by: Ramesh V <ramev@codeaurora.org>
In the current implementation DSI timing db(Double Buffering)
mode is set as part of DSI controller initialization. This is
causing DSI command transfer failures when sending panel init
commands during device resume for some platforms like SDM660.
Since on these platforms DSI_CMD_OFFSET and DSI_CMD_LENGTH
register has now become double buffered and hence would need a
control flush, for these registers to take effect. But control
flush in driver does not happen until panel init is done properly.
So removing the programing of timing db registers from DSI host
initialization sequence as this is already taken care during dynamic
refresh rate change usecase.
Change-Id: Ia08788127f4d132530e3f3a28efd9d7ee9869483
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Following are the changes made:
1. Add CLK_IGNORE_UNUSED flag for some clocks which are not
supposed to be disabled at late_init_level.
2. Fix clock measure debug mux value for mmcc clocks.
3. Add mmss_mdss_byte1_intf_div_clk for mdp.
4. Fix usb ref clocks to branch voted.
Change-Id: I06396c73f7855acfac283abe576e0b4cc1a92bd5
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Some platforms may use external gpio to enable and disable backlight,
and we may need to invert this gpio according to HW design,
so add support for that.
CRs-Fixed: 1109294
Change-Id: Ib5e895eebcc38d185e8b703c3d895781b43c58c7
Signed-off-by: Yahui Wang <yahuiw@codeaurora.org>
For 30fps rotation, it is only required to perform a commit every other
vsync for a 60fps refresh rate panel. Rotation time for a 4k resolution
will take approx 12ms including SW overhead, and leave very little room
to perform a frame commit in fb driver. One way is to delay the
rotation time by enabling traffic shaping for 4k@30fps content so that
the it will take approx 15ms to finish, and that will force the frame
commit into next vsync time slot and thus matching the cadence of
30fps commit time.
CRs-Fixed: 1100633
Change-Id: I0aecfe767cd77140f75bb13c4fe6f9267d4d911e
Signed-off-by: Benjamin Chan <bkchan@codeaurora.org>
