If max77686 chip is instantiated from device tree, it is desirable to
have an OF clock provider to allow device tree based look-up of clocks.
This patch adds OF clock provider registration to the clk-max77686
driver.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
SoC family definitions at the moment are reactive to board needs.
This results in potentially wrong matches taking place for board types.
Eventually, we will have descriptors match only with SoC types and
should not contain anything specific to board handling and pave the
way to getting rid of soc_is_XYZ checks and allow this determination
done with matches at of level.
Existing implicit definitions(as part of board descriptions) are
explicitly documented.
NOTE: Even though we prefer to have dt compatibility to explicit,
"ti,dra7xx", "ti,am33xx", "ti,omap36xx" preexist in current dts and
are maintained for backward compatibility. It is also expected that
any future SoC addition will keep this documentation updated.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The AudioSS block on Exynos 5420 has an additional clock gate for the
ADMA bus clock.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
There is no gate for the PCM clock input to the AudioSS block, so
the parent of sclk_pcm is div_pcm0. Add a clock ID for it so that
we can reference it in device trees.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
This allows the input clocks to the Exynos AudioSS block to be
specified via device-tree bindings. Default names will be used
when an input clock is not given.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
The Chunghwa CLAA101WA01A is a 10.1" 1366x768 panel, which can be
supported by the simple panel driver.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Samsung LNT101NT05 10.1" WXVGA panel can be supported by the simple panel
driver.
Cc: linux-fbdev@vger.kernel.org
Cc: dri-devel@lists.freedesktop.org
Cc: David Airlie <airlied@linux.ie>
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
TWR-P1025 Overview
-----------------
512Mbyte DDR3 (on board DDR)
64MB Nor Flash
eTSEC1: Connected to RGMII PHY AR8035
eTSEC3: Connected to RGMII PHY AR8035
Two USB2.0 Type A
One microSD Card slot
One mini-PCIe slot
One mini-USB TypeB dual UART
Signed-off-by: Michael Johnston <michael.johnston@freescale.com>
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
[scottwood@freescale.com: use pr_info rather than KERN_INFO]
Signed-off-by: Scott Wood <scottwood@freescale.com>
This patch replace custom handling of IrDA feature with N_IRDA
line discipline, so IrDA mode can be used with irtty driver.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
We have already renamed the file name, change doc name at this
patch.
Cc: devicetree@vger.kernel.org
Cc: linux-doc@vger.kernel.org
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
LDO indices start from 1. Update the example accordingly.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
Add support for DMA controller of BCM2835 as used in the Raspberry Pi.
Currently it only supports cyclic DMA.
Signed-off-by: Florian Meier <florian.meier@koalo.de>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Even though we might not have rigor rule for the simple card property names,
according to the existing ones, they are all in a same pattern:
[simple-audio-card,]XXX;
Rename simple-audio-routing to simple-audio-card,routing, and make the simple
card's properties has one unified name.
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The Palmas device contains only a USB VBUS-ID detector, so added a
compatible type *ti,palmas-usb-vid*. Didn't remove the existing compatible
types for backward compatibility.
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
* Several patches fixing up incorrectly defined register addresses and
bitfield offsets that could lead to undefined operation when accessing
respective registers or bitfields.
1) clk: exynos5250: fix sysmmu_mfc{l,r} gate clocks
2a) clk: samsung: exynos5250: Fix ACP gate register offset
2b) clk: samsung: exynos5250: Add MDMA0 clocks
2c) ARM: dts: exynos5250: Fix MDMA0 clock number
3) clk: samsung: exynos4: Correct SRC_MFC register
All three issues have been present since Exynos5250 and Exynos4 clock
drivers were added by commits 6e3ad26816 ("clk: exynos5250:
register clocks using common clock framework") and e062b57177
("clk: exynos4: register clocks using common clock framework")
respectively.
* Patch to fix automatic disabling of Exynos5250 sysreg clock that could
cause undefined operation of several peripherals, such as USB, I2C,
MIPI or display block.
4) clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg
clock
Present since Exynos5250 clock drivers was added by commits
6e3ad26816 ("clk: exynos5250: register clocks using common clock
framework").
* Patch fixing compilation warning in clk-exynos-audss driver when
CONFIG_PM_SLEEP is disabled.
5) clk: exynos: File scope reg_save array should depend on PM_SLEEP
Present since the driver was added by commit 1241ef94cc ("clk:
samsung: register audio subsystem clocks using common clock
framework").
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.22 (GNU/Linux)
iQIcBAABAgAGBQJSxY6TAAoJEIv3Hb8G/XruUcgP/001H5qqDZWtEk2Z1XvOUPgF
MfFprrNcPpLhLmBnvDpR5mUrcMIp4t/4GcWClmX58zcsZfcQP5YF81oGGiQy+U13
Yu94H+sWihrms5h8GSkqEhB5YSvcIOfs4rtAeNl/g2su7i+l4loF/xofXpj09+qp
xnmKJ8yfB5RD822StgrkoMu7vxzYyK05j8IasSH54vsO9X3Z3jTWuAKdQFKZoZp4
xBGjtIwoyyHndWAlhl1nIj1dvaDgx+gF25qRUrfShfE51R4BNzmvpgiN1mpQTjCl
JpYDJqZ1h7FL883ZXiz7SfRVv4H2GaEWqz+zxgVfHkO45lIL3Eyn1zhSKas4pRFH
KZscKBvT/YEgIQjBW4+VdMuMM0NWIzvYp1BM2/l88KvUgXYiS0EOM5UjYJatKwIO
MW4ZLpIsMiJlN8OygBTaZOZQaY8rbbdVn5KFsgkL0zl7uZzmbYCqhxKrXZfTKyx/
ieEGRmqjrcuguVDPNSsd9TZ/LUm3kTCSzpr3gvAXjK+29DbVrs6fX1lQ0RCxvACQ
8gBjD6ZsVFcsGSbWbPEoDi+qtKielZBjbSrgTDNkRqE/6yqg+UUZVSJJ6kkEA14o
swE+8mGrUhdv5TvpTjJactnBZeUpFbmLm4TE/r695dfwcr6wX7cK41gMVo7bE9fk
2rYzz35ed29q8OfJI/54
=0B0x
-----END PGP SIGNATURE-----
Merge tag 'samsung-clk-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tfiga/samsung-clk into clk-fixes
Samsung Clock fixes for 3.13-rc7
* Several patches fixing up incorrectly defined register addresses and
bitfield offsets that could lead to undefined operation when accessing
respective registers or bitfields.
1) clk: exynos5250: fix sysmmu_mfc{l,r} gate clocks
2a) clk: samsung: exynos5250: Fix ACP gate register offset
2b) clk: samsung: exynos5250: Add MDMA0 clocks
2c) ARM: dts: exynos5250: Fix MDMA0 clock number
3) clk: samsung: exynos4: Correct SRC_MFC register
All three issues have been present since Exynos5250 and Exynos4 clock
drivers were added by commits 6e3ad26816 ("clk: exynos5250:
register clocks using common clock framework") and e062b57177
("clk: exynos4: register clocks using common clock framework")
respectively.
* Patch to fix automatic disabling of Exynos5250 sysreg clock that could
cause undefined operation of several peripherals, such as USB, I2C,
MIPI or display block.
4) clk: samsung: exynos5250: Add CLK_IGNORE_UNUSED flag for the sysreg
clock
Present since Exynos5250 clock drivers was added by commits
6e3ad26816 ("clk: exynos5250: register clocks using common clock
framework").
* Patch fixing compilation warning in clk-exynos-audss driver when
CONFIG_PM_SLEEP is disabled.
5) clk: exynos: File scope reg_save array should depend on PM_SLEEP
Present since the driver was added by commit 1241ef94cc ("clk:
samsung: register audio subsystem clocks using common clock
framework").
Add support for the MXS DCP block. The driver currently supports
SHA-1/SHA-256 hashing and AES-128 CBC/ECB modes. The non-standard
CRC32 is not yet supported.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: David S. Miller <davem@davemloft.net>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Document the clock properties required by the at91 i2c bus driver.
Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Add device tree support for twl4030 keypad driver.
Tested on Nokia N900.
Signed-off-by: Sebastian Reichel <sre@debian.org>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
- Use PATCH_PHYS_TO_VIRT and AUTO_ZRELADDR.
- Support cascaded interrupts on the SIC.
- Complete clock implementation for the IM-PD1.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJSxyvwAAoJEEEQszewGV1zObQQAI7bN0/vmtZkoBbIeoXTAolZ
KTEqf+Gdtlny4AvW4PUeutDRr4zvFHKYo5uBbr9bQFl4S89ke29nLXhyrvJbAWJs
tujyX0mWb38fosEGeVo3YGbDIw9+O3CMRM+zaHyt/yzcHANnPeecpt3dFNheaTKs
W7Axw5YFszpfxs5xQYMrrudbXd6TbsZWSn1pJpNlPvoo8b0HV72ARZNDAM2NO2rY
rOSUzl8MKb0tAW7Nj4D8vLqAtYkjA7lX6sdXQBbqpUyTINR5/35ifW/K74q1miMS
3T5ECbwrW9CHSW2jrTt28knafasAsJKCMdJ9SXu7uzOZogglTuBSw52MIhP2QvHS
mxOXBHkCazCMum4WndLe1ygSigQZR2SAufmjzESsE82RBF2UmkgqR34aaxag9x/X
avxUM/3Opgosa12AD8buSP5NfYqMjvqXzwdNs6YbC1UPqRYIgn9FcJ6cFzkVXoKi
GWgz6Ko6MiR9HVDBqw8uHrIBKuaa3oZ5+jt0x54ZuI3tOxV1wUxR3AcgWQsF2tSN
nPg8GTvZNiEfo6fWSIx7V2H/txFfAj1Z3JG6tFQTfLtE5G7MssxyNitoxZsIeWuB
x1+tnsOQRpBlkUb92LS37ndLJoFfknbCgFUAIgMozntfCRQi/6REWAKGDo0fTOmG
+uN+Q6JMFj62jZ6dgumd
=cCZc
-----END PGP SIGNATURE-----
Merge tag 'integrator-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/drivers
From Linus Walleij:
Some Integrator patches that matured for v3.14:
- Use PATCH_PHYS_TO_VIRT and AUTO_ZRELADDR.
- Support cascaded interrupts on the SIC.
- Complete clock implementation for the IM-PD1.
* tag 'integrator-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
clk: versatile: fixup IM-PD1 clock implementation
clk: versatile: pass a name to ICST clock provider
ARM: integrator: pass parent IRQ to the SIC
irqchip: versatile FPGA: support cascaded interrupts from DT
ARM: integrator: Default enable ARM_PATCH_PHYS_VIRT, AUTO_ZRELADDR
Signed-off-by: Olof Johansson <olof@lixom.net>
This mostly adds the reset controller initialisation for the A31 and the SMP
operations for this SoC.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJStMEHAAoJEBx+YmzsjxAgOjcP/1Dqe9RobUEnNjP+zPDJgMPK
fCC5f+lsBZze5I/pQRoZEXr8L2iKXipmdiECMm/c/1j8LnvHDPG3fvfe2asz35P/
gtuy17TfT1FiE/OJmNG5w0u8+EgSKQ/wXuz6MWAaOzOP5+MJ1YqV3/Arnd4pjz5s
ynjuSS+2TcEa+LtoqzdYGwbnqmjJxaJ3YJstiJCNXIXBxfm9253fVIDlQcZj6L9i
Zkwss51ztWxHTcurIRMreS5uZgaWcbUTnboVA5+qq77GjUqo08en/xY7zTKnc5X3
oNSyM7H1ROQtilxyG9mW83OXF365xrb4xpFq0Vn742MTPr33AFozi0ovbMm3DMbi
wxr3YBxLF999nSZXOYWdg3hTfRklQ8SKNDt2PaEWQE21tYF9Eq69ePSzMpkrv5Sp
1KxoT8DheMyya1aiSN4tY3dNTnupSNmUrg9Sb1OFR0ogjxsj0BvhyUGT5gfy3Zmp
+EI5HSCcEPphElqAzqhvUn+wFwB93e1u9YBJUQ2BgPoKyIz6nPnmwJJ7/l995JAa
XHDs0gYI9yBfAJLnv/afw74uY1WVomk+7aQSnbLx+ZyiUz7pVQHtzLAhLYFsIKts
OGLdvpABHlnKWmTPyU+sR+hm+owTm9d0LBocG6UXp7ppzbRQYsh2nZdIrH9wNBzo
rpQ21zLV8VBwB/koXtVi
=zEQv
-----END PGP SIGNATURE-----
Merge tag 'sunxi-core-for-3.14' of https://github.com/mripard/linux into next/drivers
From Maxime Ripard:
Allwinner core changes for 3.14
This mostly adds the reset controller initialisation for the A31 and the SMP
operations for this SoC.
* tag 'sunxi-core-for-3.14' of https://github.com/mripard/linux:
ARM: sun6i: Add SMP support for the Allwinner A31
dt-bindings: fix example of allwinner interrupt controller
ARM: sunxi: Register the A31 reset IP in init_time
ARM: sunxi: Select ARCH_HAS_RESET_CONTROLLER
Signed-off-by: Olof Johansson <olof@lixom.net>
The Versatile FPGA interrupt controller supports cascading interrupts,
i.e. that its output is connected to the input of another interrupt
controller. This makes it possible to pass a parent interrupt from
the device tree and print it in the boot log if applicable.
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The Keystone arch has compatible nand device, so reuse it.
In case with Keystone it depends on TI_AEMIF because AEMIF
driver is responsible to set timings.
See http://www.ti.com/lit/ug/sprugz3a/sprugz3a.pdf
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Taras Kondratiuk <taras@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
The properties davinci-ecc-mode, davinci-nand-use-bbt, davinci-nand-buswidth
are MTD generic. Correct names for them are: nand-ecc-mode, nand-on-flash-bbt,
nand-bus-width accordingly. So rename them in dts and documentation.
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Taras Kondratiuk <taras@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Extend bindings for davinci_nand driver to be more clear.
This is clarification only, without semantic changes.
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Taras Kondratiuk <taras@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Move bindings under mtd. Do this in order to make davinci-nand
driver usable by keystone architecture.
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Taras Kondratiuk <taras@ti.com>
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Add support for flash-based bad block table using Marvell's
custom in-flash bad block table layout. The support is enabled
a 'flash_bbt' platform data or device tree parameter.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Since the driver supports the new compatible string, the binding
documentation must be updated to reflect it.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
In default way, we use the ecc_strength/ecc_step size calculated by ourselves
and use all the OOB area.
This patch adds a new property : "fsl,use-minimum-ecc"
If we enable it, we will firstly try to use the datasheet's minimum required
ECC provided by the MTD layer (the ecc_strength_ds/ecc_step_ds fields
in the nand_chip{}). So we may have free space in the OOB area by using the
minimum ECC, and we may support JFFS2 with some SLC NANDs, such as Micron's
SLC NAND.
If we fail to use the minimum ECC, we will use the legacy method to calculate
the ecc_strength and ecc_step size.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
This patch adds polling mode support for i2c-s3c2410 driver.The
SATA PHY controller's CMU and TRSV block's are of I2C register
map in exynos5250.These blocks can be configured using i2c.
But i2c controller instance on which these block's sits lacks an
interrupt line.Also the current i2c-s3c2410 driver is only interrupt
driven, thus a polling mode support is required in the driver for
supporting this controller. This patch adds this support to the driver.
Signed-off-by: Vasanth Ananthan <vasanth.a@samsung.com>
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
If a reset GPIO support is specified, request the GPIO and get the chip
out of reset at probe time.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Thermal sensor needs pll3_usb_otg when measuring temperature,
otherwise the temperature read will be incorrect, so need to
enable this clk before sensor working, for alarm function,
as hardware will take measurement periodically, so we should
keep this clk always on once alarm function is enabled.
Signed-off-by: Anson Huang <b20788@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Zhang Rui <rui.zhang@intel.com>
- Add the initial i.MX50 SoC support
- Support device tree boot for i.MX35
- Move imx5 clock driver to use macros for clock ID
- Some random updates and non-critical fixes on clock drivers
- A few defconfig updates and minor cleanups
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQEcBAABAgAGBQJSwiPBAAoJEFBXWFqHsHzO3/AIALlP6m/7taIQW5wO4o4aqdwk
GsN7IdsfWH/biG9VyxgpIoJKUqaOJckGA0eyLSeEG7p78xlf0n7cVPUNwzz9z1Vc
zxLSaVNznVOa4fTIsbMK9U+gUP931hjXskxD3tH98MUFqlM0JLQYoofr/lXG7Esf
N2p8B9aUND3WSxDa+d+CsW0B3FBj1piOQDMDgrdc3p7kjcAJs31KaKfUa06o7gzM
a81OaD9Vk0ONf44wh1LGlg0hDRsatQOa4tUTimeV14CnESKqsKxT4qAJ6pZLdfOt
KyRqSk4f4mkpimv4bGdhXTIsIko1CD9wg7G9fsSaolh3OEP0yyNf1savR1fmwCI=
=Hhbl
-----END PGP SIGNATURE-----
Merge tag 'imx-soc-3.14' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc
From Shawn Guo:
i.MX SoC changes for 3.14:
- Add the initial i.MX50 SoC support
- Support device tree boot for i.MX35
- Move imx5 clock driver to use macros for clock ID
- Some random updates and non-critical fixes on clock drivers
- A few defconfig updates and minor cleanups
* tag 'imx-soc-3.14' of git://git.linaro.org/people/shawnguo/linux-2.6: (37 commits)
ARM: imx: improve the comment of CCM lpm SW workaround
ARM: imx: improve status check of clock gate
ARM: imx: add necessary interface for pfd
ARM: imx_v6_v7_defconfig: Select CONFIG_REGULATOR_PFUZE100
ARM: imx_v6_v7_defconfig: Select MX35 and MX50 device tree support
ARM: imx: Add cpu frequency scaling support
ARM i.MX35: Add devicetree support.
ARM: imx: update imx_v6_v7_defconfig
ARM: imx6sl: Add missing spba clock to clock tree
ARM: imx6sl: Add missing pll4_audio_div to the clock tree
ARM: imx6: Derive spdif clock from pll3_pfd3_454m
ARM: imx: use __initconst for const init definition
ARM i.MX5: fix obvious typo in ldb_di0_gate clk definition
ARM i.MX5: set CAN peripheral clock to 24 MHz parent
ARM: imx: pllv1: Fix PLL calculation for i.MX27
ARM i.MX5: fix "shift" value for lp_apm_sel on i.MX50 and i.MX53
ARM: imx: imx53: Add SATA PHY clock
ARM: imx_v6_v7_defconfig: Enable STMPE touchscreen
ARM: imx: rename IMX6SL_CLK_CLK_END to IMX6SL_CLK_END
ARM: imx: select PINCTRL at sub-architecure level
...
Signed-off-by: Olof Johansson <olof@lixom.net>
---------------------------
This pull request contains updates
to DaVinci GPIO driver and the
resultant platform code changes. The
updates include DT-conversion and
changes to make the driver cross-platform
ready.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.10 (GNU/Linux)
iQIcBAABAgAGBQJSuycQAAoJEGFBu2jqvgRNIdMP/jE7LW16dF2dGq79Gy26GWcM
dNSSXzwEm2q5vT49H8ADzkbnsI2PlFpcH0mwn5BpPuVRl+RKHfNEZxwuAthqKduu
BIKVGBkNECrliIIUecCwBjAYpQknynvLAGHRhYmibEnZCH45kZ8g7DLJMeBL4Huz
smDkz2yWWoHjnIaCk/kIbQfeETKSx5GP+OwnnrU/4HPpndxqZ6KU/MXb8ZeMiLfa
piMl10o/YIJcfZcKBbkI1I2PuHNgNAzjVnMMsCVF+B5vgLiYmj9P+6l1Sfau6y8A
kimW34q4HNuQ07hkDAIALz0AH7y8bL9SoKprT4NX10DvGHwl21a/Ji5QS8N49krM
+HAiSIUdsFwie5M8286owGAJ/TBFReStWY1a/sIghx9idU6ejuM/Pj8/bfTS+Vu+
8wyos8hTYVBDOEwoRzw48S5x93U5W6dsjOacOJ+blHBtPmADlWSNG8HwzSfWxHEI
PMaVhu2EKtgD1ZFgU5Zlt+f5h3E4ezAIEpiPIhdLcg/3hqNSpFRmNV3nJsx+KwE+
JyZXcHkyq42i6wL5Sdf6W/Dpd5knPyqP3BBWBTeg+BDLnH8F2+Vtws95I4dlit0T
RtQ9Ms6QmznPTs9fMaviURiVIUBK6XIG5UHDU10bhL0h8vOR/hXAVrAB+wZntvPU
uIXAapK/78LTBX92opDz
=DxLt
-----END PGP SIGNATURE-----
Merge tag 'davinci-for-v3.14/gpio' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/drivers
From Sekhar Nori:
DaVinci GPIO driver updates
---------------------------
This pull request contains updates to DaVinci GPIO driver and the
resultant platform code changes. The updates include DT-conversion and
changes to make the driver cross-platform ready.
* tag 'davinci-for-v3.14/gpio' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
gpio: davinci: don't create irq_domain in case of unbanked irqs
gpio: davinci: use chained_irq_enter/chained_irq_exit API
gpio: davinci: add OF support
gpio: davinci: remove unused variable intc_irq_num
gpio: davinci: convert to use irqdomain support.
gpio: introduce GPIO_DAVINCI kconfig option
gpio: davinci: get rid of DAVINCI_N_GPIO
gpio: davinci: use {readl|writel}_relaxed() instead of __raw_*
Signed-off-by: Olof Johansson <olof@lixom.net>
* Add Device Tree Support
* Remove platform data mapbase and irqs fields
* Remove platform data scbrr_algo_id field
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.14 (GNU/Linux)
iQIcBAABAgAGBQJSuYavAAoJENfPZGlqN0++iBQP/iRLdbZzrBtIqfPOAx7kOKC5
14kMul6tggT556xW++JhpUR/s5HdGZoUwq2XhWbzMm9rhE9FFsIOsjSROU9qwItG
4indJRS7p/2/c0vVD988QcgOK9yD++t4hMM42lZ4FsTZL7RT7t5di/Dx2OP8OyU8
LwTLYNRM8icePh+KVtEXyFKjCu22/tuj8FyPJoSruJPsPkd3w8Wt9o7ZLqp58DkG
91EYVWzbKC9JOfXhW/nybDpLpaaNC/MaeIfh2K9HFhAUnhOYDJp1dU7xIz7Wj8/j
PS9RXuNr+Vyj0ov5Y5VqgFwXz1bPFBHsMXvnh7HBwNoaxK6Nvs9ZMREfVLvsAZCS
jiWIYJLozAQX+Xmj7oYBb1kUkEE/WE8ec5GufNp43Eg6mSWsEx/YVFvSfPO/PYvG
3be9jUglpZFmh9i2f2ZtB0AG2q45HieK8i9glufg+wkKnahhOYgynV4dxTvfIEts
qQCZSoAL8KbmrMZpsW0Q9D3SvEFxcuhEtVk8h6X2lg+XcjJ9dwbH8BsBCI8W6Y+m
tOc0yeK8DQhpNastoo1xATQO1MpSTqnSWwP7j6oAS4W44iuJmGLEYLiDCLuamOto
CzGBDCluic3vMMnr3BmJLd/8P+T7IxUZ/0W8aPX786sVBMjsNJPRlyal5sA4/EJl
7Swi8gxCsasfSQLbHsab
=IZCI
-----END PGP SIGNATURE-----
Merge tag 'renesas-sh-sci3-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
From Simon Horman:
Third Round of Renesas SH SCI Updates for v3.14
* Add Device Tree Support
* Remove platform data mapbase and irqs fields
* Remove platform data scbrr_algo_id field
* tag 'renesas-sh-sci3-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
serial: sh-sci: Add OF support
serial: sh-sci: Add device tree bindings documentation
serial: sh-sci: Remove platform data mapbase and irqs fields
serial: sh-sci: Remove platform data scbrr_algo_id field
Signed-off-by: Olof Johansson <olof@lixom.net>
Tested with a r7s72100 genmai board acessing an eeprom.
Signed-off-by: Wolfram Sang <wsa@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Add Capella Microsystem CM32181 Ambient Light Sensor IIO driver.
This driver will convert raw data to lux value under open-air
condition. Change the calibscale based on the cover material.
Signed-off-by: Kevin Tsai <ktsai@capellamicro.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Document the device tree binding for Broadcom Kona architecture
clock control units and clocks. Kona device nodes are represented
with compatible strings having "bcm11351" in their name.
Kona clocks are managed by "clock control units" (CCUs). Each CCU
has a device tree node, and within that node are defined the names
of the clocks provided by the CCU.
The BCM281xx family of SoCs use Kona CCUs and clocks.
Signed-off-by: Alex Elder <elder@linaro.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Reviewed-by: Tim Kryger <tim.kryger@linaro.org>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Christian Daudt <bcm@fixthebug.org>
Use clock defines in order to make devicetrees more
human readable.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Adds gate clock for MDMA0 on Exynos5250 SoC. This is needed to ensure
that the clock is enabled when MDMA0 is used on systems on which
firmware gates the clockby default.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
[t.figa: Updated patch description.]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
