MSMfalcon requires to use COMMON_CLK and COMMON_CLK_QCOM as the clock
framework. Fix the following for CLK_QCOM
- Add new configs for common clock framework.
- Remove compilation of audio-ext for COMMON_CLK.
- Remove ARCH hamster and cobalt from falcon defconfig.
- Remove ARCH falcon from cobalt defconfig.
Change-Id: I560d62f9698ddf73848186a6740632735d574b0f
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Potential use after free possibility when trying to access qmi client
data in the ssr notification and root pd_down notification handling.
CRs-Fixed: 1074483
Change-Id: I5390810861dbc1da368757df2b20e5daa35bd081
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
Allow for easy track of step charging. Show step charging
status (enable/disable) and phases.
CRs-Fixed: 1052854
Change-Id: I525fcedda71c4928c61825faeea519355675457a
Signed-off-by: Harry Yang <harryy@codeaurora.org>
Interrupts are subject to storming in bad or unexpected circumstances.
Add the necessary structures to detect interrupt storms using storm watch.
Change-Id: Id3491b6f8927cb1ae7cbc8260defa697ca555765
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Storm watch provides a simple API for tracking the occurrence of event
storms.
An event storm is defined as a cluster of events where there are
X events with no more than Y milliseconds between them, where X and Y
are configurable per event.
Querying whether a storm has occurred marks a new event.
Change-Id: Idf4bb1421d0dbec295f92f84174cd4bbc6130250
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
CC_OUT is the signal/status to the PD that indicates which of
the CC line is active. When its low CC1 is active and when
high CC2 is active.
During Source -> Sink Power Role Swap, CC_OUT is reset default
low (CC1 = CC) when SW sets the UFP/SNK_EN_CMD bit, losing the
plug orientation info and causing USB PD message error if CC2
was the CC pin.
Fix this by ensuring that s/w overrides the CC_OUT signal to
reflect the actual one, in preparation for a possible upcoming
power
CRs-Fixed: 1050738
Change-Id: I5877666c39ac9cad713a5802521527dd8552440c
Signed-off-by: Harry Yang <harryy@codeaurora.org>
Using %pK instead of %p to hide kernel pointers
based on kptr_restrict.
Change-Id: I065cff2a9e092d74d0e8c35da6551fab3805e83e
Signed-off-by: Ashwanth Goli <ashwanth@codeaurora.org>
Add the IOMMU config options that are used for the correct operation of
IOMMU driver on msmfalcon.
Change-Id: Ia6c446eca8a42800e781dfdaf46eab7bd44c126f
Signed-off-by: Charan Teja Reddy <charante@codeaurora.org>
Fix the dangling pointer issues on CoreSight that can cause the kernel
panic.
Change-Id: Ic20405cf2f64c6bc38e994780577b7da42cf6aba
Signed-off-by: Charan Teja Reddy <charante@codeaurora.org>
Reschedule the idle work in case transition to idle state is rejected
because the GPU is busy. This change avoids the condition where
transition to NAP state gets rejected due to a pending IRQ which is
currently getting served by IRQ handler because of which GPU remains
in active state even when GPU is idle.
Change-Id: I472a30b6a0e83cdd6957ed12eaa39d0c7731fcb5
Signed-off-by: Deepak Kumar <dkumar@codeaurora.org>
The bimc-bwmon4 hardware module is only available on msmcobalt-v2.
Therefore move the bimc-bwmon4 setting to msmcobalt-v2 DT so
that msmcobalt-v1 can continue to use bimc-bwmon3 to measure DDR
bandwidth.
Change-Id: If6a44d83a4088e34eda3604ffa770b46653989f5
Signed-off-by: Rohit Gupta <rohgup@codeaurora.org>
During image download, the status is set after post download events
are broadcasted. This could possibly lead to race condition if other
drivers requested to boot the dsp before the status was set. Change
makes sure the wdsp status is set prior to broadcasting post download
events to avoid possible race conditions.
CRs-fixed: 1071949
Change-Id: If3ec6202b4729b24ee839c3a8aa4edf2482d6e59
Signed-off-by: Bhalchandra Gajare <gajare@codeaurora.org>
Change the mapping table of mincpubw to vote for 681MHz at the Fmax
of the lower speed bins of the CPUs.
Change-Id: Ie8b9abaceaa8585ab5b132076772b9c7ca71cbfe
Signed-off-by: Rohit Gupta <rohgup@codeaurora.org>
The clock driver does not currently use the secure API to write the
APM threshold value. This leads to the value being always left as 0.
Fix the write.
CRs-Fixed: 1074198
Change-Id: I61d8f930f7fe8c3539803a1e9b942095df0b0f86
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
BCL gets the state of charge(soc) from the BMS power supply, which will
not capture the HLOS overidden soc value. This can create a scenario
where the mitigation will not be released if the soc value is
overridden in HLOS.
Use the battery supply notification, which can get the state of charge
value from the BMS or the HLOS overridden soc value if present.
Change-Id: I66d1ba1c6c3a942a80d3cee24746b00541fde3bc
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
Add a bit mask to enable workarounds only if they are needed for a
particular hardware revision.
Change-Id: Ibd9a896ff6746a48ddab249d7c8ab762ed3c2fbe
Signed-off-by: Harry Yang <harryy@codeaurora.org>
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
When the codec DSP is crashed / unresponsive, in order to recover
from the crash, it is required to shutdown and restart the DSP.
Add support for subsystem restart feature to recover from crashes.
CRs-fixed: 1071949
Change-Id: Ibe1918cbf525c41d8fa82fc772b3afe20cac6eb7
Signed-off-by: Bhalchandra Gajare <gajare@codeaurora.org>
Currently, the clock request is performed during init and the clock
is kept on assuming that there will be code download event followed
by init. This assumption may not always be true and might cause the
clock to be enabled when it is really not needed. Change fixes clock
disable such that clock is disabled right after init and re-enabled
again if code download event is raised.
CRs-fixed: 1071949
Change-Id: Icc415e911653012726e5b81b4fc09199560d5691
Signed-off-by: Bhalchandra Gajare <gajare@codeaurora.org>
It is possible that wcd codec DSP can crash or become unresponsive.
During such case, an error interrupt is generated by the codec. Add
support in manager driver to handle this interrupt and perform
subsystem restart to shutdown and reboot the DSP so that the DSP
can be recovered from the crash.
CRs-fixed: 1071949
Change-Id: I4662b5120bf7f731e399a27d8a613e2f3b648b00
Signed-off-by: Bhalchandra Gajare <gajare@codeaurora.org>
On MSMCOBALT v2, the qcom,llm-sw-overr flag is no longer needed.
This causes an issue where the corresponding array in code is not
filled up but the check to make the writes to the llm register
still succeeds. This leads to us writing 0 to the register
erroneously multiple times. Fix this check.
CRs-Fixed: 1074141
Change-Id: I2dd529a78d06ac08a34546df39cb01ad4c6cb3d5
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Add support to collect the codec memory dumps when any fatal
interrupt is raised from the DSP indicating the DSP is either
unresponsive/crashed. The memory dumps are only collected if
the debugfs node 'ramdump_enable' is set to true since ramdump
collection is debug only support.
Change-Id: I805ec63d125770b869cac892db8cf56f45510d6d
Signed-off-by: Bhalchandra Gajare <gajare@codeaurora.org>
It is possible that the manager driver may try to read codec memory
section through the wcd-spi driver. Add support in the wcd-spi driver
to handle the WDSP_EVENT_READ_SECTION event and perform reading of
the requested memory section.
Change-Id: If7fb228dc15cb47079c8a791443c4d12c29eeb9c
Signed-off-by: Bhalchandra Gajare <gajare@codeaurora.org>
