Add support for the graphics clock controller found on MSMFalcon based
devices. This should allow graphics clocks for GFX clients to be able to do
clock functionality.
Change-Id: I753b40d574a4afc2104a5c2bfe64b4831fbce8a0
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Provide API to check QMI support present or not to WLAN
host driver. Based on this information driver can pass the
DMA physical address info via shadow register to WLAN FW.
CRs-Fixed: 1073647
Change-Id: Iec9d3a3b468ddf6607e4a942bb3cf9133e9f0c34
Signed-off-by: Hardik Kantilal Patel <hkpatel@codeaurora.org>
For MSMfalcon and MSMtriton, clock consumers requires dummy
rpmcc, gcc, mmss and gfx clocks for their operation so add
the support for registering dummy clocks as follows:
- Add clock-output-names property for the rpmcc, gcc, mmss
and gfx clock controller nodes.
- Add reset-cells property for clock controller nodes.
- Add two fixed clock nodes named as xo_board and sleep_clk.
- Remove RPM clock IDs from qcom,gcc-msmfalcon.h.
- Modify RPM clock names as per qcom,rpmcc.h file.
Change-Id: I06262fe271ab6ba81d4fa5f67315fd1b54edee8c
Signed-off-by: Amit Nischal <anischal@codeaurora.org>
This patch fixes the possible out of bound access by accessing
only dci supported peripheral feature.
Bug: 31864832
CRs-Fixed: 1074901
Change-Id: I99b7feb4b9af8480912a0a3b3e9834f0ecd92189
Signed-off-by: Manoj Prabhu B <bmanoj@codeaurora.org>
Disable PLL droop detection and update the OSM timer settings
on MSMCOBALT.
CRs-Fixed: 1072855
Change-Id: I1f769f9ff5a0bab594593c3deaec264a9060c28f
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
User SSR triggers a SYS_ERROR from the hardware.
However the driver cannot detect if the error is
due to user SSR or other reasons. Handle SYS_ERROR
due to user SSR as non-fatal
CRs-Fixed: 1054921
Change-Id: I4151b6bfb24e55c1f1a38bfdca012f7b7af86603
Signed-off-by: Umesh Pandey <umeshp@codeaurora.org>
Declare the rcg structure before referencing it in the
function.
Change-Id: Ife9fdabf20b242a93635532b9a0c4cacc8b88210
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
OTG devices with high capacitance could cause a system UVLO
due to a large amount of in-rush current drawn from battery.
Fix this by regulating the OTG boost start and altering PFM
threshold in software.
CRs-Fixed: 1048244
Change-Id: I08838d81eb99a424a3fd396582c56b120cbb46cb
Signed-off-by: Harry Yang <harryy@codeaurora.org>
PMICv2 added irq support to tell if DCP is not QC charger.
Update charger driver for this HW change.
Change-Id: Ic75e2f1d528e6bbb3cf14c842b803bf4ebca8ad8
Signed-off-by: Harry Yang <harryy@codeaurora.org>
USB charger voltage votes indenpently, along with ICL through
intermediate USBIN votable.
This change can correctly capture strong chargers by
monitoring input voltage or charger type.
CRs-Fixed: 1069575
Change-Id: I36843279fdac909966b3f01b5a6716d191fab903
Signed-off-by: Harry Yang <harryy@codeaurora.org>
The current driver simply skips checking for other events in the
typec change interrupt if an vbus error is seen. This could cause
parallel charging to never get enabled among other issues.
Fix is by simply printing a debug messages for vbus-error and
handling other events.
CRs-Fixed: 1069575
Change-Id: Ic2df178430b80ade1dea9aff7dbf8e08bb9c2310
Signed-off-by: Harry Yang <harryy@codeaurora.org>
The issue results from a earlier wrong assumption that parallel
psy is available when master side is ready. The happens on boot
with a strong charger attached, when FCC callback is about to
redistribute charging currents while parallel charger has not
yet probed, hence pl psy is invalid when accessed.
This issue is fixed by introducing parallel charger as a parallel
charging voter, which is also convenient for debugging purpose.
CRs-Fixed: 1059499
Change-Id: Ic96d30a02c966704d98e047602e4292f576fe448
Signed-off-by: Harry Yang <harryy@codeaurora.org>
Before going for full PLL enable sequence, we need to clear out the
override bit and precalibrated values of VCO_TUNE and KVCO_CODE, as
these registers might be storing values for old VCO rate. This will
cause the DSI PLL to be in a bad state and hence PLL unlock errors
might occur during use case like resolution switch. So always clear
the precalibrated values first in PLL configuration sequence.
Change-Id: I407920d63b4600b610794141e5b7ceb5a33980c1
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Currently, charging status is shown as full for both the charge
termination and inhibit cases. However, there is a need to know
when the charge termination really happens.
Add charge_done property to qpnp-smb2 driver so that the clients
can read that property to distinguish termination and inhibit.
Change-Id: If2bd750af412adf1eea7b913caed9a3eb3b763db
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
When the battery is missing from the device the battery power supply
will still report that it is charging. Fix this by reporting the charge
status as "not charging" when the battery is missing.
Change-Id: I1150ccaa722109f3ea6a4a10e026709d3686e28b
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Currently, we configure charger to end the charging cycle when
battery overvoltage is detected. This ends up the charging cycle
prematurely sometimes when charging phase transitions from fast
to taper. Disable this.
Change-Id: I8ac486fcb10e823671a8e8b438b7fc76a8969b7c
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Currently mtp function driver is skipping function
setup call back by not populating function pointer
in function instance. Also, is_ptp flag is set
incorrectly as true for mtp instance which would
pass wrong os descriptor for mtp and ptp instance.
Allow mtp driver to send os descriptor by populating
function pointer in function instance and correctly
set the is_ptp flag to pass valid os descriptors.
Change-Id: Iec05a2f9309aba7d9ff81eca4ce683eff1590699
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Consider recent history (residencies) of the cluster and core
low power modes while the cluster level low power mode to enter
is selected.
Change-Id: Ifdc847a71136f55aded8a758b92179bb9aebfdcb
Signed-off-by: Srinivas Rao L <lsrao@codeaurora.org>
Consider recent history (residencies) of the low power modes per
core while the next low power mode to enter is selected. If most
of the history says the pattern of residencies is repeating with
minimal deviation then use the average of these for predicting
the next mode to enter.
If the pattern is not repeating then if more than 50 percent of
the samples out of history have exited a low power mode earlier
than the minumim residency of that mode, restrict it and also low
power modes deeper than that.
In any of the above case, trigger a hrtimer to wakeup cpu with
timeout as predicted+delta or max residency of the mode selected
if a deeper state can be selected after waking up incase if
prediction goes wrong.
Change-Id: I902a06939e19ac51dfd8c2db6b727b203ebfda14
Signed-off-by: Srinivas Rao L <lsrao@codeaurora.org>
