Currently MDSS HW can support maximum of 5 active ctl paths, so the size
of the container array holding all ctl paths is also 5. Now current code
has a limitation where it doesn't allow rotator2 to be used if number of
DSPP based interfaces are 4, which is the case for apq8084. This can lead
to sub-par performance when more than 1 rotator sessions are needed
simultaneously. Fix this by allowing last 2 spots of the ctl path
container array for rotator.
Change-Id: I40e968141d92ce6272072d9b5b8c59402d8a543c
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Move platform specific configuration out of panel driver so
that it can be reused for different platform.
Change-Id: If7ef3c4576f554675ba4d36eac21fc3e5152ea67
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
When a pipe is staged with a solidfill color, we need to also
program the correct unpack pattern for the color format. If the
unpack pattern is not specified, the corresponding color layer may
not be display correctly.
Change-Id: Ic52fe29235813faa788745dd72f82edaca2635f1
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Current code detects two adjacent surfaces as if those were overlapping,
this can impact by increasing the bandwidth calculations in this scenario.
These changes correct the algorithm to avoid the overlap in boundaries
that are only adjacent.
Change-Id: Iee43c1662c90c38dbff03991ee93884ef444fb19
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Currently ctl->mfd is not populated for rotator sessions. If
mdss_mdp_mixer_get is called by rotator session then it will always
fail the NULL check for ctl->mfd. This will flood the logs for every
rotator commit and can lead to un-predictable outcome. Fix this by
properly handling rotator case in mdss_mdp_mixer_get.
Change-Id: Ib1896149302bd60b99028ae26df2393fab30dd6e
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Assertive display is not allowed on HDMI and WFD configurations.
However, since WFD uses the writeback path, and AD uses the
writeback path for earlier hardware, then we must check which
hardware configuration is being used when checking writeback
panel configuration to prevent or allow AD.
Change-Id: I85f7380d0345cad7785ed41e22df559bc5c1618e
Signed-off-by: Benet Clark <benetc@codeaurora.org>
In order to enable/disable histogram interrupts, the interrupt
bit mask is programmed to the same histogram interrupt register for
all DSPPs. However, DSPP3's bit mask does not follow the typical
offset. We must add a special case for that interrupt bit shift.
Change-Id: Ia76a7eb0e56e30b657968ea776579c53ff43e390
Signed-off-by: Benet Clark <benetc@codeaurora.org>
There was a missing spinlock around a histogram variable that needs
locking when being read. It has been added.
Change-Id: I78ca9652ecf6e08168842b17000aabf6b6308d4c
Signed-off-by: Benet Clark <benetc@codeaurora.org>
The histogram completion structures are initialized in pp_init, in
order to avoid the wait_queue initialization being called multiple times.
The init_completion in hist_enable has been replaced with a safer
function that does not modify the wait_queue.
Change-Id: If4dfc6a74069d9adc867131201e6f74c3c81c1ac
Signed-off-by: Benet Clark <benetc@codeaurora.org>
fb_event_callback() is what is responsible for cancelling the
delayed_work when it gets the FB_BLANK_POWERDOWN event. However,
this event occurs after the panel & DSI have been turned off. So
if the check_status function was being called right when the panel
is being turned off, we have a race conditon. Hence check
shutdown flag to avoid bta status check when dsi is being turned off.
Change-Id: I103bafb4ab63be83c47dfd6b3bad06d36704ff68
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
When rotator fails, the rotator fences will never be signaled through
rotator completion. For this case still need to release the sync fences
as the source buffers will no longer be used for this session.
Change-Id: Idfb2a4b042e89f28d19b10db8e77e06bebad8459
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Currently, the histogram register address and the hist interrupt
bit shift were initialized during hist_enable. However, these values
are needed earlier in histogram info initialization. These values
are now initialized when the hist_info structures are allocated.
Change-Id: Ic82fa3da479b59b88bca5aae6f04b32f97182bc3
Signed-off-by: Benet Clark <benetc@codeaurora.org>
When secure UI session is in progress, need to make sure that the
buffers are released as soon as pipe is freed to make sure secure
session can be properly terminated without any secure UI buffers
remaining as mapped.
CRs-Fixed: 619802
Change-Id: Ia2fa87f3182efc170304a53eb8d6b3f614355245
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Previously, during histogram setup during dspp setup, there
was a check on histogram collection enable that was not protected
by the histogram mutex and spinlock. It has been added.
Change-Id: I28770486d31da6b9b8b7420e98f0e6a5a23ed0c2
Signed-off-by: Benet Clark <benetc@codeaurora.org>
Before setting the histogram state back to ready or idle, check if
the histogram has been disabled to prevent state corruption.
Change-Id: I3973eee852dfcd522bed639a22faa2519d1f2646
Signed-off-by: Benet Clark <benetc@codeaurora.org>
The histogram state and collect enable need a spinlock around them when
being read or written to. There were a couple places where the spinlock
wasn't held when the variables were being checked. The number of spinlock
accesses has been reduced in collect as well.
Change-Id: Ic0369667b5b2bf83a19098f876f3ab48f9dcfbda
Signed-off-by: Benet Clark <benetc@codeaurora.org>
There is a histogram variable that was missing the spinlock
while it was being read. It has been added.
Change-Id: I2d726ab5b7b0a9a43b8421f8935780c09df752c0
Signed-off-by: Benet Clark <benetc@codeaurora.org>
In the command mode panel, the mdp pixel data is using the
dsi command mode engine which is shared with the dsi dma
transaction. This change makes sure there is no pending
mdp dma before issuing the dsi bta request.
Change-Id: Ida99e973c2bf73757726134ba7e2ad2df9e6eb02
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
Track two states where the BW is needed for the command mode panels
and prevent the BW vote to be released during any of those two states:
1. SW Commit State: This state is the time when the SW has requested
a BW vote, and it will be processing it; it starts at the beginning of
Commit and finish once the kickoff is issued.
2. HW MDP State: This state is the time when the HW is busy
doing the actual transaction, so bandwidth must be kept until
HW finishes; it starts at the beginning of the kickoff and finishes
once the ping pong done interrupt is received.
Change-Id: I2e56128be3ab25a1b065692ae76387a3cd383df3
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Use non-cacheable memory for command buffer, then need not
invalidate_caches after each update.
Change-Id: I72a5d3f034d24952c51edb88bb66489fbc308f1f
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
Read panel alignment restrictions on left, top, width and height values of
the updating ROI from the dtsi file and share through sysfs node.
Framework needs these details for configuring MDP for certain
features (e.g. Partial frame update).
Change-Id: Ibe6973b721bb20120a6d7a217bad2d0d159cc836
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
When pipe is not idle during cleanup, MDP can go into an unrecoverable
state, which can lead into other issues. If it gets to this point we
need to recover even if it means changing display contents for a
fraction of time. To handle this follow recovery sequence:
1. Setup the pipes that are not idle to solid fill mode so that nothing
is fetched from memory on these pipes.
2. Stage them into mixer, flush and wait for a vsync to happen and reset
sequence to take effect on these.
3. Finally, reattach the current frame pipes to restore display back to
normal.
Change-Id: If545b56bf32a46699871381d86e80c1980ec3cc7
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Earlier the bandwidth check is done after applying an ib_fudge.
This causes some valid use cases to fall back to GPU. Perform
bandwidth check against the actual value without considering
any fudges.
Change-Id: I09d10724c473c76ade8cf2a2b8d1bda9862816a2
Signed-off-by: Anusha Koduru <kanusha@codeaurora.org>
There are cases where vsync enable may happen before panel has been
turned on. In this case MDP clocks and specially DSI clocks shouldn't
get turned on if the panel is not ready yet. Add a check to ensure
clocks are not turned on and wait for panel to be turned on later on,
vsync events will be enabled then.
Change-Id: I522a1ecafc3949582e049d247a443725672d2d47
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
While merging to 3.14 kernel this is only display
related changes for commit below
Change ID: Ie0d5b104882d1534fae262af85e99cc09a56ab04
msm: msm_bus: Move bus scaling to platform drivers
Change-Id: Id726a65b5641b57c0edd3ba33f2e5b3f68aff643
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
This makes sure that the userspace correctly interprets the end
of the vsync timestamp.
Change-Id: I66f9939658b6fb7531468429c1ca3e551a4a285c
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
For a given logical display, use the correct control path to calculate
the frame size. Previously, we were using a control path assuming the
first mixer is used for primary display.
Change-Id: Ic8b0c1ab9fb802825a0abdb334efac6ea376ad65
Signed-off-by: Benet Clark <benetc@codeaurora.org>
The histogram interrupt request function requires a type associated
with the request. The type depends on suspend, resume, and new requests
in general. Previously, the new requests type was assumed if it was not
SUSPEND or RESUME. However, now REQ type is no longer assumed as the last
option.
Change-Id: I25f6bd7f58ae24301df2552fa8330df8543db277
Signed-off-by: Benet Clark <benetc@codeaurora.org>
During Linux Bootloader to kernel transition, kernel's first call
to overlay_set would reconfigure dma source configurations. This
reconfiguration could happen before vsync but the corresponding
call to overlay_commit would occur after the vsync. This race
condition could cause artifacts to appear on screen. This issue
only occurs on video mode panels.
Change-Id: I1c1274a9c32cb74276162e74c22ad35afef0eb7c
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
Currently there is no use case for enabling AD on HDMI path. This check
is already present in mdss_ad_init_checks(), but that does not prevent
mdss_mdp_ad_setup() from being called. So invoke mdss_mdp_ad_setup() only
if display panel is not of HDMI type.
Change-Id: I175fcdbb0cc4ccda31d3fc8074b1e0213e0af10a
Signed-off-by: Ping Li <quicpingli@codeaurora.org>
Wait for completion in notify update call are uninterruptible
causing excessive delay during suspend cases. Making them
interruptible.
Change-Id: I1a4ff6ce3e0add21d4e46a41372b076b277d10f5
Signed-off-by: Krishna Chaitanya Parimi <cparimi@codeaurora.org>
Previously, complete_all was called during histogram disablement before
the histogram interrupts were disabled, which can lead to issues if an
interrupt comes in between complete_all and interrupt disablement. Now,
complete_all is called afterwards, which guarantees no more interrupts
will come.
Change-Id: I1910e59b27ae55dbb2ed89373e2af614ef6a9808
Signed-off-by: Benet Clark <benetc@codeaurora.org>
Fast plug out/in of HDMI cable may result in race condition
between power on and off of HDMI tx core when downstream device
or bridge device is connected. Wait for power off to complete,
if already underway, before power on.
CRs-Fixed: 620429
Change-Id: I12cfa65052fa4e23fd1ad6d3f9ae45047d65970b
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
Allow userspace to poll on the blank event to avoid triggering
unnecessary updates, such as when shutting down the device.
CRs-Fixed: 627814
Change-Id: I36bb7845edba14ba0b0ddbe43eaf3d386af2d5f1
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
The gamut mapping data does only occupies 13 bits of the register.
Therefore, we should force the data that is written to be masked to
be the least significant 13 bits.
Change-Id: I37503ca3a46d9cb2cb1692763f301ae1d10f9d28
Signed-off-by: Benet Clark <benetc@codeaurora.org>
Add support to send panel Off commands for video mode during LP
mode. This is needed to support few video mode panels which have
BLLP power mode set to HS and it is not possible to send Off
commands when pixel data is active. Hence, make changes to send
panel Off commands for such panels in LP mode after TG is
turned off.
Change-Id: I1c9f3fd1e9e052b5254cfdcf58cd974dfbe3dc8e
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Add pinctrl support for the installation
of the required GPIOs from DT. Document
properties in bindings.
Make appropriate changes in the driver to
initialize and set the pins to active and sleep
states during unblank and blank stages respectively
in DSI driver.
Change-Id: Ib58d9162d915adace38ca36a0a3af9fa964d8039
Signed-off-by: Manoj Rao <manojraj@codeaurora.org>
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
When attempting to read gamut mapping data from the hardware, the gamut
LUTs were read incorrectly because the LUT index was not reset to 0
before reading. Furthermore, the data read from the register was not
masked correctly before being copied to user.
Change-Id: Ic8a99d7987578fa959fa1b5fd5f1ec6966e60409
Signed-off-by: Benet Clark <benetc@codeaurora.org>
Priority is returned by the driver when overlay is set for the first
time. It indicates the priority of the underlying pipe serving the
overlay. This priority can be used by user-space in source split when
pipes are re-used and shuffled around to reduce fall-backs related
priority restrictions.
Change-Id: Ibfda0280279e7057a1d3494f4e5f68962b26ef4a
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Default value of panel mode gpio is set to 0 which is still a
valid gpio and preventing access to legitimate owners when not
provided explicitly in device tree file. This patch addresses
the issue by changing default value to -EINVAL.
Change-Id: Ifc34513d21323af9843f6bbc85a3afca79891357
Signed-off-by: Vishnuvardhan Prodduturi <vproddut@codeaurora.org>
Source split feature relaxes some of the old MDP HW limitations and
enables newer use-cases. This feature is available from MDSS 1.3.0 onwards.
Some of the key highlights are:
* single pipe can be staged on two layer mixers.
* two pipes can be staged at a single blending stage given left pipe
on that stage is higher priority compared to the right pipe.
* Ex. 1080p video on can be played on a dual-dsi panel using single
pipe compared to two pipes without this feature, saving power.
* Ex. using above features, two pipes can equally split the load of a high
downscaling surface and thus reducing peak bandwidth requirements.
Change-Id: Ia08e37aca2ab0e80db6aef6c8e5ef37149b84e3a
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
[cip@codeaurora.org: Resolved merge conflict]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Overlay kickoff in certain situations can be called without a ctl
attached to the frame buffer device. These situations need to
be captured and logical path should return safely.
CRs-fixed: 619588
Change-Id: Ibee6b59be667b7e5c9841ffb49c67d86bde45026
Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
For msm8974 and earlier targets, there are only 3 DSPP pipes, so
we only need three bits for the DSPP_MASK. However, apq8084 has
four DSPP pipes, hence we need to modify the IGC read/write functions
to correctly configure IGC on all the DSPPs available on targets.
Change-Id: Ief6d27fbe52235919a411189f3a1c8bbef08cb45
Signed-off-by: Ping Li <quicpingli@codeaurora.org>
Add spin_lock to mdss_lock inside mdss_disable_irq_nosync
to avoid race condition which can cause mdss_irq to be disabled
while irq_mask bits are still set.
CRs-Fixed: 624806
Change-Id: I44074a057dff49dfc7a4d2829f3c4e599dca4a69
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Pipe halt is requested when pipe is no longer in use or when pipe
is initialized to be used. Now if there is a mismatch between SW state
of pipe being use and HW state then it can lead undesirable issues.
Issue panic if halt is requested while pipe is still in use by HW.
Change-Id: I11d20611eeb3cb991a4dc3e580fb83d86289b68d
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
The DSI PHY register offset from the controller base is
different for different targets. So, add a separate register
region for DSI PHY in the device tree. This register base and
offset will be used to access the DSI PHY registers. Also
change the register offsets which are dependent on the
controller base address.
Change-Id: Ie1d08950f3c8c8801908a1b3cf7db46a44b4e8c3
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
While merging to 3.14 kernel this is only display
related changes for commit below
Change ID: Ib7bbce1485d6185f669935b507040cac75368985
iommu: move iommu header files to new locations
Change-Id: Iccf318fa31c0308f7b471c0639bf06aba4650ebe
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
When split display is enabled, two control paths are active. Currently
only primary ctl path is handed off in overlay handoff. Extend this
handoff to secondary ctl path when split display panel is connected.
Change-Id: If071f8f0886c811b46c574529526b40e55351409
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
If pipe is supposed to be halted using SW reset assert, extend
assert of SW reset until corresponding VBIF client is halted.
Change-Id: Iabe6a2c6302483fc9d14cedbd1480bb6c644597e
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
