Change code setting special-function and no pull-up to use
the s3c_gpio_cfgrange_nopull() wrapper.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Change code setting special-function and no pull-up to use
the s3c_gpio_cfgrange_nopull() wrapper.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
A number of the SDHCI code configure a GPIO to a special function
and remove any pull-up, so add s3c_gpio_cfgrange_nopull() as a
wrapper to the s3c_gpio_cfgall_range() to make the code that
calls it fit on one line.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch changes the code setting range of GPIO pins' configuration and
pull state to use the recently introduced s3c_gpio_cfgpin_range().
NOTE: This is for missed things from the previous patch.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch changes the code setting range of GPIO pins' configuration and
pull state to use the recently introduced s3c_gpio_cfgpin_range().
NOTE: This is for missed things from the previous patch.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch changes the code setting range of GPIO pins' configuration and
pull state to use the recently introduced s3c_gpio_cfgpin_range().
NOTE: This is for missed things from the previous patch.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch changes the code setting range of GPIO pins' configuration and
pull state to use the recently introduced s3c_gpio_cfgpin_range().
NOTE: This is for missed things from the previous patch.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Change the code setting a range of GPIO pins' configuration and
pull state to use the recently introduced s3c_gpio_cfgall_range().
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Change the code setting a range of GPIO pins' configuration and
pull state to use the recently introduced s3c_gpio_cfgall_range().
Mop up a few missed s3c_gpio_cfgpin_range() changes.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Change the code setting a range of GPIO pins' configuration and
pull state to use the recently introduced s3c_gpio_cfgall_range().
Mop up a few missed s3c_gpio_cfgpin_range() changes.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Change the code setting a range of GPIO pins' configuration and
pull state to use the recently introduced s3c_gpio_cfgall_range().
Mop up a few missed s3c_gpio_cfgpin_range() changes.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Change the code setting a range of GPIO pins' configuration and
pull state to use the recently introduced s3c_gpio_cfgall_range().
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Change the code setting a range of GPIO pins' configuration and
pull state to use the recently introduced s3c_gpio_cfgall_range().
Mop up a few missed s3c_gpio_cfgpin_range() changes.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
[kgene.kim@samsung.com: Fix small comments]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add a function to configure a range of GPIOs function and
pull in one go, mainly for the SDHCI and framebuffer helpers
which tend to do this.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
[kgene.kim@samsung.com: Fix small comments]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch changes the code setting ranges of GPIO pins in mach-s5pv310 using
s3c_gpio_cfgpin() to use the recently introduced s3c_gpio_cfgpin_range().
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Change the code setting ranges of GPIO pins using s3c_gpio_cfgpin() to
use the recently introduced s3c_gpio_cfgpin_range().
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
[kgene.kim@samsung.com: coding-style fixes]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Change the code setting ranges of GPIO pins using s3c_gpio_cfgpin() to
use the recently introduced s3c_gpio_cfgpin_range().
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
[kgene.kim@samsung.com: Fixed wrong change]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch changes the code setting ranges of GPIO pins in mach-s5p64x0 using
s3c_gpio_cfgpin() to use the recently introduced s3c_gpio_cfgpin_range().
NOTE: This is for missed things from the previous patch.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Change the code setting ranges of GPIO pins using s3c_gpio_cfgpin() to
use the recently introduced s3c_gpio_cfgpin_range().
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
[kgene.kim@samsung.com: modified to s5p64x0 from s5p6440]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Change the code setting ranges of GPIO pins using s3c_gpio_cfgpin() to
use the recently introduced s3c_gpio_cfgpin_range().
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
[kgene.kim@samsung.com: fixed wrong change]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Change the code setting ranges of GPIO pins using s3c_gpio_cfgpin() to
use the recently introduced s3c_gpio_cfgpin_range().
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
To aide in changing the gpio code, remove the use of pin-specific configs
and move to using the S3C_GPIO_SFN() versions.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Add s3c_gpio_cfgpin_range() to configure a range of pins to the given
value. This is useful for a number of blocks where the pins are in order
and saves multiple calls to s3c_gpio_cfgpin().
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
With the v4l2_i2c_new_subdev* functions now supporting loading modules
based on modaliases, remove the module names hardcoded in platform data
and pass a NULL module name to those functions.
All corresponding I2C modules have been checked, and all of them include
a module aliases table with names corresponding to what the soc_camera
platform data uses.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
FB_OMAP2 can work without VRFB, but currently does not build. Fix this.
Signed-off-by: Senthilvadivu Guruswamy <svadivu@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
Simplify conditional: (a || (!a && !b)) => (a || !b)
Signed-off-by: Nicolas Kaiser <nikai@nikai.net>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
Calls init functions of dss_features during dss_probe, and the following
features are made omapxxxx independent:
- number of managers, overlays
- supported color modes for each overlay
- supported displays for each manager
- global aplha, and restriction of global alpha for video1 pipeline
- The register field ranges : FIRHINC, FIRVINC, FIFOHIGHTHRESHOLD
FIFOLOWTHRESHOLD and FIFOSIZE
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
get_fbmem_region() is only called by omapfb_reserve_sdram_memblock() and
omapfb_reserve_sram() that both live in .init.text. So get_fbmem_region
can go there, too.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
This function is only called by omap_detect_sram which lives in .init.text,
too.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
omap_init_fb() is only called as arch_initcall and so can live in
.init.text.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
Commit ab69bcd66f (arm: remove
machine_desc.io_pg_offst and .phys_io) could not update
the new boards in the omap tree. This causes the build of
omap2plus_defconfig to fail. Fix this.
Signed-off-by: Anand Gadiyar <gadiyar@ti.com>
Cc: Nicolas Pitre <nicolas.pitre@linaro.org>
Cc: Eric Miao <eric.miao at canonical.com>
[tony@atomide.com: updated description]
Signed-off-by: Tony Lindgren <tony@atomide.com>
On OMAP24xx, UART2 WKEN and WKST registers are in PM_WKEN2_CORE and
PM_WKST2_CORE respecitvely. Fix the OMAP2 register init to use the
correct registers on OMAP24xx.
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This fixes a warning
warning: (IMX_HAVE_PLATFORM_FLEXCAN && ARCH_MXC) selects HAVE_CAN_FLEXCAN which has unmet direct dependencies (NET && CAN)
(The warning in general exists since
246cf9c (kbuild: Warn on selecting symbols with unmet direct dependencies)
which was reverted between 71ebc01 and b1f7d6e.)
Reported-and-introduced-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* 'llseek' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/bkl:
vfs: make no_llseek the default
vfs: don't use BKL in default_llseek
llseek: automatically add .llseek fop
libfs: use generic_file_llseek for simple_attr
mac80211: disallow seeks in minstrel debug code
lirc: make chardev nonseekable
viotape: use noop_llseek
raw: use explicit llseek file operations
ibmasmfs: use generic_file_llseek
spufs: use llseek in all file operations
arm/omap: use generic_file_llseek in iommu_debug
lkdtm: use generic_file_llseek in debugfs
net/wireless: use generic_file_llseek in debugfs
drm: use noop_llseek
this patch gives the possibility to workaround bug ENGcm09152
on i.MX35 when the hardware workaround is also implemented on
the board.
It covers the workaround described on page 25 of the following Errata :
http://cache.freescale.com/files/dsp/doc/errata/IMX35CE.pdf
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
AM35x has musb interface (version 1.8) and uses CPPI41 DMA engine.
It has USB phy built inside the IP itself.
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This patch converts arm to use asm-generic/ioctls.h instead of its
own version.
The differences between the arch-specific version and the generic
version are as follows:
- ARM defines its own value for FIOQSIZE, asm-generic/ioctls.h keeps it
- The generic version adds support for termiox
Reviewed-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Jeff Mahoney <jeffm@suse.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Currently, only two operating points: 160Mhz and 800Mhz.
the operating points are tested on babbage 3.0
Signed-off-by: Yong Shen <yong.shen@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* 'core-memblock-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (74 commits)
x86-64: Only set max_pfn_mapped to 512 MiB if we enter via head_64.S
xen: Cope with unmapped pages when initializing kernel pagetable
memblock, bootmem: Round pfn properly for memory and reserved regions
memblock: Annotate memblock functions with __init_memblock
memblock: Allow memblock_init to be called early
memblock/arm: Fix memblock_region_is_memory() typo
x86, memblock: Remove __memblock_x86_find_in_range_size()
memblock: Fix wraparound in find_region()
x86-32, memblock: Make add_highpages honor early reserved ranges
x86, memblock: Fix crashkernel allocation
arm, memblock: Fix the sparsemem build
memblock: Fix section mismatch warnings
powerpc, memblock: Fix memblock API change fallout
memblock, microblaze: Fix memblock API change fallout
x86: Remove old bootmem code
x86, memblock: Use memblock_memory_size()/memblock_free_memory_size() to get correct dma_reserve
x86: Remove not used early_res code
x86, memblock: Replace e820_/_early string with memblock_
x86: Use memblock to replace early_res
x86, memblock: Use memblock_debug to control debug message print out
...
Fix up trivial conflicts in arch/x86/kernel/setup.c and kernel/Makefile
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
CC: Olof Johansson <olof@lixom.net>
CC: Gary King <GKing@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
Change-Id: Ibd0bcd46895eb88952b9db29e1f68572d39aae01
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Acked-by: Arnd Bergmann <arnd@arndb.de>
CC: Russell King <linux@arm.linux.org.uk>
CC: Gary King <GKing@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
The APB DMA block handles DMA transfers to and from some peripherals
in the Tegra SOC. It reads from sequential addresses on the memory
bus, and writes repeatedly to the same address on the APB bus.
Two transfer modes are supported, oneshot for transferring a known
size to or from a peripheral, and continuous for streaming data.
In continuous mode, a callback occurs when the buffer is half full
to allow the existing data to be handled and a new request queued.x
v2 changes:
dma API no longer uses PTR_ERR
Signed-off-by: Erik Gilling <konkers@android.com>
Signed-off-by: Colin Cross <ccross@android.com>
Implement cpufreq support for the Tegra SOC. DVFS is handled by the
core virtual cpu clock. The frequencies of the two cores are tied
together, the highest frequency requested by either core determines
the actual frequency.
Signed-off-by: Colin Cross <ccross@android.com>
- Add drivers to clock lookup table
- Add new pll_m entries
- Support I2C U16 divider
- Fix rate reporting on 32.768kHz clock
- Call propagate rate only if set_rate succeeds
- Add support for audio_sync clock
- Add 24MHz to PLLA frequency list
- Correct i2s1/2/spdifout mux
- Add suspend support
- Fix enable/disable parent clocks in set_parent
- Add max_rate parameter to all clocks
- DVFS support
- Add virtual cpu clock with dvfs
- Support clk_round_rate
- Fix requesting very high periph frequencies
- Add quirks for PLLU:
PLLU is slightly different from the rest of the PLLs. The
lock enable bit is at bit 22 instead of 18 in the MISC
register, and the post divider field is a single bit with
reversed values from other PLLs.
- Simplify recalculating clock rates
- Fix UART divider flags
- Remove unused clock ops
Signed-off-by: Colin Cross <ccross@android.com>
The Tegra SOC contains fuses to identify the CPU type and
bin, and a unique id. The CPU info is required to determine
the correct voltages for each cpu and core frequency.
Signed-off-by: Colin Cross <ccross@android.com>