As GPIO 54 has already been connected to an external
pull up resistor, config it to no pull to save power
consumption.
CRs-Fixed: 2015121
Change-Id: Id13588be53b8756e4d9792035bcc6adfbaa8c3f7
Signed-off-by: xiaonian <xiaonian@codeaurora.org>
Add backend user count checking to protect the index
boundary.
Change-Id: Ic1b61d1f7130252cc54da0b16553858714988dbd
CRs-Fixed: 2009216
Signed-off-by: Walter Yang <yandongy@codeaurora.org>
Mark AIF4 MAD TX as ignore suspend so that MAD path
will not power down during suspend mode.
CRs-Fixed: 2003858
Change-Id: Iae55e2778edcdd8efa6ae13b746795d8a1594a41
Signed-off-by: Walter Yang <yandongy@codeaurora.org>
HIFI headphone path is not present in sdm660 qrd board.
So there is no need to add these two hph_en nodes under tasha node.
These two nodes get initialized by msm_cdc_pinctrl driver and make
gpio24/25 as output low, which causes some power leakage.
Remove these two hph_en nodes for sdm660 qrd.
Change-Id: I527ce45296cd3b168bea67804e0909f668f74221
CRs-Fixed: 2011375
Signed-off-by: Walter Yang <yandongy@codeaurora.org>
Currently the HVDCP auth IRQ is only enabled upon USB removal. When APSD
is rerun the USB type is not updated to HVDCP_3 since the IRQ was
disabled.
Fix this by enabling the HVDCP auth IRQ before APSD is rerun.
Change-Id: Ic9ec2dca5915651864582abea9165ca8c4290169
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Remove the code to dump the CCI registers in msm_cci_wait.
Clock access to the CCI may be halted and may potentially cause
a crash while accessing the registers.
CRs-Fixed: 2005506
Change-Id: I6c7e61dc3ebc0a599e801acfedb98f523beb090b
Signed-off-by: Rajesh Bondugula <rajeshb@codeaurora.org>
As the best clocksource is not selected till core boot completion,
only periodic tick timer works and it increases jiffies by one at
every tick updates. If interrupt is disabled more than one tick(10ms),
timer interrupts are missed and jiffies can't be updated at every
10ms and it can be behind the real time. So make it possible to select
the best clocksource right after arm arch timer initialization, so that
jiffies can be increased by multiple counts since then.
Change-Id: Id8c4e3ce9b9e44061fef7ad7e678ca1c27d84bb1
Signed-off-by: Se Wang (Patrick) Oh <sewango@codeaurora.org>
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
As the best clocksource is not selected till core boot completion,
only periodic tick timer works and it increases jiffies by one at
every tick updates. If interrupt is disabled more than one tick(10ms),
timer interrupts are missed and jiffies can't be updated at every
10ms and it can be behind the real time. So add API to force re-
selection of the best clocksource among registered clocksources so
that the best clocksource can be selected whenever it is available.
Change-Id: I481de3cdf1df8f0e35ed10aee7ab3882bf7a35b3
Signed-off-by: Se Wang (Patrick) Oh <sewango@codeaurora.org>
Signed-off-by: Prasad Sodagudi <psodagud@codeaurora.org>
In SDM660 internal codec drivers, both platform dev probe and
snd_soc codec probe allocate different structures but
update allocated address pointer to same driver data info.
This causes override of earlier structure location.
Combine the structures to make single codec private data.
CRs-Fixed: 2012230, 2013959
Change-Id: I6c6c43f408fb00003ca43d78919f54ba87f37ffd
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
Setting adsp cma region to 8MB, as cma region need to be 4MB aligned.
Acked-by: Chenna Kesava Raju <chennak@qti.qualcomm.com>
Change-Id: I7f774dd193435f045243b34fc0d4f2a9ff24329f
Signed-off-by: Tharun Kumar Merugu <mtharu@codeaurora.org>
Enable common Cx ipeak driver for various multimedia
clients like GPU, MDP, Venus and Camera modules.
This is needed to handle Cx ipeak limit on SDM660.
Change-Id: I95a46964fdf9df48cc0aeb2891426f88c1ff72f9
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
SPDM feature requires to be enabled, so add SPDM settings
for APPS CPU bus client.
Change-Id: I35fdafcefebcd3fb6e59f3e55bb68d07403abc74
Signed-off-by: Odelu Kukatla <okukatla@codeaurora.org>
Update the proper GPIO configuration for the QDSS so that CTI output can be
mapped to the GPIO to generate the proper trigger.
Change-Id: Icc8915522f9c5707869572cf80b7bd345d59eca4
Signed-off-by: Charan Teja Reddy <charante@codeaurora.org>
Setting adsp cma region to 8MB, as cma region need to be 4MB aligned.
Change-Id: Idf7865712a97870fd56d1957b464b98fb92fad2a
Acked-by: Chenna Kesava Raju <chennak@qti.qualcomm.com>
Signed-off-by: Tharun Kumar Merugu <mtharu@codeaurora.org>
Core 6 (MPIDR:0x102) and core 7 (MPIDR:0x103) are not
present in SDM658, SDA658 variants; so make relevant
updates to disable the cpu and other device nodes for
them.
Change-Id: I4633a3c36d367cc4ed5bbca525087d3d1cb57421
Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
Add sub-device node to allow mba to be able to load in carveout
memory region for SDM630.
Change-Id: Id249ca6512732572b9dce8d59b2e2713caaa7f9e
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
Return immediately from idle enter if there is no mode
selected. Log idle exit as failure to enter LPM in the
events that cpu needs to be rescheduled for another task.
Change-Id: I25a444682a8f8c9060f426c03e2f183f86d2fa3a
Signed-off-by: Maulik Shah <mkshah@codeaurora.org>
cti-lpass0 and cti-lpass1 are not accessible as few of clocks/regulators
are not enabled to trigger the LPASS CTI.This cause device crash on
triggering the LPASS CTI on sdm660.Thus lpass-cti's are removed as
they are not planned to support from HLOS.
Change-Id: I76f81086919ea38b6966106f8ee6141baee183d6
Signed-off-by: Saranya Chidura <schidura@codeaurora.org>
The source clock of MMPLL10 has better jitter specs for MCLK than GPLL0_DIV
clock, so update the same to obtain 24MHz clock.
Change-Id: I57a77a83a5028c85d82fda4af53732f0bfb263e7
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Add MBA carveout of size 2MB after ADSP region and a buffer
region of size 1 MB in sync with v3 memory map.
Change-Id: Iaab9c43310d9ee4764ac73367bff3a448ea1f4d4
Signed-off-by: Prakash Gupta <guptap@codeaurora.org>
This now declares a module parameter, so include the necessary
header file for that.
Change-Id: I430c996ef2d35d0af86ab0822baccdf477db229e
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Git-commit: 949c2d0096753d518ef6e0bd8418c8086747196b
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git
Signed-off-by: Maya Erez <merez@codeaurora.org>
In core_channel_cleanup function channel is moved to dummy xprt
without taking channel lock. This leads to race condition where
transport poniter is pointing to dummy but channel still belong
to old transport.
Channel is moved to dummy with channel lock.
CRs-Fixed: 2005731
Change-Id: I91903140c1bfa29d909847f318d1339bb717fffc
Signed-off-by: Dhoat Harpal <hdhoat@codeaurora.org>
Enable Cx ipeak support for multimedia clients to handle peak
current limit using common Cx ipeak driver.
Change-Id: I3366986369e9742fb8e2560b99f28224abe828d3
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
Currently, NULL pointer checks are missing in mask
update functions which might lead to NULL pointer
dereference issues. This patch fixes the issue by
adding appropriate checks.
CRs-Fixed: 2015104
Change-Id: I9df99208e283c8d90921c6e20a6a80f88c18a327
Signed-off-by: Mohit Aggarwal <maggarwa@codeaurora.org>
This change sets err_state in sdhci_dumpregs func indicating
driver errors captured, which can be read out from debugfs.
CRs-Fixed: 1056483
Change-Id: If6323f4e2cf9c835139ea92753ae8407709b8a70
Signed-off-by: Liangliang Lu <luliang@codeaurora.org>
Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org>
This change adds support to allow user space query if low level eMMC
driver has encountered any error or not, this state can be read/cleared
via debugfs.
CRs-Fixed: 1056483
Change-Id: Idc4ea375e9f308446dec04d443d062fe502658bd
Signed-off-by: Liangliang Lu <luliang@codeaurora.org>
Signed-off-by: Sayali Lokhande <sayalil@codeaurora.org>
PM660 controls SMB1351 by STAT_CHG pin when the parallel is enabled.
the polarity of SMB1351 should be active high, so add a property
in DTS to the polarity.
CRs-Fixed: 2015025
Change-Id: Idca4149c587e9588fce8ba757fa0b7bf0ca5614d
Signed-off-by: Yingwei Zhao <cyizhao@codeaurora.org>
