Currently the code disables the dpdm regulator if VBUS is present and
regulator is enabled.
It could happen that the charger oscillates its VBUS as it settles and
based on the delay's in responding to an interrupt, the software could
read vbus_present while the regulator was enabled earlier causing an
incorrect disable of the dpdm regulator.
It is required to ignore the interrupt in such cases.
Change-Id: I882780c1bcbc7713973eda5383291d891787f144
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Wipower feeds to the DCIN input of the smb2 charger and relies on
input current configurations on six different voltage ranges for
optimal power draw.
Provide means to configure the current limits in them via a device
tree setting.
Change-Id: I81d1dc3ed1d588d67525b15120e7d8b947536099
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
This is required for testing iommu performance on non-debug builds.
Change-Id: Ie1514b6cf78d3dd34de83608ec00c454316b75bd
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
Instead of trying to make a decision to switch out the active
draw context for NULL at detach time leave the reference count
for it until the next context switch or until the next slumber
whichever comes first. This avoids races with the preemption
code and ensures a smooth transition.
A side effect is that we were depending heavily on the context
detach to reset the ringbuffer to the default at power down and
we didn't touch it on power up (though we did on soft reset and
wake from slumber. Curious). Obviously if we are no longer
switching we will need to force the default pagetable during start
but it seems to me like this would be the right thing to do even
if we were still switching out.
CRs-Fixed: 1009124
Change-Id: Ic0dedbadff8df192096292b221130c8ef5b31e12
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Force any command triggered context switch to the GPU - it should
be on the GPU anyway, but we were already passing a flags parameter
(unused) so this is a good chance to force the issue and make sure
that the cpu path decision isn't in play here.
CRs-Fixed: 1009124
Change-Id: Ic0dedbadb277a6498d0840b45c90e1265e2f354a
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
We are only writing the ringbuffer start of pipeline timestamp for
internal commands that do not have a draw context associated which
happen rarely (if ever). We should be recording the timestamp for
*ALL* commands so when something goes wrong we can get a fuller
idea of the timestamp picture for each ringbuffer.
CRs-Fixed: 1009134
Change-Id: Ic0dedbad6d99130e31cd8a06dfe025610e9157a8
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
When processing an event group we check the previously processed
timestamp to avoid going through the loop if we don't need to.
We use timestamp_cmp() to check the timestamp. In situations
where the retired timestamp has advanced by more than 0x80000000
since the last time we checked the timestamp, timestamp_cmp()
will return -1 as it thinks that the new timestamp is older than
the processed timestamp. This can happen with certain tests and
scheduling hiccups.
The event processor can be much less restrictive - all we really
care about is that the retired timestamp didn't slip backwards by
accident (highly unlikely). So just check that the last proccessed
timestamp is not equal to the retired timestamp and if the
retired timestamp has already rolled, that the delta is outside
of the 0x8000000 window.
CRs-Fixed: 1009149
Change-Id: Ic0dedbad641bfa3fd6cbc1c91a37fb0e37f72bae
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
iommu_attach_device() should return a log message for every
possible error and we don't need to double up the pain
especially for situations when we run out of available
domains and start getting a storm of ENOSPC errors back.
CRs-Fixed: 1009158
Change-Id: Ic0dedbad7416abb23c769a4d3be9ebd0ca04810c
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
gpuobj_free_on_fence() is used infrequently enough that it doesn't
make sense to do INIT_WORK() when the memory object is created,
especially if debug objects are enabled because INIT_WORK() will go
off and do a bunch of accounting that we don't need. Do the
INIT_WORK() just before queueing in those rare cases that this
actually happens.
CRs-Fixed: 1009183
Change-Id: Ic0dedbad1015883788e12815806e3249a1e09b21
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
We don't need to wait for idle before changing the pagefault
policy on the IOMMU which is a good thing because on a busy
system we may never hit idle.
CRs-Fixed: 1009187
Change-Id: Ic0dedbadb8f6122e32a0a34a65c54a7bca2a523c
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Some test applications intentionally generate a GPU fault for
various reasons. Because a GPU fault generates a snapshot and
snapshots are persistent until they are pulled, running the test
application may take up the snapshot slot and prevent a real fault
from being captured and debugged.
This flag allows the draw context to intentionally avoid generating
a snapshot.
CRs-Fixed: 1009190
Change-Id: Ic0dedbad8476c308a13572d999540b243d97eabc
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
The secure buffer registers were not being programmed in the soft
reset path which was causing a failure for the critical packets
workaround and forcing a hard reset.
CRs-Fixed: 1009194
Change-Id: Ic0dedbad998767a1ffdfe265e52fae7baa18d203
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Allow 5XX targets to preempt quickly from an atomic context. In
particular this allows quicker transition from a high priority
ringbuffer to a lower one without having to wait for the worker
to schedule.
CRs-Fixed: 1009124
Change-Id: Ic0dedbad01a31a5da2954b097cb6fa937d45ef5c
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Remove some unused gpudev hooks and further segment the A4XX and
A5XX specific code into their respective areas. Remove some bits
that are only applicable to 4XX from the 5XX side.
CRs-Fixed: 1009124
Change-Id: Ic0dedbadc324b979583d7a3998195bf15ac537f6
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
It is no longer power efficient to independently enable and disable
the MMU clocks. We can safely enable and disable them with the rest
of the GPU clocks and take back the infrastructure needed to handle
the clocks.
CRs-Fixed: 1009124
Change-Id: Ic0dedbadc48095eada9c5fce6004475a2cb0f0a9
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
The memstore shared between the CPU and GPU is old but can not be
messed with. Rather than stealing values from it where available,
add a new block of shared memory that is exclusive to the driver
and GPU. This block can be used more freely than the old
memstore block.
Program the GPU to write the RPTR out to an address the CPU can read rather
than having the CPU read a GPU register directly. There are some very
small but very real conditions where different blocks on the GPU have
outdated values for the RPTR. When scheduling preemption the value read
from the register could not reflect the actual value of the RPTR in the CP.
This can cause the save/restore from preemption to give back incorrect RPTR
values causing much confusion between the GPU and CPU.
Remove the ringbuffers copy of the read pointer shadow.
Now that the GPU will update a shared memory address with the
value of the read pointer, there is no need to poll the register
to get the value and then keep a local copy of it.
CRs-Fixed: 987082
Change-Id: Ic44759d1a5c6e48b2f0f566ea8c153f01cf68279
Signed-off-by: Carter Cooper <ccooper@codeaurora.org>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Currently adreno_ft_regs_val is getting updated at the time of
first submission or on the expiry of fault_timer.
If the fault_timer expires exactly at the time of inflight becomes 0
and there is an immediate submission for which GPU finishes the work
within short time. Then there is a chance to read the fault registers
in fault_detect_read() and fault_detect_read_compare() with less
time gap and declare it as a fault.
Stop the timer before reading fault registers and start it again.
CRs-Fixed: 1043478
Change-Id: Ib35104adf7b3618f94c6adf7fab531abffea3f76
Signed-off-by: Rajesh Kemisetti <rajeshk@codeaurora.org>
Turn off the camif interrupts when camif is disabled and turn them
on when camif is enabled. Also, improve the code to keep track of
interrupts that are enabled by updating them in the function that
sets interrupts instead of doing it in multiple places.
CRs-Fixed: 1037272
Change-Id: I1cc965696c06bd3901d86668aaf597abb3ef2d6d
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
It is required to use phy-msm-qusb-v2.c driver with msmcobalt platform.
Hence use "qcom,qusb2phy-v2" instead of "qcom,qusb2phy" as compatiable
string with QUSB PHY related device node on msmcobalt.
Change-Id: I8d8ed29215f326801ba4e60794cc63e4eaeeb97e
Signed-off-by: Mayank Rana <mrana@codeaurora.org>
Controller driver passes current speed to QUSB2 PHY driver in
the flags parameter. Determine linestate using speed,
mode and cable connection status. This deprecates the older
mechanism where linestate was determined by reading the now
obsoleted QUSB2PHY_PORT_UTMI_STATUS register.
Change-Id: I682eb250964f32f93d7b31dae0291aca7fa44362
Signed-off-by: Devdutt Patnaik <dpatnaik@codeaurora.org>
DP/DM linestate is needed by the QUSB2 PHY driver to configure the
polarity of DP/DM transition triggers for exiting low power mode.
This was previously available via the QUSB2PHY_PORT_UTMI_STATUS
PHY register which is now deprecated. In order to correctly determine
the interrupt polarity we need to pass the current operating speed
to the QUSB2 PHY driver. The PHY driver uses mode, speed and
cable connection status to determine the linestate and configure
interrupt polarities for wake up. Add logic to determine operating
speed for host and device mode cases.
Change-Id: Iaede1269f514a314bd9717a33100f748e7753b2a
Signed-off-by: Devdutt Patnaik <dpatnaik@codeaurora.org>
Update the device node for QUSB2 PHY with the recommended
register initialization sequence for host mode.
This is needed to fix HS enumeration issues due to port
reset failure.
Change-Id: I8cfed672ff02cd61beb956116f9fcd365211cf11
Signed-off-by: Devdutt Patnaik <dpatnaik@codeaurora.org>
commit 77f6fd8044 ("usb: pd: Add support to notify plug
orientation via extcon") added an additional extcon notifier
to indicate orientation. But for the PE_SNK_STARTUP case
the change inadvertently notifies EXTCON_USB for all sink
states when it should just be for psy_type==USB|USB_CDP.
Add the missing curly braces to the if statement.
Change-Id: I19d424ff0d46cc0134210424a7d431b331cbf963
Signed-off-by: Jack Pham <jackp@codeaurora.org>
Add the ipc-spinlock entry to facilitate locking between apps and
non-apps processors.
CRs-Fixed: 1043377
Change-Id: I097e5464ec6ab80c12bcdb5f38d0599fa40da9ee
Signed-off-by: Dhoat Harpal <hdhoat@codeaurora.org>
compare size of allocated cal data buffer from heap
and count bytes provided to write by user to avoid
heap overflow for write cal data.
Change-Id: Id70c3230f761385489e5e94c613f4519239dfb1f
CRs-Fixed: 1032174
Signed-off-by: Anand Kumar <anandkumar@codeaurora.org>
New codec child nodes are added to handle wsa881x
enable pin. Add all the child devices of codec.
CRs-Fixed: 1041199
Change-Id: I889922a0c36ec80ee6ede95b2f19f80791323332
Signed-off-by: Yeleswarapu Nagaradhesh <nagaradh@codeaurora.org>
Add wcd934x gpio controller as child to codec node
and add all child devices of codec.
CRs-Fixed: 1041199
Change-Id: I32ad5c5c8c9dd30a79818c873cfe1d121fd62d49
Signed-off-by: Yeleswarapu Nagaradhesh <nagaradh@codeaurora.org>
Consider sound card instantiate fails due to
audrx init failure. In such case, all dais/ctls
are de-registered and freed. But as part of it,
access to unregistered ctls for pcm_chmap and similar
controls result in crash. Ctls are freed at disconnection
but the disconnect is called only when it was registered.
CRs-Fixed: 1038054
Change-Id: Ief8817b4ec000c058d46aa021977b7c6003c0011
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
Add the QDSS STM property to the 8996 device tree so
that data can be logged from the GPU to the debug
bus when available.
CRs-Fixed: 1031648
Change-Id: I0edd786a3465ac38188a1d1213ba5bea84c67a6f
Signed-off-by: Jonathan Wicks <jwicks@codeaurora.org>
Map the GPU QDSS STM area as a global into the GPU
IOMMU so that GPU traces can be routed to QDSS.
Enable the gpuaddr and size of the area to be queried
from userspace.
CRs-Fixed: 1031648
Change-Id: I2e32522a42508a6bee088c95dc56a13935dd691c
Signed-off-by: Jonathan Wicks <jwicks@codeaurora.org>
