Drop the define and make use of scu_a9_get_base() which reads
the physical address of SCU from CP15 register.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Skip scu_enable(scu_base) if CPU is not Cortex A9 with SCU.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add API to detect SCU base address from CP15.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
SCU based detection only works with Cortex-A9 MP and it doesn't
support ones with multiple clusters. The only way to detect number of
CPU core correctly is with DT /cpu node.
Tegra SoCs decided to use DT detection as the only way and to not use
SCU based detection at all. Even if DT /cpu node based detection
fails, it continues with a single core
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add CPU node for Tegra30.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Add CPU node for Tegra20.
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Reviewed-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
There are some redundant codes in the CPUINIT section that was caused by
some codes not be organized well in "headsmp.S". Currently all the codes
in "headsmp.S" were put into CPUINIT section. But actually it doesn't
need to be loacted in CPUINIT section. There is no fuction access them
in CPUINIT section and we will relocate them to IRAM.
These codes also caused some unnecessary functions that access these
codes been put into CPUINIT section too. This patch clean it up and put
them into normal text section.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The tegra_cpu_die was be executed by the CPU itslf. So the clock gating
procedure won't be executed after the CPU hardware shutdown code. Moving
the clock gating procedure to tegra_cpu_kill that will be run by another
CPU after the CPU died.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Updating the cache maintenance order before CPU shutdown when doing CPU
hotplug.
The old order:
* clean L1 by flush_cache_all
* exit SMP
* CPU shutdown
Adapt to:
* disable L1 data cache by clear C bit
* clean L1 by v7_flush_dcache_louis
* exit SMP
* CPU shutdown
For CPU hotplug case, it's no need to do "flush_cache_all". And we should
disable L1 data cache before clean L1 data cache. Then leaving the SMP
coherency.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The power up sequence is different on the cold boot CPU and the CPU
that resumed from the hotplug. For the cold boot CPU, it was been power
gated as default. To power up the cold boot CPU, the power should be
un-gated by un toggling the power gate register manually.
For the CPU that resumed from the hotplug, after un-halted the CPU. The
flow controller will un-gate the power of the CPU. No need to manually
control, just wait the power be resumed and continue the power up
sequence after the CPU power is ready.
Based on the work by:
Varun Wadekar <vwadekar@nvidia.com>
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
tegra_cpu_init/exit will be called every time one cpu core is online or
offline. And all cpu cores share same clocks, redundant clk_get/put
wast time, so I move them out.
Signed-off-by: Richard Zhao <linuxzsc@gmail.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Fix:
warning: (ARCH_TEGRA_2x_SOC) selects ARM_ERRATA_754327 which has unmet direct dependencies (CPU_V7 && SMP)
warning: (ARCH_TEGRA_2x_SOC) selects ARM_ERRATA_742230 which has unmet direct dependencies (CPU_V7 && SMP)
by selecting options only if SMP.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
No need to be public. Checked with:
$ touch arch/arm/mach-tegra/*[ch] && make C=1
Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Move arch/arm/mach-tegra/timer.c to drivers/clocksource/tegra20_timer.c
so that the code is co-located with other clocksource drivers, and to
reduce the size of the mach-tegra directory.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
When unlocking a spinlock, all we need to do is increment the owner
field of the lock. Since only one CPU can be performing an unlock()
operation for a given lock, this doesn't need to be exclusive.
This patch simplifies arch_spin_unlock to use non-exclusive accesses
when updating the owner field of the lock.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The timers are common to both A9 cores, so let's set the clock
event struct's cpumask accordingly, to all possible CPUs.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: Josh Cartwright <josh.cartwright@ni.com>
Fixing multi line comment style at two locations.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: Josh Cartwright <josh.cartwright@ni.com>
Some #includes are implicitly included through others, some are
just not needed.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: Josh Cartwright <josh.cartwright@ni.com>
Aligning the columns in a block of #defines, so that the values
are starting in the same colum on every line.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: Josh Cartwright <josh.cartwright@ni.com>
Acknowedging an interrupt requires to read the interrupt register
only. The write was only required to work around a bug in
the QEMU implementation of the TTC, which is fixed.
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Tested-by: Josh Cartwright <josh.cartwright@ni.com>
The acronym PSS is deprecated by Xilinx. The correct term, which is
also used in Xilinx documentation is PS (processing system).
This is just a search and replace:
- s/PSS/PS/g
- s/pss/ps/g
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Tested-by: Josh Cartwright <josh.cartwright@ni.com>
The patch: "ARM: use common irqchip_init for GIC init"
(sha1: 0529e315bb)
should also add linux/irqchip.h header.
Error message:
arch/arm/mach-zynq/common.c:99:14: error: 'irqchip_init'
undeclared here (not in a function)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mostly clock related updates, most notably the conversion of
i.MX31 to a DT based lookup.
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Merge tag 'imx-soc' of git://git.pengutronix.de/git/imx/linux-2.6 into next/soc
From Sascha Hauer:
ARM i.MX SoC updates for next
Mostly clock related updates, most notably the conversion of
i.MX31 to a DT based lookup.
* tag 'imx-soc' of git://git.pengutronix.de/git/imx/linux-2.6:
ARM: clk-imx35: Fix build warnings with W=1
ARM: imx27: add a clock gate to activate SPLL clock
ARM: mx31: Replace clk_register_clkdev with clock DT lookup
ARM: clk-imx31: Add dummy clock
ARM: Let CONFIG_MACH_IMX31_DT be built by default
Signed-off-by: Olof Johansson <olof@lixom.net>
From Barry Song, this adds support for a new SoC from CSR; marco. It's
SMP, uses GIC instead of VIC and in general needs a bit of rework of
the platform code for setup, which this branch contains.
* 'marco-timer-cleanup-rebase' of git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel:
ARM: PRIMA2: provide two DEBUG_LL ports for prima2 and marco
ARM: PRIMA2: add new SiRFmarco SMP SoC infrastructures
ARM: PRIMA2: irq: make prima2 irq can work even we enable GIC for Marco
ARM: PRIMA2: rtciobg: it is also compatible with marco
ARM: PRIMA2: rstc: enable the support for Marco
ARM: PRIMA2: mv timer to timer-prima2 as we will add timer-marco
ARM: PRIMA2: initialize l2x0 according to mach from DT
ARM: PRIMA2: enable AUTO_ZRELADDR for SIRF in Kconfig
ARM: PRIMA2: add CSR SiRFmarco device tree .dts
Signed-off-by: Olof Johansson <olof@lixom.net>
A couple of board updates for PXA, from Haojian Zhuang.
* 'armsoc/board' of git://github.com/hzhuang1/linux:
ARM: pxa: pxa27x.c: add dummy SA1100 rtc clock
ARM: palmtreo: replace #if defined with IF_ENABLED
ARM: palmtreo: add docg4 device initialization
Signed-off-by: Olof Johansson <olof@lixom.net>
Non-critical fixes for PXA, from Haojian Zhuang.
* 'armsoc/fix' of git://github.com/hzhuang1/linux:
ARM: pxa: Minor naming fixes in spitz.c
ARM: PXA3xx: program the CSMSADRCFG register
ARM: palmtreo: fix #ifdefs for leds-gpio device
ARM: palmtreo: fix lcd initilialization on treo680
Signed-off-by: Olof Johansson <olof@lixom.net>
A couple of PXA fixes that aren't critical enough for 3.9. From Haojian
Zhuang.
* 'armsoc/fix' of git://github.com/hzhuang1/linux:
ARM: pxa: Minor naming fixes in spitz.c
ARM: PXA3xx: program the CSMSADRCFG register
ARM: palmtreo: fix #ifdefs for leds-gpio device
ARM: palmtreo: fix lcd initilialization on treo680
Signed-off-by: Olof Johansson <olof@lixom.net>
- remove unneeded includes due to DT conversion
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Merge tag 'cleanup_for_v3.9' of git://git.infradead.org/users/jcooper/linux into next/cleanup
From Jason Cooper:
mvebu cleanup for v3.9
- remove unneeded includes due to DT conversion
* tag 'cleanup_for_v3.9' of git://git.infradead.org/users/jcooper/linux:
ARM: Kirkwood: Cleanup unneeded include files
arm: kirkwood: dockstar: remove useless include of SDIO header
Signed-off-by: Olof Johansson <olof@lixom.net>
Replace occurences of gpio_request() and gpio_direction_*() by calls to
gpio_request_one().
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace occurences of gpio_request() and gpio_direction_*() by calls to
gpio_request_one().
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace occurences of gpio_request() and gpio_direction_*() by calls to
gpio_request_one().
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace occurences of gpio_request() and gpio_direction_*() by calls to
gpio_request_one().
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The GPIO is already configured as an output, there's no reason to use
gpio_direction_output() just to set the output value. Use
gpio_set_value() instead.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace occurences of gpio_request() and gpio_direction_*() by calls to
gpio_request_one().
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace occurences of gpio_request() and gpio_direction_*() by calls to
gpio_request_one().
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace occurences of gpio_request() and gpio_direction_*() by calls to
gpio_request_one().
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This driver is simple, uses the latest interfaces and contains few if
any controversial elements. All of its interfaces have been in place
for a long time now. Hence let's move it out of staging.
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Acked-by: Peter Meerwald <pmeerw@pmeerw.net>
Use the HWMOD_BLOCK_WFI flag in the hwmod data to prevent the MPU from
entering WFI when the I2C devices are active. No idea why this is needed;
this could certainly bear further investigation if anyone is interested.
The objective here is to remove some custom code from the OMAP24xx PM
code.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Apparently, on some OMAPs, the MPU can't be allowed to enter WFI while
certain peripherals are active. It's not clear why, and it's likely
that there is simply some other bug in the driver or integration code.
But since the likelihood that anyone will have the time to track these
problems down in the future seems quite small, we'll provide a
flag, HWMOD_BLOCK_WFI, to mark these issues in the hwmod data.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The OMAP3xxx CPUIdle driver contains some code to place a lower bound
on the PER powerdomain's power state. Convert this code to a data-driven
implementation to remove branches and to improve readability.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Add the possible logic retention states for the 24xx CORE powerdomain.
Subsequent patches use this data to avoid returning incorrect data, by
skipping reads from register bitfields that don't actually exist.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Remove some clocks that don't appear to be used by anything
and which are not associated with any hardware registers.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Convert all DEFINE_OMAP_MUX_GATE() combinations that list MODULEMODE
registers in their gate arguments to DEFINE_OMAP_MUX(), dropping the
MODULEMODE data. This is possible because the MODULEMODE bits control
IP blocks, not clocks; and the hwmod code takes care of IP block
control. Rename these clocks to reflect the original multiplexer name
as specified in the comments. And convert the hwmod data to use the
multiplexer clock name.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
Cc: Mike Turquette <mturquette@linaro.org>
