Commit graph

570381 commits

Author SHA1 Message Date
Deepak Katragadda
8cc9b35f9a clk: msm: clock-gcc-cobalt: Add reset capability to PCIE pipe clock
Instead of having a separate reset clock for PCIE 0 reset, tag the
BCR register with the gcc_pcie_0_pipe_clk directly.

CRs-Fixed: 1014989
Change-Id: Icbc3a4a237bd0ac75fbef0857238e18cfb0ca533
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
2016-05-15 22:41:21 -07:00
Deepak Katragadda
4622a2f426 clk: msm: clock-gcc-cobalt: Update the pcie_aux_clk_src frequency
The pcie_aux_clk_src needs to run at XO frequency instead
of at 1MHz. Update the clock driver to support that.

CRs-Fixed: 1013278
Change-Id: Id8a92b0f36f71ed50726504d1e5b3feab4cfa512
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
2016-05-15 22:41:11 -07:00
Runmin Wang
dc2b0c10a1 pinctrl: qcom: Fix the base address of various GPIOs
Update the base address of GPIOs to the correct value.

CRs-Fixed: 1014950
Change-Id: Id232492bd458dac04e89a94ed5a85092223ebff6
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
2016-05-15 22:40:59 -07:00
Jeykumar Sankaran
b4b947c1f3 ARM: dts: msm: separate control and config offsets for PPB
This change separates the control and config register offset nodes
for ping pong blocks. Its not necessary every ping pong
blocks to have both control and config registers.

Change-Id: Ide998ad71abccb35d899f9e1f6093949acb95b09
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2016-05-12 15:07:10 -07:00
Ram Chandrasekar
595ef42db8 msm: thermal: Update the min frequency update logic
With LMH DCVSh hardware, the current check will use cpufreq to
limit both scaling min and max frequency. But cpufreq should be
used only for scaling min frequency.

Update the check to use cpufreq only to limit scaling min frequency.

Change-Id: I38de1699a7cdd5bc3fecef80dd34c4d22d2fd200
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2016-05-12 15:06:59 -07:00
Ram Chandrasekar
c8a89f3b19 msm: thermal: Avoid updating the scaling max frequency to cpufreq
With LMH DCVSh hardware, thermal driver can directly vote in the
hardware to limit the scaling max frequency. Voting to the cpufreq
driver along side the hardware, will introduce software delay when
removing the mitigation.

So avoid voting the scaling max frequency to the cpufreq when LMH DCVSh
is available.

Change-Id: I8a5f913ae41263b06af99b0ee802b4fa68312f33
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2016-05-12 15:06:47 -07:00
Ram Chandrasekar
0f2154f71d defconfig: msmcortex: Enable bcl driver
Enable bcl peripheral driver. The driver will interact
with the bcl peripheral to get the battery current, battery
voltage and set and receive thresholds for the same.

CRs-Fixed: 1010115
Change-Id: I7168c754e939ef9da001bcac52a5b802dea40b41
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2016-05-12 15:06:37 -07:00
Kuirong Wang
273e71d9d4 ARM: dts: msm: Add slimbus_6_rx back-end dai-link for msmcobalt
Add slimbus_6_rx back-end dai-link for msmcobalt to enable
independent backend for different devices during audio playback.

Change-Id: If22cadbcfac92f8243a3b6d3201935a839cd701a
Signed-off-by: Kuirong Wang <kuirongw@codeaurora.org>
2016-05-12 15:06:25 -07:00
Kuirong Wang
bc5a96807d ARM: dts: msm: Add USB audio via ADSP support for msmcobalt
Add device tree entries for USB audio rx and tx to
support USB audio via ADSP on msmcobalt platform.

Change-Id: I345aa2369d18e2137ce79676049bb59d715d1ee0
Signed-off-by: Kuirong Wang <kuirongw@codeaurora.org>
2016-05-12 15:06:14 -07:00
Sridhar Ancha
aea451330a msm: ipa: Add NETIF_F_SG to RMNET_IPA's hw features
GSO segmented packets are getting linearized
before being sent to rmnet_ipa interface since SG
feature is not enabled.

Add NETIF_F_SG to IPA's HW features so that
ethtool can be used to enable it.

Change-Id: I7b321c796935febb3fa3e9ae520fd65e00da507c
Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com>
Signed-off-by: Sridhar Ancha <sancha@codeaurora.org>
2016-05-12 15:06:04 -07:00
Viswanadha Raju Thotakura
948ea35fca msm: camera: Increase wait timeout time for kernel probe
Camera sensor probe happens in camera daemon, because
of delayed start of camera daemon, timeout happens and
camera server is notified with 0 cameras, this is
temporary solution.

CRs-Fixed: 1014373
Change-Id: I957b9744f6f627a74f805933012429c41b910e92
Signed-off-by: Viswanadha Raju Thotakura <viswanad@codeaurora.org>
2016-05-12 15:05:54 -07:00
Aravind Venkateswaran
947dec941e ARM: dts: msm: fix panel mode selection GPIO specification
Commit a240321fd6 ("ARM: dts: msm: define
primary display interface for msmcobalt CDP") used an incorrect binding
to specify the panel mode selection gpio state for the nt35597 WQXGA
dual dsi panel. Fix this to ensure that the panel mode gpio state is set
correctly.

Change-Id: I895642c231d980633801d094c8f329d209370c88
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
2016-05-12 15:05:44 -07:00
Ram Chandrasekar
d151671bb9 ARM: dts: msm: Add default configs for bcl in msmcobalt
Add default battery mitigation configurations for msmcobalt

CRs-Fixed: 1010115
Change-Id: I13f1825f2eb04d606464d1092c222c8269084107
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2016-05-12 15:05:34 -07:00
Ram Chandrasekar
57d83c5c18 ARM: dts: msm: Configure bcl peripheral driver for PMIcobalt
Configure the bcl peripheral driver with the details about the
register address, interrupt and interrupt clear polling delay for
PMIcobalt.

CRs-Fixed: 1010115
Change-Id: I521ee6c715525bd401630ec7948e5746682de6da
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2016-05-12 15:05:23 -07:00
Viswanadha Raju Thotakura
6254bc51f9 ARM: dts: msm: Correct camera nodes for msmcobalt
Correct the pinctrl nodes for actuator, change the CCI
source for auxiliary camera node, add eeprom1 node for
auxiliary sensor.

CRs-Fixed: 1014373
Change-Id: Icd9f1478c797fbdbd76d96c3069e5baa2c30ff61
Signed-off-by: Viswanadha Raju Thotakura <viswanad@codeaurora.org>
2016-05-12 15:05:12 -07:00
Ram Chandrasekar
92ad7a30f3 power: bcl_peripheral: Support new bcl peripheral
Add support for the new version of bcl peripheral introduced
in PMIcobalt.

The new support includes,
1. support the new address space
2. set the new Ibat too high threshold
3. set the new vbat low comparator threshold
4. set the new vbat too low comparator threshold
5. enable the LMH DCVSh monitor algorithm, when the
   thresholds are configured.

CRs-Fixed: 1010115
Change-Id: I6dad908bbc673ff1b7f7d3d05fecdfc8f48b5815
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2016-05-12 15:05:01 -07:00
Ram Chandrasekar
9383bcf86a power: bcl: snapshot of battery_current_limit driver
This snapshot is taken as of msm-3.18 commit
978d23c.

Accommodate the changes in the input arguments for
power_supply_register() API and use
power_supply_get_property() API to get the SoC information
from BMS.

CRs-Fixed: 1010115
Change-Id: I1af565ffd3b61e424aca1cbd5ec6cbef8d89f1fa
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
2016-05-12 15:04:48 -07:00
David Dai
60e4a3d3a7 ARM: dts: msm: Add mnoc ahb bus fab for msmcobalt
Add mnoc ahb fab used by clients to request for different
speeds on configuration paths.

CRs-Fixed: 1013346
Change-Id: Ic5f3598644a6d93796b8613117e42ff692168c3c
Signed-off-by: David Dai <daidavid1@codeaurora.org>
2016-05-12 15:04:35 -07:00
David Dai
99e2cfeec5 ARM: dts: msm: use msmbus_bimc node for bimc_fab for msm_cobalt
To prevent a 0 vote on to bimc_clk from late clock init,
there must be a non zero vote on bimc_clk's child as opposed
to itself, vote on the child clock node as opposed to the parent.

CRs-Fixed: 1013348
Change-Id: Id3a9fa3238ce0f04737a7b98aa897ec83ecdc8e2
Signed-off-by: David Dai <daidavid1@codeaurora.org>
2016-05-12 15:04:22 -07:00
Runmin Wang
ee494e024b defconfig: enable CONFIG_DEVMEM and CONFIG_DEVKMEM
Add support to access system's memory.

CRs-Fixed: 1013668
Change-Id: I7cafb74373efbc611bc894bdf3b351aae7e03da5
Signed-off-by: Runmin Wang <runminw@codeaurora.org>
2016-05-12 15:04:09 -07:00
Banajit Goswami
4e85059f81 ASoC: soc-core: change debug level for debugfs fail message
Debugfs directory creation failure are not critical error.
However, the failure messages might be misleading and might
be interpreted as geniune failure in ASoC functionality.
Mark the failure messages as debug level.

Change-Id: Id61c81753d493b6508cbe87c59077adda4675ada
Signed-off-by: Banajit Goswami <bgoswami@codeaurora.org>
2016-05-12 15:03:55 -07:00
Osvaldo Banuelos
290a76165b clk: msm: osm: initialize PLL test control register
Program the PLL test control register for the power
cluster clock in agreement with hardware guidelines.

Change-Id: I102fd544ea0571d31d2ef9232195d4adbddda6d7
CRs-Fixed: 1009203
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
2016-05-12 15:03:44 -07:00
Aravind Venkateswaran
79101aca9c msm: mdss: dsi: fix configuration for mode selection GPIO
Configure the mode selection GPIO as direction output in order to
correctly configure the panel operating mode.

Change-Id: Ic79850674c42f3c59512467dbb608942b98cf74a
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
2016-05-12 15:03:31 -07:00
Abhijit Kulkarni
e4e3af55ed msm: mdss: fix qseed3 op_mode register programming
Initialize the op_mode register and program the direction_enable
field in this register correctly

CRs-Fixed: 1008505
Change-Id: I2dbcb8eb1ef5c6e0ebcbfb9f298a14344fbe7ce3
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2016-05-11 17:44:33 -07:00
Siddartha Mohanadoss
15c6d47204 defconfig: arm64: msmcortex: Enable VADC_HC and BTM driver
Enable VADC_HC and BTM peripheral driver on PMcobalt
to support reading and setting thresholds on ADC
channel such as voltage phone power(vph_pwr) and
thermistors.

Change-Id: I783d87714145f58fefc9e1e6a09d1ecfab56744b
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
2016-05-11 17:44:13 -07:00
Abhijeet Dharmapurikar
c1fa88dd6d regmap: improve debugfs interface to dump specific addresses
The current method of cat-ing register file dumps the entire
address space. One can use dd command to dump a subrange within
the address space. However one needs to know the string length
of each line which is derived from max address, the character
length of each register entry and the format.

Provide simple means to dump a range by allowing user to specify
the start address and the count of registers. When the data is read
convert the dump address to a starting position in the file. Similarly
if the file offset goes beyond the dump range return 0 to indicate
that the data is already dumped.

Also provide means to write to a register address.

CRs-Fixed: 1001770
Change-Id: I3466ce89007d127151f6760328edad116d679db8
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
2016-05-11 17:44:12 -07:00
Sagar Dharia
99a0947bbf slim: ngd: retention support in power-collapse
Support retention by checking interrupt status rather than logical
address register. During retention, interrupt status is zero'ed but
logical address may be retained to avoid report-present generation.

Change-Id: I9e7f24c5f4eb722643bf3fac2d5c898ad107dd24
Signed-off-by: Sagar Dharia <sdharia@codeaurora.org>
2016-05-11 17:44:11 -07:00
Arun Menon
be489cec86 [media] v4l: Update v4l2 32bit structures
Update v4l2_event32 structure with updated elements
from v4l2_event structure. Also copy and update
reserved and other fields during 32 bit ioctl handling.

CRs-Fixed: 1013345
Change-Id: I3038a2c0c7f2b7f13c412dc04890744d8dbe37ee
Signed-off-by: Arun Menon <avmenon@codeaurora.org>
2016-05-11 17:44:10 -07:00
Shashank Mittal
892adf6960 defconfig: arm64: enable Coresight drivers for msmcobalt
Enable Coresight drivers for msmcoblt. These devices can be used to
configure and enable trace functionality on msmcobalt.

Change-Id: Ib4b50d7df15114d417898c36b229441766bd5b42
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
2016-05-11 17:44:10 -07:00
Sunil Khatri
f667066182 msm: kgsl: Add property to determine GPU bitness
Add the property to determine GPU bitness which
is used by the clients via KGSL ioctl.

Certain clients of KGSL such as Open-CL driver
need to know explicitly about the GPU mode.

Change-Id: I77523d7816edb9776014aaf3aa85321af0d20aaf
Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
2016-05-11 17:44:09 -07:00
Jordan Crouse
6b8e9c2af6 msm: kgsl: Use the crash dumper to read HLSQ/shader memory on 5XX
The host AHB aperture for reading the HSLQ/SP/TP and shader memory
blocks might be blocked on A5XX targets so use the CP crash dump
utility to read them instead.  Downside if the crashdumper goes boom
we'll have to skip those registers in the fallback.

Change-Id: Ic0dedbad3c7b485c696198bdfcb78d45e929ec22
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
2016-05-11 17:44:08 -07:00
Hareesh Gundu
6c48f90b6d msm: kgsl: Add effuses read capabilities for A505 GPU
A505 GPU is having two different frequency plans, for
loading a specific frequency plan add speed bin read
information capability to A505.

Change-Id: I259020d7e4613d043e213ab2cb41e80ceb11f46a
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
2016-05-11 17:44:08 -07:00
Sunil Khatri
cb8b43b46c msm: kgsl: Do not allocate memory for profiling and sync commands
Do not allocate memory for IB descriptors for commands
of types profiling buffers, sync and markers.

This fixes the memory leak due to allocation of
memory for such commands and these were never freed.

CRs-Fixed: 996651
Change-Id: Ib168d60ad89e0fd55cd1f10b773b7cdaa7400ace
Signed-off-by: Sunil Khatri <sunilkh@codeaurora.org>
2016-05-11 17:44:07 -07:00
Shrenuj Bansal
8cdea23e03 msm: kgsl: Add 1M and 8K pools to the allocator
This change includes the below:
- Add 1M and 8k pools and structure the allocator to use all pools
from the largest page to the smallest
- Reserve a set number of pages for each of these pools at init time
- When allocating, use the reserved pools and then fall back to
allocating from system memory using only 8k and 4k pages
- Remove maximums on the pool sizes
- Zero the memory when we create the pool initially and add pages
back to the pool on free

CRs-Fixed: 995735
Change-Id: I9440bad62d3e13b434902f167c9d23467b1c4235
Signed-off-by: Shrenuj Bansal <shrenujb@codeaurora.org>
2016-05-11 17:44:06 -07:00
Sridhar Ancha
01da6d8db6 msm: ipa: Fix to polling mode
When IPA clock is enabled, suspend bit is cleared
and if pipe is non-empty EOT is posted internally.
At the same time, there is a possibility that SPS
driver posts EOT. This can result into incorrect
state of polling state and switch to intr mode is
tried repeatedly. Make a change to check if we are
in intr mode already in addition to the polling state.

Change-Id: I1af08605f7d2d234b0e5a4e3c8928db6cff5c7b4
Acked-by: Chaitanya Pratapa <cpratapa@qti.qualcomm.com>
Signed-off-by: Sridhar Ancha <sancha@codeaurora.org>
2016-05-11 17:44:06 -07:00
Chun Zhang
c7ff58f93f leds: leds-qpnp-flash-v2: create v2 QPNP flash LED driver
There is a new Qualcomm Technology Inc. Plug-n-play(QPNP) PMIC chip,
which introduces brand new flash LED hardware. The new hardware
comes with up to 3 LEDs support, different register mapping layout,
and different torch enablement requirement. Therefore, a new driver
is introduced to cover this need.

Change-Id: Ic878f1a946955edff3a9228e7fe54b7a525e37b1
Signed-off-by: Chun Zhang <chunz@codeaurora.org>
Signed-off-by: Mohan Pallaka <mpallaka@codeaurora.org>
2016-05-11 17:44:05 -07:00
Chinmay Sawarkar
9be27fb6e7 ARM: dts: msm: Clock fixes and Secure context banks for msmcobalt
Update the Venus clock frequency for different Venus load. There
were kernel panic as the BIMC clocks were OFF. Add the bimc_smmu
gdsc to turn ON the BIMC clocks. Add secure context banks.

Change-Id: I120ce95ea20434b41ac88a5d686b994630516435
Signed-off-by: Vikash Garodia <vgarodia@codeaurora.org>
2016-05-11 17:44:04 -07:00
Skylar Chang
084d692b62 defconfig: msm: enable rndis_ipa on cobalt
enable rndis_ipa on cobalt build to support
IPA-offload data path.

Change-Id: I98c462b56dbe01930456a16d5eeb6646b0a2db83
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
2016-05-11 17:44:03 -07:00
Mohan Pallaka
c12c850567 ARM: dts: msm: update touch screen resolution
Change the touch screen to match WQHD display

Change-Id: Ia0b77f23b26941ea2a53451ae61c46aa0ada731c
Signed-off-by: Mohan Pallaka <mpallaka@codeaurora.org>
2016-05-11 17:44:03 -07:00
Phani Kumar Uppalapati
c9ef6d3852 slimbus: Add API to get matching ID table
Add API in slimbus driver for clients to get the
matching ID table which helps in accessing driver
data and name fields.

CRs-fixed: 975738
Change-Id: I09c9f1de74e348b032d215cbb0fb9ba6c7aecf18
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
2016-05-11 17:44:02 -07:00
Hemant Kumar
f0795bea15 usb: gadget: f_gsi: Call ipa_usb_init_teth_prot() from gsi_bind
Currently ipa_usb_init_teth_prot() is called before gsi_bind()
gets called as a result of usb_add_function() call. gsi_bind()
is polulating ipa_init_params which is passed to
ipa_usb_init_teth_prot(). Since usb_add_function() is getting
called later after gsi_bind_config() returns, ipa_init_params
remains unpopulated and results into ipa_usb_init_teth_prot()
returning failure. Fix this issue by moving the call to
gsi_bind(). This also matches to ipa_usb_deinit_teth_prot()
call in gsi_unbind().

CRs-Fixed: 1013830
Change-Id: I824d3fa62e2736962680ae1c883b9a2916346331
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2016-05-11 17:44:01 -07:00
Hemant Kumar
d8179dff9e usb: dwc3: Fix dep name handling upon ep disable
dep name needs to be updated only for non-gsi endpoints
since gsi endpoints are statically assigned. Due to merge
from previous kernel dep name is updated twice upon ep
disable. This is causing gsi ep names to get modified
resulting into failure in finding the original gsi ep name
upon function bind. Hence update the dep name only once
at the end of ep disable and skip it for gsi eps.

CRs-Fixed: 1013830
Change-Id: Iea9282cc8fb4f13d066d25c63ccb1da1881c0a8a
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2016-05-11 17:44:01 -07:00
Hemant Kumar
62544d293a usb: gadget: f_gsi: Use gsi ep ops to disable endpoint
gsi driver does not call the gadget API usb_ep_enable()
instead uses gsi ep operation call back to enable gsi ep.
As a result ep->enabled flag remains clear. Later function
driver calls usb_ep_disble() API from gadget framework and
ep disable operation gets skipped. This causes start transfer
command to fail next time when gsi ep gets enabled. Fix this
issue by calling gsi ep disable operation instead of calling
gadget API.

CRs-Fixed: 1013830
Change-Id: I06570dec368b430321ec196a5e4338f657c43b42
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2016-05-11 17:44:00 -07:00
Hemant Kumar
f217c8f353 usb: dwc3: Add support for gsi endpoint disable operation
gsi driver does not call the gadget API usb_ep_enable()
instead uses gsi ep operation call back to enable gsi ep.
As a result ep->enabled flag remains clear. Later function
driver calls usb_ep_disble() API from gadget framework and
ep disable operation gets skipped. Fix this by adding gsi ep
operation for ep disable. This makes the enable and
disable ep operations both handled by gsi ep ops.

CRs-Fixed: 1013830
Change-Id: I5caa9a839b9fdd144af0a59a7c605777f7a3a659
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2016-05-11 17:43:59 -07:00
Hemant Kumar
9fe2a82e32 usb: gadget: rndis: Add packet filter handling for hw accelerated path
Call flow control API when RNDIS packet filter control message is
received. This allows to call the registered flow control call back
from rndis clients supporting hw accelerated path.

CRs-Fixed: 1013824
Change-Id: I87793e31d4db10acf1103127a2d1ad942d253c67
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2016-05-11 17:43:58 -07:00
Hemant Kumar
b3a6d13c13 usb: gadget: composite: Handle OS descriptor request properly
In case w_index or w_value of an OS descriptor does not match
for a device or an interface, value remains set to -EOPNOTSUPP.
This is assigned to an unsigned request length and becomes a
large integer value. When driver tries to allocate a buffer
of this large integer value DMA allocator complaints for out of
SW-IOMMU space. Hence check this variable for negative value and
return without queuing ep0 request.

CRs-Fixed: 1013316
Change-Id: I705d0d54fb17ca3042533f0106f91912215bd52a
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2016-05-11 17:43:58 -07:00
Hemant Kumar
6f856046e0 usb: gadget: composite: Fix double free memory bug
configfs_dev_cleanup function can double free os_desc
and buffer when called from different context. For
example, this can be called from composite_unbind() and
when composite_bind() fails. Fix this issue by setting
request and buffer pointer to NULL after kfree.

CRs-Fixed: 1013316
Change-Id: I6e87289627b23fc368f990fc7962854eeb3fbbc1
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
2016-05-11 17:43:57 -07:00
Deepak Katragadda
17d496f66a clk: msm: clock-gcc-cobalt: Update the FMAXes for hmss_gpll0_clk_src
The hmss_gpll0_clk_src RCG only needs an SVS2 vote on CX
to run. Update the FMAXes in the linux clock driver.

CRs-Fixed: 1013237
Change-Id: I31aaeb7cf965bfbee4aa219936d8e298899b61a8
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
2016-05-11 17:43:56 -07:00
David Collins
6a3914c8ad regulator: cpr3-regulator: unregister CPR IRQ affinity notifier correctly
Commit b7d5b597f16a ("regulator: cpr3-regulator: add support for
configuring CPR IRQ affinity") added a call to
register_hotcpu_notifier() but did not add a call to
unregister_hotcpu_notifier().  Correct this so that the IRQ
affinity notifier is unregistered when a cpr3-regulator device
is unregistered.

Change-Id: I6379559e201f14a0fd46c1e06761fae356ec9813
CRs-Fixed: 949650
Signed-off-by: David Collins <collinsd@codeaurora.org>
2016-05-11 17:43:56 -07:00
David Collins
674b559b78 regulator: cpr3-mmss-regulator: add support for msmcobalt partial binning
Add support for the partial binning open-loop voltage fuse values
used on MSMCOBALT chips.  Raise the voltage applied for lower
corners when specified by the fuse values in order to ensure
stability.

Change-Id: Ia3f95778d0dab1be9d15fa95d1fc5624606689ec
CRs-Fixed: 1009279
Signed-off-by: David Collins <collinsd@codeaurora.org>
2016-05-11 17:43:55 -07:00