Commit graph

386103 commits

Author SHA1 Message Date
Alex Deucher
67d5ced503 drm/radeon: fix surface setup on r1xx
r1xx asics have a slightly different surface register
setup compared to newer asics.  There is no specific
enable bit for macro tiling, rather, to disable macro
tiling, you need to set the surface pitch to 0.

With this fixed, the special rn50 handling can go.

Noticed-by: Mark Kettenis <mark.kettenis@xs4all.nl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-07-05 18:09:11 -04:00
Alex Deucher
edcaa5b125 drm/radeon: add support for 3d perf states on older asics
Certain older rv770 asics have both a performance and
a 3D performance state rather than just multiple performance
levels in the state power state.  The current code would
select the performance state rather than the 3D performance
state when the "performance" profile was selected.  This change
switches to the "balanced" profile by default which ends up being
the internal performance profile.  When the user selects the
"performance" profile, it selects the internal 3D performance
state so the user can select the higher performance modes.

For most asics this changes nothing.  For certain rv770 asics
with static performance and 3D performance states, this allows
you to select between then using by selecting the "balanced"
and "performance" dpm profiles.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-07-05 18:09:02 -04:00
Alex Deucher
c6cf7777a3 drm/radeon: set default clocks for SI when DPM is disabled
Fix patching of vddc values for SI and enable manually forcing
clocks to default levels as per NI.

This improves the out of the box performance with SI asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-07-05 18:08:54 -04:00
Linus Torvalds
b2c311075d Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto update from Herbert Xu:
 - Do not idle omap device between crypto operations in one session.
 - Added sha224/sha384 shims for SSSE3.
 - More optimisations for camellia-aesni-avx2.
 - Removed defunct blowfish/twofish AVX2 implementations.
 - Added unaligned buffer self-tests.
 - Added PCLMULQDQ optimisation for CRCT10DIF.
 - Added support for Freescale's DCP co-processor
 - Misc fixes.

* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (44 commits)
  crypto: testmgr - test hash implementations with unaligned buffers
  crypto: testmgr - test AEADs with unaligned buffers
  crypto: testmgr - test skciphers with unaligned buffers
  crypto: testmgr - check that entries in alg_test_descs are in correct order
  Revert "crypto: twofish - add AVX2/x86_64 assembler implementation of twofish cipher"
  Revert "crypto: blowfish - add AVX2/x86_64 implementation of blowfish cipher"
  crypto: camellia-aesni-avx2 - tune assembly code for more performance
  hwrng: bcm2835 - fix MODULE_LICENSE tag
  hwrng: nomadik - use clk_prepare_enable()
  crypto: picoxcell - replace strict_strtoul() with kstrtoul()
  crypto: dcp - Staticize local symbols
  crypto: dcp - Use NULL instead of 0
  crypto: dcp - Use devm_* APIs
  crypto: dcp - Remove redundant platform_set_drvdata()
  hwrng: use platform_{get,set}_drvdata()
  crypto: omap-aes - Don't idle/start AES device between Encrypt operations
  crypto: crct10dif - Use PTR_RET
  crypto: ux500 - Cocci spatch "resource_size.spatch"
  crypto: sha256_ssse3 - add sha224 support
  crypto: sha512_ssse3 - add sha384 support
  ...
2013-07-05 12:12:33 -07:00
Linus Torvalds
45175476ae A couple of fixes and clean-ups, allow for assigning user-defined
UBI device numbers when attaching MTD devices by using the "mtd="
 module parameter.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJR1t2RAAoJECmIfjd9wqK0bYIQALppqcFo27hkiCVcBHHjMRCw
 UonQBsD0GNXTyzrr/a+lBPK/33DgkiQ+/SHA/1ZXWPdBAwsacWBwzFtNo8OvC8Pg
 L0VPLY3OD5WOnbU8l9HzhjYm3MBrwvWqUmtzfM93c506tacR7z4j22uuF2jeBtDS
 qvVNeiVwYRjHdSrODd0IP16RqNGg2BHJ3FM+Eek9c+cGpkxUUzCRohugzFidrSVQ
 qNgptNGuWtpkAE3ytOGmmPXBSDQEFSUpjg6U6pZwQ3A5e4lKR7QqCC0bEf1S1uPc
 9pqmY21SC/fIm2VMN5jl+276mlwAOgsVI4+X7tK8ccrHzvkdoEwiMuqo0TwIMiPt
 PrhGjWBdGqDb8pvLvUSuzKUraVcOW7m1jE60sTLtq5xIkUd7CbBIq6n5o3oIdeW8
 jOCy9+Bkae45l8WKtQlBd+GHw8bDfgsxFt0qQ2UOGdu4+km09VsEzT6SDx3ZfsBM
 fJZzBm2qw02ZwtfzCI3FzzS4CJnDWlq20gbyf0B9a1aBMtN/HffbtyIFop4Nrlb2
 TlFjh/kFRNkNf0gXrGz5AvM5jhOR3tkh9Jtz1LsLaqRVkTsfsKUt1PvP4pUFAbvB
 FIaqSVUz9+ri/CyNpFYe2ofLHqFBMukygaqPU8JpMlo4i6kI2aO7XlRqQz62hSlu
 mFROtIxWeHhQJwxtJ3UC
 =N5BA
 -----END PGP SIGNATURE-----

Merge tag 'upstream-3.11-rc1' of git://git.infradead.org/linux-ubi

Pull ubi fixes from Artem Bityutskiy:
 "A couple of fixes and clean-ups, allow for assigning user-defined UBI
  device numbers when attaching MTD devices by using the "mtd=" module
  parameter"

* tag 'upstream-3.11-rc1' of git://git.infradead.org/linux-ubi:
  UBI: support ubi_num on mtd.ubi command line
  UBI: fastmap break out of used PEB search
  UBI: document UBI_IOCVOLUP better in user header
  UBI: do not abort init when ubi.mtd devices cannot be found
  UBI: drop redundant "UBI error" string
2013-07-05 12:09:48 -07:00
Linus Torvalds
2dd1cb5a7e Only a single patch which fixes a message.
-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABAgAGBQJR1to/AAoJECmIfjd9wqK0t80P/3p1iovDYk+bERO0W2AYSWRO
 vDXxdT95xmP9qT81+nd3/Y5WYAl86LLftct+CrecJv4NtwkK4Fb+By3V8TpBS4VH
 ROoTXRTiXe8krrszi+6w9lNCuomqmlJoBC3sbTwRuFyGa4XPKYCoawbEu1OySPmW
 cK/z633usm+k67KZ184B/KW+3znFs0G6fZ18mKRT9ImfCpP6E/xq5a7+xYrLdEcg
 MdI3hRZIpEfDVl4RX12UhxwHXcMzc/tLRYBoWf3ukJaKSRuVfoQMh+slc7L9RlAY
 YaIr2Q4qiUSsv4j7+Hq18sSQwvmi7rLxHyG6ZbN9PU8uzPAlXqI1sqhNKwMVXNyh
 AJWtHkkt/nZY+vZmCsOZY7whGtVKoumCqSWWMai/FyXmZN79LZRY5cC/MuC49UQX
 4I6tA6S7KCQSo2TM8s/iyqQ5xpzHNGaMnJ0DJ3XJaDI0B7GhJ1sv9EB2F7ZA96je
 hvLnlGklPyPz/QuKP7tCa3OakXm0Lns6uietzRxNARb5feMfBr7/ACSuPPcoc8hg
 v3YDIrXGeffg8kQmIsbYCGkyv1Il/Axh8bVvArJHf7YF21z+3ROXkOnzeqdTfuHQ
 rnFKgPrT0pxLoCz1sh0lS5QCVpxatUvYvVN+M3iVhDjhCm73mOssnYqJ3DjSJfO/
 zFppRcF9D3bHCjyOYICt
 =5YQr
 -----END PGP SIGNATURE-----

Merge tag 'upstream-3.11-rc1' of git://git.infradead.org/linux-ubifs

Pull ubifs fix from Artem Bityutskiy:
 "Only a single patch which fixes a message"

* tag 'upstream-3.11-rc1' of git://git.infradead.org/linux-ubifs:
  UBIFS: correct mount message
2013-07-05 12:08:47 -07:00
Thomas Gleixner
5ec2481b7b hrtimers: Move SMP function call to thread context
smp_call_function_* must not be called from softirq context.

But clock_was_set() which calls on_each_cpu() is called from softirq
context to implement a delayed clock_was_set() for the timer interrupt
handler. Though that almost never gets invoked. A recent change in the
resume code uses the softirq based delayed clock_was_set to support
Xens resume mechanism.

linux-next contains a new warning which warns if smp_call_function_*
is called from softirq context which gets triggered by that Xen
change.

Fix this by moving the delayed clock_was_set() call to a work context.

Reported-and-tested-by: Artem Savkov <artem.savkov@gmail.com>
Reported-by: Sasha Levin <sasha.levin@oracle.com>
Cc: David Vrabel <david.vrabel@citrix.com>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: H. Peter Anvin <hpa@zytor.com>,
Cc: Konrad Wilk <konrad.wilk@oracle.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: xen-devel@lists.xen.org
Cc: stable@vger.kernel.org
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2013-07-05 17:25:58 +02:00
Al Viro
193deee199 lustre: kill the pointless wrapper
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-07-05 19:06:16 +04:00
Al Viro
84d08fa888 helper for reading ->d_count
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-07-05 18:59:33 +04:00
Thomas Gleixner
332962f2c8 clocksource: Reselect clocksource when watchdog validated high-res capability
Up to commit 5d33b883a (clocksource: Always verify highres capability)
we had no sanity check when selecting a clocksource, which prevented
that a non highres capable clocksource is used when the system already
switched to highres/nohz mode.

The new sanity check works as Alex and Tim found out. It prevents the
TSC from being used. This happens because on x86 the boot process
looks like this:

 tsc_start_freqency_validation(TSC);
 clocksource_register(HPET);
 clocksource_done_booting();
	clocksource_select()
		Selects HPET which is valid for high-res

 switch_to_highres();

 clocksource_register(TSC);
 	TSC is not selected, because it is not yet
	flagged as VALID_HIGH_RES

 clocksource_watchdog()
	Validates TSC for highres, but that does not make TSC
	the current clocksource.

Before the sanity check was added, we installed TSC unvalidated which
worked most of the time. If the TSC was really detected as unstable,
then the unstable logic removed it and installed HPET again.

The sanity check is correct and needed. So the watchdog needs to kick
a reselection of the clocksource, when it qualifies TSC as a valid
high res clocksource.

To solve this, we mark the clocksource which got the flag
CLOCK_SOURCE_VALID_FOR_HRES set by the watchdog with an new flag
CLOCK_SOURCE_RESELECT and trigger the watchdog thread. The watchdog
thread evaluates the flag and invokes clocksource_select() when set.

To avoid that the clocksource_done_booting() code, which is about to
install the first real clocksource anyway, needs to go through
clocksource_select and tick_oneshot_notify() pointlessly, split out
the clocksource_watchdog_kthread() list walk code and invoke the
select/notify only when called from clocksource_watchdog_kthread().

So clocksource_done_booting() can utilize the same splitout code
without the select/notify invocation and the clocksource_mutex
unlock/relock dance.

Reported-and-tested-by: Alex Shi <alex.shi@intel.com>
Cc: Hans Peter Anvin <hpa@linux.intel.com>
Cc: Tim Chen <tim.c.chen@linux.intel.com>
Cc: Andi Kleen <andi.kleen@intel.com>
Tested-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Ingo Molnar <mingo@kernel.org>
Cc: Davidlohr Bueso <davidlohr.bueso@hp.com>
Cc: John Stultz <john.stultz@linaro.org>
Link: http://lkml.kernel.org/r/alpine.DEB.2.02.1307042239150.11637@ionos.tec.linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2013-07-05 11:09:28 +02:00
Ben Hutchings
734d4e159b sfc: Fix memory leak when discarding scattered packets
Commit 2768935a46 ('sfc: reuse pages to avoid DMA mapping/unmapping
costs') did not fully take account of DMA scattering which was
introduced immediately before.  If a received packet is invalid and
must be discarded, we only drop a reference to the first buffer's
page, but we need to drop a reference for each buffer the packet
used.

I think this bug was missed partly because efx_recycle_rx_buffers()
was not renamed and so no longer does what its name says.  It does not
change the state of buffers, but only prepares the underlying pages
for recycling.  Rename it accordingly.

Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2013-07-05 01:29:15 -07:00
Guennadi Liakhovetski
67eacc1583 DMA: shdma: add DT support
This patch adds Device Tree support to the shdma driver. No special DT
properties are used, only standard DMA DT bindings are implemented. Since
shdma controllers reside on SoCs, their configuration is SoC-specific and
shall be passed to the driver from the SoC platform data, using the
auxdata procedure.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:41:00 +05:30
Guennadi Liakhovetski
d0951a2338 DMA: shdma: shdma_chan_filter() has to be in shdma-base.h
shdma_chan_filter() is a function, provided by the shdma-base.c module,
move its declaration to the appropriate header.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:59 +05:30
Guennadi Liakhovetski
fa74326c44 DMA: shdma: (cosmetic) don't re-calculate a pointer
Use an existing pointer instead of retrieving it again.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:58 +05:30
Boris BREZILLON
f784d9c904 dmaengine: at_hdmac: prepare clk before calling enable
Replace clk_enable/disable with clk_prepare_enable/disable_unprepare to
avoid common clk framework warnings.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
[nicolas.ferre@atmel.com: remove return code checking in at_dma_resume_noirq()]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-07-05 11:40:57 +05:30
Nicolas Ferre
c3dbc60c9b dmaengine/trivial: at_hdmac: add curly brackets to if/else expressions
Correct coding style following the patch:
7c407d3e54dcc0c79119553c8d5ef176c1d5bc3a (DMA: AT91:
Get residual bytes in dma buffer).

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-07-05 11:40:56 +05:30
Nicolas Ferre
538eea6c7c dmaengine: at_hdmac: remove unsuded atc_cleanup_descriptors()
Since patch 7c407d3e54dcc0c79119553c8d5ef176c1d5bc3a (DMA: AT91:
Get residual bytes in dma buffer), the function
atc_cleanup_descriptors() is not used anymore. We remove it to prevent
warnings.

Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-07-05 11:40:55 +05:30
Ludovic Desroches
62971b2982 dmaengine: at_hdmac: add FIFO configuration parameter to DMA DT binding
For most devices the FIFO configuration is the same i.e. when half FIFO size is
available/filled, a source/destination request is serviced. But USART devices
have to do it when there is enough space/data available to perform a single
AHB access so the ASAP configuration.

Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-07-05 11:40:54 +05:30
Ludovic Desroches
764037c6f5 ARM: at91: dt: add header to define at_hdmac configuration
DMA-cell content is a concatenation of several values. In order to keep this
stuff human readable, macros are introduced.

The values for the FIFO configuration are not the same as the ones used in the
configuration register in order to keep backward compatibility. Most devices
use the half FIFO configuration but USART ones have to use the ASAP
configuration. This parameter was not initially planed to be into the at91 dma
dt binding. The third cell will be used to store this parameter, it will
become a concatenation of the FIFO configuration and of the peripheral ID. In
order to keep backward compatibility i.e. FIFO configuration is equal to 0, we
have to perform a translation since the value to put in the register to set
half FIFO is 1.

Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-07-05 11:40:53 +05:30
Maarten ter Huurne
757f4e51b7 MIPS: jz4740: Correct clock gate bit for DMA controller
Signed-off-by: Maarten ter Huurne <maarten@treewalker.org>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:53 +05:30
Lars-Peter Clausen
25ce6c35fe MIPS: jz4740: Remove custom DMA API
Now that all users of the custom jz4740 DMA API have been converted to use
the dmaengine API instead we can remove the custom API and move all the code
talking to the hardware to the dmaengine driver.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:52 +05:30
Lars-Peter Clausen
cdcb90ad48 MIPS: jz4740: Register jz4740 DMA device
Register a device for the newly added jz4740 dmaengine driver.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
[manually edited to align struct assignment]
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:51 +05:30
Lars-Peter Clausen
7c169a42d9 dma: Add a jz4740 dmaengine driver
This patch adds dmaengine support for the JZ4740 DMA controller. For now the
driver will be a wrapper around the custom JZ4740 DMA API. Once all users of the
custom JZ4740 DMA API have been converted to the dmaengine API the custom API
will be removed and direct hardware access will be added to the dmaengine
driver.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:50 +05:30
Maarten ter Huurne
c8c81f32ee MIPS: jz4740: Acquire and enable DMA controller clock
Previously, it was assumed that the DMA controller clock is not gated
when the kernel starts running. While that is the power-on state, it is
safer to not rely on that.

Signed-off-by: Maarten ter Huurne <maarten@treewalker.org>
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:49 +05:30
Qiao Zhou
8e3c518fba dma: mmp_tdma: disable irq when disabling dma channel
mask dma irq when disabling dma channel, so that interrupt status
will not be set and interrupt won't come again.

Signed-off-by: Qiao Zhou <zhouqiao@marvell.com>
Acked-by: Zhangfei Gao <zhangfei.gao@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:48 +05:30
Mark Brown
d7cabeed83 dmaengine: PL08x: Avoid collisions with get_signal() macro
As pointed out by Arnd Bergmann there is a get_signal macro definied in
linux/signal.h which can conflict with the platform data callback
function of the same name leading to confusing errors from the compiler
(especially if signal.h manages to get pulled into the driver itself due
to header dependencies).  Avoid such errors by renaming get_signal and
put_signal in the platform data to get_xfer_signal and put_xfer_signal.

Signed-off-by: Mark Brown <broonie@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:47 +05:30
Vinod Koul
e368b510c0 dmaengine: dw: select DW_DMAC_BIG_ENDIAN_IO automagically
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:46 +05:30
Andy Shevchenko
fed42c198b dma: dw: add PCI part of the driver
This is the PCI part of the DesignWare DMAC driver. The controller is usually
used in the Intel hardware such as Intel Medfield.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:45 +05:30
Andy Shevchenko
9cade1a46c dma: dw: split driver to library part and platform code
To simplify the driver development let's split driver to library and platform
code parts. It helps us to add PCI driver in future.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
[Fixed compile error and few checkpatch issues]
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:44 +05:30
Andy Shevchenko
61a7649620 dma: move dw_dmac driver to an own directory
The dw_dmac driver is going to be split into multiple files. To make this more
convenient move it to an own directory.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:43 +05:30
Andy Shevchenko
0b95961e03 dw_dmac: don't check resource with devm_ioremap_resource
devm_ioremap_resource does sanity checks on the given resource. No need to
duplicate this in the driver.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:42 +05:30
Will Deacon
fed8c45727 dma: pl330: use dma_addr_t for describing bus addresses
The microcode bus address (pl330_dmac.mcode_bus) is currently a u32,
which fails to compile when building on a system with 64-bit bus
addresses.

This patch uses dma_addr_t to represent the address instead.

Cc: Jassi Brar <jaswinder.singh@linaro.org>
Cc: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Acked-by: Grant Likely <grant.likely@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:42 +05:30
Will Deacon
0967717661 dma: pl330: rip out broken, redundant ID probing
The PL330 driver probes the peripheral and primecell IDs of the device to
make sure that it is indeed an AMBA PL330. However, it does this by
making byte accesses to a device mapping of the word-aligned ID
registers, which is either UNPREDICTABLE or generates an alignment fault
(depending on the presence of the virtualisation extensions).

Rather than fix this code, we can actually rip most of it out and let
the AMBA bus driver correctly do the probing for us.

Cc: Jassi Brar <jaswinder.singh@linaro.org>
Cc: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Acked-by: Grant Likely <grant.likely@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:41 +05:30
Shawn Guo
9479e17c9b dma: imx-sdma: move to generic device tree bindings
Update imx-sdma driver to adopt generic DMA device tree bindings.  It
calls of_dma_controller_register() with imx-sdma specific of_dma_xlate
to get the generic DMA device tree helper support.  The #dma-cells for
imx-sdma must be 3, which includes request ID, peripheral type and
priority.

The existing way of requesting channel, clients directly call
dma_request_channel(), still work there, and will be removed after
all imx-sdma clients get converted to generic DMA device tree helper.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2013-07-05 11:40:40 +05:30
Rongjun Ying
add93b578e dmaengine: sirf: set dma residue based on the current dma transfer position
read SIRFSOC_DMA_CH_ADDR register to get current dma transfer position, then
update dma residue so that things like ALSA drivers work as ALSA drivers need
the right residue value.

Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:39 +05:30
Dmitry Osipenko
7bdc1e272a dma: tegra: avoid channel lock up after free
Lock scenario: Channel 1 was allocated and prepared as slave_sg, used and freed.
Now preparation of cyclic dma on channel 1 will fail with err "DMA configuration
conflict" because tdc->isr_handler still setted to handle_once_dma_done.

This happens because tegra_dma_abort_all() won't be called on channel freeing
if pending list is empty and channel not busy. We need to clear isr_handler
on channel freeing to avoid locking.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:38 +05:30
Dmitry Osipenko
ac7ae754d5 dma: tegra20-apbdma: err message correction
Fixed err msg params order on irq request fail.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:37 +05:30
Denis Efremov
8004cbb481 dw_dmac: remove inline marking of EXPORT_SYMBOL functions
EXPORT_SYMBOL and inline directives are contradictory to each other.
The patch fixes this inconsistency.

Found by Linux Driver Verification project (linuxtesting.org).
Signed-off-by: Denis Efremov <yefremov.denis@gmail.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:36 +05:30
Jingoo Han
c1a9d391ad dma: timb_dma: remove unnecessary platform_set_drvdata()
The driver core clears the driver data to NULL after device_release
or on probe failure, since commit 0998d06310
(device-core: Ensure drvdata = NULL when no driver is bound).
Thus, it is not needed to manually clear the device driver data to NULL.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:35 +05:30
Jingoo Han
36c6df5062 dma: at_hdmac: remove unnecessary platform_set_drvdata()
The driver core clears the driver data to NULL after device_release
or on probe failure, since commit 0998d06310
(device-core: Ensure drvdata = NULL when no driver is bound).
Thus, it is not needed to manually clear the device driver data to NULL.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:34 +05:30
Fabio Estevam
3208b3701b dma: mxs-dma: Staticize mxs_dma_xlate
Fix the following sparse warning:

drivers/dma/mxs-dma.c:696:17: warning: symbol 'mxs_dma_xlate' was not declared. Should it be static?

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:33 +05:30
Jingoo Han
dd3daca162 dma: use platform_{get,set}_drvdata()
Use the wrapper functions for getting and setting the driver data using
platform_device instead of using dev_{get,set}_drvdata() with &pdev->dev,
so we can directly pass a struct platform_device.

Also, unnecessary dev_set_drvdata() is removed, because the driver core
clears the driver data to NULL after device_release or on probe failure.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:32 +05:30
Elen Song
d48de6f1a8 DMA: AT91: Get residual bytes in dma buffer
Add support for returning the residue for current transfer cookie by
reading the transfered buffer size(BTSIZE) in CTRLA register.

For a single buffer cookie, the descriptor length minus BTSIZE
can get the residue.

For a lli cookie, remain_desc will record remain descriptor length
when last descriptor finish, the remain_desc minus BTSIZE can get the
current residue.

If the cookie has completed successfully, the residue will be zero.
If the cookie is in progress, it will be the number of bytes yet to be transferred.
If get residue error, the cookie will be turn into error status.

Check dma fifo to see if data remain, let issue pending finish remain work if there is.
Signed-off-by: Elen Song <elen.song@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:31 +05:30
Elen Song
d088c33b64 DMA: AT91: Get transfer width
In one dma transfer, the data transfer width can be configured and it is limited by source or destination peripheral width,
tx_width will save the transfer width, but for memcpy, either source or destination transfer width is taken as tx_width.

Signed-off-by: Elen Song <elen.song@atmel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:30 +05:30
Nicolas Ferre
6c22770f64 dmaengine: at_hdmac/trivial: rearrange CFG register bits assignment
No modification in CFG register configuration, just rearrange
bits directives to group logically and make it more readable.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:29 +05:30
Nicolas Ferre
72ae6e4b31 dmaengine: at_hdmac: extend hardware handshaking interface identification
Peripheral handshaking identification numbers can be bigger than 15, so new
fields have been created in the CFG register.
Add macros to take this modification into account and use them in
at_dma_xlate() function.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:29 +05:30
Nicolas Ferre
ea7e79063e dmaengine: at_hdmac/trivial: correct typo in comment
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:28 +05:30
Markus Pargmann
5c6b3e7725 DMA: imx-dma: imxdma->dev used uninitialized
imxdma->dev is used for dev_warn before it was set.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:27 +05:30
Markus Pargmann
290ad0f9d9 dma: imx-dma: Add oftree support
Adding devicetree support for imx-dma driver. Use driver name for
function 'imx_dma_is_general_purpose' because the devicename for
devicetree initialized devices is different.

Signed-off-by: Markus Pargmann <mpa@pengutronix.de>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-07-05 11:40:26 +05:30
Dave Airlie
30f83b3716 Merge branch 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6 into drm-next
- GF117 acceleration support
- GK110 acceleration-with-blob-ucode support, and initial work towards
fixing our own ucode to be suitable.
- Large cleanups of fermi/kepler context handling

* 'drm-nouveau-next' of git://anongit.freedesktop.org/git/nouveau/linux-2.6: (22 commits)
  drm/nva3/disp: Fix HDMI audio regression
  drm/nv50-/disp: Use output specific mask in interrupt
  drm/nouveau: use vmalloc for pgt allocation
  drm/nvc0-/gr: remove some more of the hardcoded register writes
  drm/nvc0-/gr: factor out yet more unknown magic into versioned functions
  drm/nvd7/devinit: use fermi class, not tesla
  drm/nvf0-/gr: ctxsw scratch reg count got bumped to 16
  drm/nvc0-/gr: remove hardcoding of UNK count/mask in GPCCS ucode
  drm/nvf0/gr: build cs ucode for GK110
  drm/nvc0-/gr: extend one of the magic calculations for >4 GPCs
  drm/nvf0/gr: fix ddx shaders locking up on me
  drm/nvc0/devinit: minor typo
  drm/nvf0/gr: enable support, if external cs ucode is available
  drm/nvf0/gr: magic sequence that makes PGRAPH come out of hiding
  drm/nvf0/ce: enable support
  drm/nvf0/fifo: enable support
  drm/nvd7/gr: initial support
  drm/nvc0-/gr: generate cs register lists from grctx data
  drm/nvc0-/gr: tpc regs a subset of gpc, add separate list for gpc/unk regs
  drm/nve0-/gr: some new gpc registers can have multiple copies
  ...
2013-07-05 15:55:12 +10:00