MDSS interface timing engine registers need to be flushed
only once during the first commit to the respective panel.
Change-Id: I7a619f2eeeb57baf5429346a11eb41eedac252f3
Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
The recovery handler is used in the dsi event thread, and
the recovery handler variable was configured from a different
thread. Earlier, there is no synchronization between the two
threads when accessing the recovery handler, causing kernel
panics.
Change-Id: Iee990276fdabd65e2e1f2e3c21ad574fc0d8a7bc
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
Populate shared memory length during probe for availability
to userspace through FSCREENINFO ioctl. Also, ensure that fb
length is always available.
Change-Id: I94d3f83098fbfd81a7aa20f6fc1f19e756aebc4e
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Currently MDP is attaching/detaching iommu based on
bus bandwidth requests. This can lead to performance
issues, so implement ref count on iommu such that
iommu is attached where needed.
Change-Id: Ic4d35e2dc7f83291d1ab93d3e0109a2d69c98844
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Add support for new 20nm PLL clock driver to handle
different DSI panel resolutions. Add seperate files
to support this new 20nm PHY PLL block.
Change-Id: I4ee5309449f317daddba7106cb8e1829fd6e76cf
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Previously, we were checking the error value for mdss bus_scale_register
incorrectly. Now we check the error value for null rather than a negative
value.
Change-Id: If7fda0584df82d6c007829f2e63af9b735cafb7e
Signed-off-by: Benet Clark <benetc@codeaurora.org>
The msm register bus is currently configured by postprocessing. If the
mdss driver wants to modify the msm register bus bandwidth at any point
in the future, then the bus should be configured in a more central
location of the mdss driver.
Change-Id: I4ae65f4448f0b2be1371446d08bd4ab55c830d19
Signed-off-by: Benet Clark <benetc@codeaurora.org>
Similar to RGB fixed MMB's, msm8994 reserves fixed MMB's for VIG pipes too.
Parse fixed MMB allocation for VIG pipes from device tree and update
MMB alloc map.
Change-Id: Ie7c7dea77fe8a2afc6bfeffdb5d7f69c48b802cd
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
The timing engine flush registers for display interfaces need to be
programmed before enabling their respective timing generators.
Change-Id: I6144233e9dbad5ce5699652fac4834f0744fe2e0
Signed-off-by: Sree Sesha Aravind Vadrevu <svadrevu@codeaurora.org>
When source split is disabled on split display panels, a layer can be
split un-evenly into two pipes. When in this condition along with
vertical decimation specified by user-space, it is possible that driver
infuse extra decimation if per pipe BW is exceeded. Now when we do this,
it is possible that both halves of the same layer get different decimation
and can lead to quality difference between two panels. Fix this by not
allowing extra decimation when split display is enabled.
Change-Id: Ib47953fd94400b01d02ee07059bf008310abbc84
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
The DSI panel backlight is now configured using nanosecond duty cycle
and period for pwm. A nanosecond duty cycle is needed in order to satisfy
the granularity needed for 255 backlight levels and the DSI period. If the
pwm_period is very large, then a microsecond configuration is used.
Change-Id: I9551f52360f9d5da47ab7e2da6e039ad6f2695fb
Signed-off-by: Benet Clark <benetc@codeaurora.org>
Allow display-commit in DCM state for command mode panels. QDCM
tool requires explicit display kickoff during the calibration
stage in which the panel power is turned off.
Change-Id: Id6c7a0becf488ad2bfe9652b05d781384109f5c4
Signed-off-by: Zohaib Alam <zalam@codeaurora.org>
Centralize kickoff lock releasing, use notify event to trigger
in display commit thread.
Change-Id: I06fbe0660917a0c570b1337953f7334f3706ce8e
Signed-off-by: Ken Zhang <kenz@codeaurora.org>
Add debug message which calculates time taken by rotator
to process a frame.
Change-Id: Iffc79477c8b72230bc916631303b31bf0be9a494
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
In static screen case on command mode, when wifi display is
disconnected, buffers don't get free as there is a probability
that iommu is not attached. Ensure that iommu is attached when
wifi display terminate is called.
Change-Id: I3cd92072cc44074b31766a5542a9b59e1a2bdad1
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Rotator is a non real time client. Traffic shaper helps
spread out rotator bandwidth request so that this non
real-time client won't compete with other real time
read clients.
Change-Id: I07dbc0a6287e31d33084e27a8e1f3e9ea365d3ab
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Once rotator finished processing the data, the bandwidth for the
rotator can be removed from the bandwidth vote. This change remove
the rotator bandwidth from the vote after rotator completed the
transaction.
Change-Id: Ic79398006a1514c4b422e8b3aa7cafcb7fb3c002
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Handle race condition between ov_off and ov_commit by
acquiring the ov_lock in off API. This gives the exclusive
behavior between ov_off and ov_commit call.
Change-Id: Iaa13f9e5991a53feff12b8efaec497cae49d28d1
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
The composition fallback mechanism might not ensure unsetting of
the pipe whose prepare call failed due to smp configuration change,
typically in the cases where change in composition requests same
pipe. This scenario is a deadlock where composition switch does
not happen, due to these pipe failures.
To handle such cases, for changed SMP request for a pipe doing
non backend composition, allow smp configuration to happen, so
that the composition could be successfully switched, thereby
preventing the deadlock.
Change-Id: I2d29ac6591671494abc7c4caf7c6c53f058d12f6
Signed-off-by: Justin Philip <jphili@codeaurora.org>
When source split is enabled, a layer can be split into two at layer
mixer (LM) rather than splitting into two source pipes. But splitting
at LM is not always optimal from power and performance aspects. Display
panel properties and information about other system resource including
other layers dictate the best balance between power and performance of
this layer split. i.e 1080p video layer can always be sent through
single pipe on 1440x2560 portrait panel but that leads to higher MDP
clock compared splitting 1080p video layer into two source pipes. Since
decision to split the layer into two is done by user-land, aid in their
decision by providing information if they should split such layer or not.
Change-Id: I1009412f127423aee3f083dd2ea879dbaf2ed2ae
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
If unblank call and display thread tries to free pipe
list at the same time; one of the caller might hit the
null free list and leads to crash. Acquire list_lock
before calling the free pipe API.
Change-Id: Ieb6af1700803e3049ea918e2be358e55e43d477a
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Add page protection flag to avoid screen corruption
in pan display path.
Change-Id: Iae57ee85fd20730f5842629c5cf8778da56a13d3
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Currently, we specify the size of payload that the panel needs
to send back via the MRPS command only for DCS/Generic long
read commands. Enable the MRPS command to be sent for short
commands also based on the return length of the payload expected.
Change-Id: I634a8e5d12a8ea8d0a8118f360aef27610b21c9c
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
When device goes into suspend, MDP driver will put pipeline into border
color only without staging any pipes. Similar pipeline is setup while
resuming the device. When MDP pipeline is in border color only, minimum
MDP clock requirement is based on mixer width. Currently MDP clock
calculations are skipped if number of layers staged are 0. This set MDP
to minimum clock rate and device under-runs. Fix this by allowing MDP
clock rate calculations even when number of staged layers are 0.
Change-Id: I1c00e00b0b4ac76866a7863293bf29d2bc6a423d
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Update the dynamic fps configuration of the slave dsi controller
while updating the master controller itself. This fixes corruption issues
for dual dsi panels that have dynamic fps feature enabled.
Change-Id: Ibf4f49dcf7a228be839c511bae14e66d60340070
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
Scaling by 1 logic was complicated. After trying to understand
what use cases we were preventing with this check, we verified that
ppp is actually able to handle scaling by 1 with hw team. There
is no need for this check.
Change-Id: I9f3cda5e61740fffdbda92dc768a98796b9a8238
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
For cases such as the rotator interface, flags to
indicate retire fence file descriptors are not set.
Do not return error while copying these file descriptors
for such interfaces. This avoids the driver from setting
false positive error flags to user space processes in
usecases where retire fence fd is not present.
CRs-Fixed: 663793
Change-Id: I7918520764c364ee11f469ea757c38ef46bf93cd
Signed-off-by: Manoj Rao <manojraj@codeaurora.org>
Don't expect user space to validate for NULL ROI. DISPLAY_COMMIT
can be called by any module. So validate the ROI before
configuring MDP.
Change-Id: Iba52731e2c603f237099ad560773437bbfac112f
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Currently it is failing RGBA format though it is valid
condition.
Change-Id: I2ee26a4f3fbef3d001e5f9ff1ebdc7fd093c3a26
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Add support for post processing features when power collapse
feature is enabled. Every time MDSS enters power collapse mode,
all the post processing registers will get reset to 0, hence we
need to restore those PP registers when MDSS comes out of power
collapse mode.
Change-Id: I4abb41f17f24a12dddf50e01d8f69db19a464f3b
Signed-off-by: Ping Li <quicpingli@codeaurora.org>
Using Fixed fps and v_total for BW calculations, it
results in underrun if dynamic fps and v_total is used.
Dynamic FPS change should be Mutex protected for
synchronization between read/write so that multiple
processes don’t change fps at the same time. Line
count should be checked to make sure we have sufficient
lines before we start programming FPS. Do not configure
new fps when vsync timeout happens. Add support for
FIFO empty recovery.
CRs-Fixed: 651333
Change-Id: Icff48a7f85755484a321f0de26d4816f895c367e
Signed-off-by: Justin Philip <jphili@codeaurora.org>
Signed-off-by: raghavendra ambadas <rambad@codeaurora.org>
In MDSS 1.8.0, bit 2 in intr enable and intr status register
is marked for WB2 which is different from the other targets.
Add changes to handle the same.
Change-Id: I76947bc218c897e121bb22fbda7aaa57723ec708
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Add code to set the backlight level to zero for blank event
and restore the backlight level to its previous value during
unblank event. This will fix any unexpected panel flicker
that might show up on the screen during panel ON sequence.
CRs-Fixed: 608091
Change-Id: I871a067b0cc40d893b8b7e5a25103ebb914f9b7a
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Signed-off-by: Benet Clark <benetc@codeaurora.org>
While calculating source and destination rect of a pipe for the
programmed ROI, consider FLIP flags set for the pipe.
Change-Id: I631453c26f443b08a23556f83195d9914e05b41d
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
For better analysis, time stamp of xlog should synchronize with
the time stamp of printk. Use local_clock() to log time stamp.
CRs-Fixed: 673350
Change-Id: I00e456fdc35f5a85d8029d12f4507990444e2821
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
During panel unblank a kickoff is done to turn on the panel so that the
first update is not delayed. It is also used to give buffer to command
mode panel prior to enabling backlight prevent junk data from appearing.
In order to prevent release fence timeline from being signaled too
early we will increase the commit count. This allow next sync point
to be added to the appropriate point on timeline, instead of relying
on frame done being called before sync/commit calls.
Change-Id: I566f90b3013b59dedbe42bbb9fdf6fa37d65e779
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
Make sure the MDP clocks are turned on for register read
and write access when device comes out of power collapse mode.
Change-Id: Ibbfba8b33b85b247c82d2938322c09853528deba
Signed-off-by: Ping Li <quicpingli@codeaurora.org>
Notify post-processing features whenever there is a backlight change, so
that PP feature can update accordingly.
Change-Id: I2317088752444478bcfd9cf4f6acfa8553e85d30
Signed-off-by: Ping Li <quicpingli@codeaurora.org>
With source-split feature, a pipe can be staged across two layer
mixers (LM) and/or two pipes can be staged on a LM same stage. Current
implementation stages source split pipe into incorrect container index
for right LM. Similarly while un-staging it calculates incorrect index
if more than two pipes are staged on a single LM. Fix this to resolve
MDP pipeline hangs.
Change-Id: I89e0f5946cb330dc918641486728baea856de574
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Print error code when file node allocation fails within
fence acquire logic. This helps to find the root cause
for file node allocation failure.
Change-Id: Ib6adb9f612f13cb56d8f43549722b78440f689f8
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
msm_ion_client_create doesn't actually do anything with its heap_mask
parameter. Remove it. Also remove the extra argument from an audio
function that wraps msm_ion_client_create.
The following semantic patch was used to generate this patch:
@@
expression E1, E2;
@@
msm_ion_client_create(
- E1,
E2)
@@
expression E1, E2;
@@
msm_audio_ion_client_create(
- E1,
E2)
Change-Id: I403a125a1715b29a3db1f27c993abe0bc6d3fb11
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
Previously, the ad_info completion structure was initialized every
time ad_input was called, which reset the completion wait_queue. A
completion structure should only be initialized once, in order to
prevent any corruptions of the wait_queue. Instead, we initialize
the completion during dt probe so that the wait_queue is only
initialized once, and during ad_input, we use a safer INIT_COMPLETION
for resetting complete count.
Change-Id: If1fb7c9a9dec2ad1ec1f07b022bdeabe1af41b22
Signed-off-by: Benet Clark <benetc@codeaurora.org>
The bl_updated variable requires the BL lock. Otherwise, it can be
corrupted and cause backlight issues.
Change-Id: I55eb4b8d525765ede4f27a404f5c3f1f0b446719
Signed-off-by: Benet Clark <benetc@codeaurora.org>
There are potential deadlock between irq handler and
mdss_mdp_irq_enable() since both can acquire mdss_lock
before trying to grab local lock. Add koff_lock for kickoff
related function in addition to original clk_lock which used
for clock related function to reduce unnecessary lock contention.
CRs-Fixed: 665524
Change-Id: Iebc5023eb9dc99f2a2709379bfac67ec275046a7
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
In the current implementation, contiguous memory allocation
during bootup is removed and related changes were made in
frame buffer driver which is not backward compatible. With this
change, add backward compatibility to map to physically contiguous
memory when available which is allocated at bootup.
Change-Id: Ib1a595f2426dda8d3e1c5e50c71c35d3f45854b6
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Allow user to specify the type when requesting an overlay pipe.
If field is set the pipe type indication in the flags will be
ignored.
Change-Id: Iee51d24b96c7a2a987dc70a439342e6548dfc8fa
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>
When MDSS is idle power-collapsed, any events that require hardware
programming should result in exiting idle power collapse. Currently,
this is only done whenever a screen udpate happens. However, it is
possible that other APIs may be called prior to the actual screen
update. To address these cases, add the exit sequence call at the
interface level as well.
Change-Id: I162e1c1c4137a2ba20ed0b76f0c182c2c931cc87
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
DSI Ultra Low Power State (ULPS) mode is property of the DSI data
and clock lanes. Current implementation requires the MDP command
interface to send explicit events to the DSI controller to config
ULPS mode. However, it would be a lot more efficient if the DSI
controller would independently decide to enter/exit ULPS based on
whether the link clocks are enabled or not. This also ensures that
if any DCS commands need to be sent when ULPS is enabled, the DSI
controllers will exit ULPS accordingly.
Change-Id: If8d5b7039b5e104bcee5304c7c0ddb3cdd5bbcbc
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
