This patch uses the ability of PXA's clocklib to alias clock to resolve the
problem caused by sharing the SA1111 IO controller between PXA and SA1100
architectures, which have differing GPIO numbering.
Signed-off-by: Ian Molton <spyro@f2s.com>
When an interrupt is rerouted to a different I/O APIC pin the relevant
entry of the irq_2_pin list should get updated accordingly so that
operations are performed on the correct redirection entry.
This is already done by the 32-bit variation of the code and here is a
complementing 64-bit implementation. Should make someone's decision less
tough when merging the two. ;)
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This reverts commit 90221a61a71b7ad659d8741cf1e404506b174982.
This too was just temporary diagnostics - not needed now that we've
got the final fix via:
| commit e2079c4386
| Author: Rafael J. Wysocki <rjw@sisk.pl>
| Date: Tue Jul 8 16:12:26 2008 +0200
|
| x86: fix C1E && nx6325 stability problem
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This reverts commit a74a1cc3df0be89658bc735c8aed80c8392e2c15.
This was just temporary diagnostics commit - not needed now that we've
got the final fix.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
AMD_IOMMU should depend on IOMMU_HELPER since they are the IOMMU
helper functions. SWIOTLB requires IOMMU_HELPER so declaring that
AMD_IOMMU depends on SWIOTLB properly fixes the problems.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Add ioremap_default(), which gives a sane mapping without worrying about
type conflicts.
Use it in /dev/mem read in place of ioremap(), as with ioremap(),
any mapping of the region (other than UC_MINUS) will cause a conflict
and failure of /dev/mem read.
Should address the vbetest failure reported at:
http://bugzilla.kernel.org/show_bug.cgi?id=11057
Signed-off-by: Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
even on 64bit systems with less than 4G RAM, we can now use fixmap
to handle acpi SIT near end of ram.
change e820_end to e820_end_of_ram again?
or e820_ram_pfn?
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
and let 64-bit to fall back to use fixmap too.
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
fix phys_pmd_init to make sure not to return bigger value than end.
also print out range split:1G/2M/4K in init_memory_mapping().
Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This patch brings support for gpio/gpiolib framework to Intel IOP3xx
platforms.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Acked-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
New timings are based on application note
"NAND Flash Support on AT91SAM9 Microcontrollers" available at
http://atmel.com/dyn/resources/prod_documents/doc6255.pdf).
Signed-off-by: Patrice Vilchez <patrice.vilchez@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The initial patch from Lothar, and Lennert make it into a cleaner
one, modified and tested on PXA320 by Eric Miao.
This patch moves the L2 cache operations out of proc-xsc3.S into
dedicated outer cache support code.
CACHE_XSC3L2 can be deselected so no L2 cache specific code will be
linked in, and that L2 enable bit will not be set, this applies to
the following cases:
a. _only_ PXA300/PXA310 support included and no L2 cache wanted
b. PXA320 support included, but want L2 be disabled
So the enabling of L2 depends on two things:
- CACHE_XSC3L2 is selected
- and L2 cache is present
Where the latter is only a safeguard (previous testing shows it works
OK even when this bit is turned on).
IXP series of processors with XScale3 cannot disable L2 cache for the
moment since they depend on the L2 cache for its coherent memory, so
IXP may always select CACHE_XSC3L2.
Other L2 relevant bits are always turned on (i.e. the original code
enclosed by #if L2_CACHE_ENABLED .. #endif), as they showed no side
effects. Specifically, these bits are:
- OC bits in TTBASE register (table walk outer cache attributes)
- LLR Outer Cache Attributes (OC) in Auxiliary Control Register
Signed-off-by: Lothar WaÃ<9f>mann <LW@KARO-electronics.de>
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
And also reserve 32 IRQs for the two GPIO expanders.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Cc: Sergey Podstavin <spodstavin@ru.mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Cc: Sergey Podstavin <spodstavin@ru.mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
A pxa3xx_set_nand_info() is also introduced to set the PXA3xx NAND
driver specific platform_data structure pointer.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Cc: Sergey Podstavin <spodstavin@ru.mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
So processor specific clock sources can be defined in pxa300.c
and pxa320.c.
Signed-off-by: eric miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Some boards want to change low power state of pins on-the-fly, this
function helps to facilitate that operation instead of switching
back-n-forth between two configurations with pxa2xx_mfp_config().
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
pxa320_init_mfp() is simple enough to be embedded into pxa320_init()
to simplify the code a bit.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Setting PKWR bits on those pins will make the resuming from
low power state to fail.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The correct macro name when a driver is built as a module is
CONFIG_*_MODULE instead of CONFIG_*_MODULES. This patch fixes
this in several places.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Convert CM-X270 pin configuration to use MFP tables.
Make device initialization dependent on respective driver CONFIG_ value (like
in zylonite).
Cleanup includes
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Convert EM-X270 pin configuration to use MFP tables and gpio library
Make device initialization dependent on respective driver CONFIG_ value (like
in zylonite)
Add keypad and gpio_key devices
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
There will always be only one pwm-backlight on this device.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
It is only defined inside an "if ARCH_PXA ... endif" block, so the
depends on is not needed.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>?
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
These were only needed for hardcoded flash partition tables, which were
never submitted. It is better to have the bootloader pass the partition
table to the kernel instead.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The pin configuration array is only used during board init.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
pxa_gpio_mode() is deprecated, use the new pxa2xx_mfp_config() function to
configure GPIOs in pcm990 platform code. Convert "array, ARRAY_SIZE(array)"
to "ARRAY_AND_SIZE(array)" while at it.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
unnecessary menu level
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add a function to dynamically allocate and register pxa2xx-spi platform
devices, to be used by PXA2xx and PXA3xx based systems. Switch pcm027 and
lubbock to use it.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@pengutronix.de>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The Zylonite has an AC97 subsystem on it so register the AC97 controller
device.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
As well as moving all the device declarations to a single one in devices.c
this causes all platforms to register the I/O and interrupt resources for
the AC97 controller.
Cc: eric miao <eric.miao@marvell.com>
Cc: Mike Rapoport <mike@compulab.co.il>
Cc: Lennert Buytenhek <buytenh@wantstofly.org>
Cc: Jürgen Schindele <linux@schindele.name>
Cc: Juergen Beisert <jbe@pengutronix.de>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The pxa2xx_udc.c driver is renamed to pxa25x_udc.c (the platform
driver name changes from pxa2xx-udc to pxa25x-udc) and the
platform driver name of pxa27x_udc.c is fixed to pxa27x-udc.
pxa_device_udc in devices.c is split into pxa25x and pxa27x flavors
and the pxa27x_device_udc is enabled in pxa27x.c.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Acked-by: Nicolas Pitre <nico@cam.org>
Acked-by: Eric Miao <eric.miao@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Including from Ian Molton:
Fixes for mistakes left over from the PXA2{5,7}X UDC split.
Signed-off-by: Ian Molton <spyro@f2s.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Provide a set of functions to control state of pins dedicated to IrDA.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
