Commit graph

4273 commits

Author SHA1 Message Date
Hillf Danton
b1c10bea62 MIPS: Add fast get_user_pages
Gup is used in a few cases, say futex.

This work is derived from the x86 version, and operations of pte and pmd are
adapted to the defines of MIPS in straight forward manner.

[ralf@linux-mips.org: Fixed up reject in arch/mips/mm/Makefile due to
whitespace formatting differences.  Fixed build error in gup.c due to
conflicting changes elsewhere in the kernel.]

Signed-off-by: Hillf Danton <dhillf@gmail.com>
Cc: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2859/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:45 +00:00
Hillf Danton
5639bc4a64 MIPS: Hugetlb: Keep TLB cache hot while flushing
If we only flush the TLB of the given huge page, the TLB cache remains hot
for the relevant mm as it is, and less will be refilled after flush, huge
or not.

Signed-off-by: Hillf Danton <dhillf@gmail.com>
Cc: linux-mips@linux-mips.org
Acked-by: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/2860/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:45 +00:00
Thomas Bogendoerfer
e84de0c619 MIPS: GIO bus support for SGI IP22/28
SGI IP22/IP28 machines have GIO busses for adding graphics and other
extension cards. This patch adds support for GIO driver/device
handling and converts the newport console driver to a GIO driver.

[ralf@linux-mips.org: Fixed build error caused by the modules.h -> export.h
changes.]

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Acked-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
To: linux-fbdev@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2886/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:44 +00:00
David Daney
714c1f5c1a MIPS: Octeon: Update DMA mapping operations for OCTEON II processors.
OCTEON II has a new dma to phys mapping method for PCIe.  Define
OCTEON_DMA_BAR_TYPE_PCIE2 to denote this case, and handle it.

OCTEON II also needs a swiotlb if the OHCI USB driver is enabled, so
allocate this too.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2983/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:29 +00:00
David Daney
26afc5e399 MIPS: Octeon: Update feature test functions for new chips and features.
cvmx.h was rearranged to fix include file ordering problems, but there
is no change other than moving some definitions around.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2984/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:29 +00:00
David Daney
412394d104 MIPS: Octeon: Update SOC PCI related register definitions for new chips.
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2986/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:29 +00:00
David Daney
37d3bfd992 MIPS: Octeon: Rearrange CVMX files in preperation for device tree
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Cc: devel@driverdev.osuosl.org
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Patchwork: https://patchwork.linux-mips.org/patch/2941/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:29 +00:00
David Daney
ada11a339d MIPS: Octeon: Update bootloader board type constants.
Many new types of boards exist, so lets recognize them.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Cc: devel@driverdev.osuosl.org
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Patchwork: https://patchwork.linux-mips.org/patch/2940/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:28 +00:00
David Daney
af866496c7 MIPS: Octeon: Move some Ethernet support files out of staging.
Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Cc: devel@driverdev.osuosl.org
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Patchwork: https://patchwork.linux-mips.org/patch/2942/
Patchwork: https://patchwork.linux-mips.org/patch/3012/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:28 +00:00
David Daney
751c9f6849 MIPS: Oceton: Update model detection code for new chips.
Several newer chips were not covered, update the code to detect them.
This necessitates updating cvmx-mio-defs.h as well, because it has new
and required definitions.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2939/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:28 +00:00
David Daney
506d24be55 MIPS: Octeon: Update struct cvmx_bootinfo to v3.
Bootloaders can pass version 3 of this structure.  Add the new fields
so we can support the Device Tree.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2938/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:28 +00:00
Kevin Cernekee
df0ac8a406 MIPS: BMIPS: Add SMP support code for BMIPS43xx/BMIPS5000
Initial commit of BMIPS SMP support code.  Smoke-tested on a variety of
BMIPS4350, BMIPS4380, and BMIPS5000 platforms.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2977/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:18 +00:00
Kevin Cernekee
6fb97effee MIPS: Add board_ebase_setup()
Some systems need to relocate the MIPS exception vector base during
trap initialization.  Add a hook to make this possible.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2959/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:18 +00:00
Kevin Cernekee
34bd92e27b MIPS: Add NMI notifier
Allow the board support code to register a raw notifier callback for
NMI, similar to what is done for CU2 exceptions.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2958/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:18 +00:00
Kevin Cernekee
18a1eef92d MIPS: BMIPS: Introduce bmips.h
bmips.h contains BMIPS definitions that are useful for SMP, vector
relocation, performance counters, etc.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2973/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:18 +00:00
Kevin Cernekee
020232f1ca MIPS: BMIPS: Add set/clear CP0 macros for BMIPS operations
Several BMIPS-specific CP0 registers are used for SMP boot and other
operations.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2956/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:18 +00:00
Kevin Cernekee
1c7c44519a MIPS: BMIPS: Add CFLAGS, Makefile entries for BMIPS
Add CONFIG_CPU_BMIPS* in all of the right places, so that BMIPS kernel
images will compile and run.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2955/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:17 +00:00
Kevin Cernekee
15fb0a1509 MIPS: Clean up whitespace warning in hazards.h
Use a tab on second and subsequent lines of multiline #if's, for
consistency with the next commit.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2954/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:17 +00:00
Kevin Cernekee
1bbb6c1b7b MIPS: BMIPS: Fix up Kconfig settings
Factor out common BMIPS options into "CPU_BMIPS".  Add L2 cache for
BMIPS5000.  Add CPU_MIPS32 to satisfy checks in page.h, r4k_switch.S,
tlb-r4k.c, etc.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2953/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:17 +00:00
Florian Fainelli
b15a6d62b5 MIPS: BCM63XX: generate WLAN MAC address after registering ethernet devices.
In case the MAC address pool is not big enough to also register a WLAN device
prefer registering the Ethernet devices.

[ralf@linux-mips.org: Fixed formatting as per Sergei's complaint.]

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3013/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:04 +00:00
Florian Fainelli
92d9ae2026 MIPS: BCM63xx: Fix GPIO set/get for BCM6345
On BCM6345, the register offsets for the set/get GPIO registers is wrong.
Use the same logic as the one present in arch/mips/bcm63xx/irq.c to
define the correct gpio_out_low_reg value when support for BCM6345
is compiled in.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3010/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:04 +00:00
Florian Fainelli
e1c96c8620 MIPS: BCM63xx: Remove BCM6345 hacks to read base boot address
Though BCM6345 does not technically have the same MPI register layout
than the other SoCs, reading the chip-select registers is done the same
way, and particularly for chip-select 0, which is the boot flash.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3009/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:04 +00:00
Florian Fainelli
d61fcfe2bb MIPS: BCM63xx: Fix SDRAM size computation for BCM6345
Instead of hardcoding the amount of available RAM, read the number of
effective multiples of 8MB from SDRAM_MBASE_REG.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3008/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:04 +00:00
Maxime Bizon
04712f3ff6 MIPS: BCM63XX: Add support for bcm6368 CPU.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2892/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:04 +00:00
Maxime Bizon
6224892c81 MIPS: BCM63XX: Add external irq support for non 6348 CPUs.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2899/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:04 +00:00
Maxime Bizon
71a43927b3 MIPS: BCM63XX: Handle 64 bits irq stat register in irq code.
bcm6368 has larger irq registers, prepare for this.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2898/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:03 +00:00
Maxime Bizon
015ce7d352 MIPS: BCM63XX: Introduce bcm_readq & bcm_writeq.
Needed for upcoming 6368 CPU support.

[ralf@linux-mips.org: Changed function names as per Sergei's comments.]

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2896/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:03 +00:00
Maxime Bizon
37c42a741f MIPS: BCM63XX: Prepare irq code to handle different external irq hardware implementation.
External irq only works for 6348, change code to prepare support of
other CPUs.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2895/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:03 +00:00
Maxime Bizon
f61cced993 MIPS: BCM63XX: Change irq code to prepare for per-cpu peculiarity.
No functionnal change is introduced by this patch.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2894/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:03 +00:00
Maxime Bizon
d430b6c5e7 MIPS: BCM63XX: Add more register sets & missing register definitions.
Needed for upcoming 6368 CPU support.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2893/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:03 +00:00
Maxime Bizon
ec68c5206a MIPS: BCM63XX: Cleanup cpu registers.
Use preprocessor when possible to avoid duplicated and error-prone
code.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2897/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:03 +00:00
Maxime Bizon
d64ed7ada2 MIPS: BCM63XX: Call board_register_device from device_initcall()
Some device registration (eg leds), expect subsystem initcall to be
run first, so move board device registration to device_initcall().

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2891/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:02 +00:00
Maxime Bizon
455a503f4c MIPS: BCM63XX: Hook up plat_ioremap to intercept soc registers remapping.
Internal SOC registers can be directly accessed, no need to waste a
TLB entry.

Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2890/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:03:02 +00:00
Gabor Juhos
b606d5ae90 MIPS: ath79: Rename dev-ar913x-wmac.c to dev-wmac.c
Rename the file as a last step of the 'ar913x' removal changes.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3034/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:48 +00:00
Gabor Juhos
009b9d52e5 MIPS: ath79: Rename dev-ar913x-wmac.h to dev-wmac.h
The 'ar913x' part was removed from the common variable and function names,
so remove that from the relevant header file name as well.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3033/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:48 +00:00
Gabor Juhos
0b0db270b8 MIPS: ath79: Register the wireless MAC device on the AP121 board
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3032/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:48 +00:00
Gabor Juhos
3ae4002231 MIPS: ath79: Rename ATH79_DEV_AR913X_WMAC option to ATH79_DEV_WMAC
The ATH79_DEV_AR913X_WMAC option was used to select the AR913x specific
wireless MAC registration code.  The registration code now supports the
AR933X SoCs as well. Rename the option to reflect the changes.

Also make the new option depends on SOC_AR933X.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3031/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:48 +00:00
Gabor Juhos
34cfcd26bd MIPS: ath79: Add AR933x specific WMAC setup code
The wireless MAC of the AR933x SoCs uses different base address, and
requires different setup code.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3030/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:48 +00:00
Gabor Juhos
6903bb49da MIPS: ath79: Separate AR913x SoC specific WMAC setup code
The device registration code can be shared between the different SoCs, but
the required setup code varies Move AR913x specific setup code into a
separate function in order to make adding support for another SoCs easier.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3029/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:47 +00:00
Gabor Juhos
67b0f0f1b3 MIPS: ath79: Remove 'ar913x' from common variable and function names
The wireless MAC specific variables and the registration code can be shared
between multiple SoCs. Remove the 'ar913x' part from the function and
variable names to avoid confusions.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3028/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:47 +00:00
Gabor Juhos
be5f362320 MIPS: ath79: Store the SoC revision in a global variable
Knowing the exact revision of the SoC is required to make runtime decisions
in various code paths.  We have determined the SoC revision already, so we
only need to store that in a global variable.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3027/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:47 +00:00
Rene Bolldorf
2dc7b4a197 Initial support for the Ubiquiti Networks XM board (rev 1.0).
Signed-off-by: Rene Bolldorf <xsecute@googlemail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/3020/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:47 +00:00
Rene Bolldorf
4ff40d5a76 MIPS: Initial PCI support for Atheros 724x SoCs.
[ralf@linux-mips.org: Fixed the odd formatting of all break statements.]

Signed-off-by: Rene Bolldorf <xsecute@googlemail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/3019/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:47 +00:00
Gabor Juhos
7e0dde175e MIPS: ath79: Add initial support for the Atheros AP121 reference board
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2531/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:47 +00:00
Gabor Juhos
13051c5cc3 MIPS: ath79: register UART device for the AR933X SoCs
The AR933X SoCs does not have a 8250 compatible UART, they
are using a different UART core. Register a different platform
device for the different UART.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2528/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:46 +00:00
Gabor Juhos
d57f341ba0 SERIAL: AR933X: Add driver for the built-in UART of the SoC
This patch adds the driver for the built-in UART of the
Atheros AR933X SoCs.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: linux-serial@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/2526/
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:46 +00:00
Gabor Juhos
c279b77596 MIPS: ath79: add AR933X specific USB platform device registration
Also select the USB_ARCH_HAS_EHCI symbol in order to make the
EHCI driver available.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2527/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:46 +00:00
Gabor Juhos
2c048303d6 MIPS: ath79: Add config symbol for the AR933X SoCs
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2525/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:46 +00:00
Gabor Juhos
fdfbcf4705 MIPS: ath79: add AR933X specific GPIO initialization
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2524/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:46 +00:00
Gabor Juhos
54eed4c77c MIPS: ath79: Add AR933X specific IRQ initialization
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Kathy Giori <kgiori@qca.qualcomm.com>
Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
Patchwork: https://patchwork.linux-mips.org/patch/2530/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-12-07 22:02:45 +00:00