Add supported UBWC formats to mdp debug, so that it displays
the correct format name.
Change-Id: I055d49344b13a74c0164072fa1da910921ef0606
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
In the current implementation for dynamic fps in vfp method, while
calculating the porch values current fps is taken as reference which
may lead to precision loss and clock calculations go wrong. Use the
default fps as reference for any change in fps.
Change-Id: I9a36c33c9824c95abc4925a324f9cd2f47456e6a
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
When programming pipe in solid fill, the image properties should be
programmed to make sure that scaling blocks are bypassed. In order to
do this we need to program out resolution to same size as source.
Change-Id: If0a9182ca738e753f99a5b5e9cc20bc76b75238a
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Current mixer allocation logic does initialization only if the mixer is
part of the mixer pool, however code has additional path for alternative
mixer which is not being initialized. Also don't need to reallocate the
mixer if it's already allocated in case of split display.
Change-Id: I1dbbbb86096c4825d214755d9cc7bf81b2abbbc8
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Provide info about current panel timings when dumping mdp debugfs data.
Change-Id: Id2b481797e86131e8d32d7fc59531964f0a21c0a
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
When pingpong split is enabled, we need to configure both PP0 and
PP4 tear check blocks for synchronization between the two interfaces.
In the existing implementation, the two tearcheck blocks are being
enabled at different time and the two TE counters are asynchronous.
This asynchronous behaviour could lead to DSI FIFO underflows and
are fatal during subsequent panel on/off. This change enables both
the tear check blocks together and waits for the TE signal to
synchronize.
Change-Id: I966dcead59028c729a71cc7e47343303b0b9a6b2
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
In the current framebuffer driver, user context may be put to sleep
to serialize certain operations. These contexts are woken up on certain
conditions, one of which is system shutdown notification. Current api
used, wait_event_timeout, relies on wait queue to be woken up if any
variable that could change the result of the sleep condition. So when
shutdown context is active, it needs to wake up threads waiting on
shutdown notification else they will timeout and may delay the shutdown
process.
Change-Id: I11b97e4c65b434c5f35d455a5040f407a1460516
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
mdss_fb_pan_idle and mdss_fb_wait_for_kickoff are used to hold the
current context until it is safe to proceed. Unless shutdown is going on,
these contexts are woken up by corresponding display thread responsible
for committing a frame to display. Display thread has various delays like
waiting for fences to be signalled, waiting for previous frame to finish
or waiting for a vsync etc. Under normal circumstances, these delays are
very negligible and different threads work in good harmony. However in a
heavily loaded system or some bad thread which disables interrupts for a
long time, these delays can become very large. Increase timeout to
arbitrarily derived value and add error messaging when the timeout is
observed. Remove panic from the timeout to let the system recover by
itself.
Change-Id: I58fe4c0d8b0c43998f87384035a1eacc24d7230a
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
This change adds MDSS version macro for msm8952
Change-Id: I096833c36229f2d623ab7efdeaf43035e5254973
Signed-off-by: Nitesh Gupta <niteshg@codeaurora.org>
In situation such as partial update mixer's roi and total height
and width are different. Adding roi information to increase
debugging information.
Change-Id: Iec7de7ae35e6d052d2e3c71d88bb8feba4da245d
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
Configure MDP DSC related registers when it enabled.
It updates the PP, DSC block, configure PP block output
to big endian and configure video timing with compressed
width.
Change-Id: I072aba1935cd36b5206bf56580416d470707fe1b
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Add DSC run time parameters calculation base on some
predefined parameters input from dtsi. Also configure
DSI controller properly if it is enabled.
Change-Id: I24b7a2cb829084f76a159b54170b87d051c9eac6
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
DSC (display stream compression) is the new module and
supported starting MSM8996 target. Input offsets from
dtsi so that registers belong to DSC can be configured.
Change-Id: I3f06b1a2524bd0d2d408baac4309061f1f9117e8
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Few DSI panels have requirement of receiving display on command
after receiving sleep out command and pixel stream data. This
can be achieved by sending panel on command followed by timing
engine enable. This change adds the support for such DSI panelS.
Change-Id: Ifa225aec4ad9bfd692e19c02bcb726c8d60ce4fb
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
MDSS hardware accepts 0 or greater value for repeat
pixel. However, if software tries to configure the
negative value it leads to underrun due to large value.
In such cases, software should configure the overfetch
block which allows the negative value.
CRs-fixed: 814452
Change-Id: I915a1f10951ae12d451cbf4a5fdff427174d32dc
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Earlier, camera preview buffers were of NV21(YCrCb_420_SP)
and the video buffers were of NV12_VENUS(YCbCr_420_SP_VENUS)
format. Now that the video encoder has support for NV21,
both the camera and video buffers can be of NV21_VENUS
(YCrCb_420_SP_VENUS) format.
If the preview and video buffer sizes are the same, CPP
double pass to generate video and preview buffers can be
avoided and the buffers can now be generated within a
single pass with CPP duplication thereby saving power.
Add support in kernel for NV12_VENUS format to achieve
the same.
Change-Id: Ia0ee0155faaa5ba6d5cafbc0529428734eaf37e5
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Incorrect HW revision check in MDSS drier is leading to
boot up failure for 8996 v2. This change fixes it.
Change-Id: I9c45387e48abcd48eec1dcb9fe9fda9a408c58d5
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Reduce dependency between hw cursor updates and display commit.
Configure the cursor pipes and flush immediately, rather than
waiting for the commit. This would enable multiple cursor updates
within a single vsync. However, the screen update would happen
only after vsync, which would pick the latest cursor update. The
restriction is that after the first cursor update, a display commit
is required to stage the cursor pipes.
Change-Id: I666856c88b8e2decac6578237e9b93b106378ffa
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
mdss_mdp_wfd_wait_for_finish was returning positive value causing
false failures in atomic validate of wfd.
Change-Id: Idbb8c3a22040d3c8b0f31fa7be8143261ccbfb85
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
There could be multiple references to the framebuffer, when
releasing the last one the panel should be blanked. When blanking the
panel we should make sure that panel update has finished (wait for panel
idle), however this wait should be done only if it will lead to a
change in the panel. Avoid this wait if there are more than one ref
counts which means that panel won't be blanked.
Change-Id: I22ffd25cfc6d0512d006a979613610314772a27e
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Pipe is marked dirty if it was newly allocated during validate. This
prevents unintentional staging for dirty pipes to HW. However when
the same pipe is used again with good configuration, dirty flag should
be reset. This is missing and leads to skipping of certain layers and
flooding of error logs. Fix this by resting dirty flag when pipe is
successfully validated.
Change-Id: I2d64ecbaaa8968ee7322270c93f5bf5c3e5c90e9
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Return EBADSLT error for pipe allocation failures due to priority
mismatch. This isolation helps the client to identify and allocate
pipes to layers efficiently.
Change-Id: I601bd4880ade8313be3b870ca4551b40ebb7d00b
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
There are situations where mdss_mdp_rotator_release_all is called
and rotator session manager is not initialized. Added error
checking to prevent crashing.
Change-Id: I104fa88dd41bb4bad3a0402cf6955c85f640e384
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
Two new DCS types, compression_mode (0x03) and pps (0x0a)
are introduced to support DCS (Display Stream Compression).
Add process those two new dcs types to support DSC.
Change-Id: Ibbd90c7c84598ba24a5919174bb547e851cc4754
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
180 and 270 degree rotations simply consist of some combination of
90 degree, up down flip, and left right flip. The checks for
these basic operations are above the code being removed in this patch.
These explicit checks misclassifies 90 degree rotation as 270
degree rotation, and only left right flip as 180 and 270 degree
rotation.
Change-Id: I1ce547f83e350869ec0f3a1ab3be2fd7f2be752c
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
mdss_mdp_mixer_pipe_update function performs two tasks, one it stages
pipe onto mixer's stage_pipe container for next frame and it also
un-stages same pipe from previous stage if different. When source split
is enabled, pipe can be on left blend or right blend of a given stage.
Now between consecutive frame, pipe can change the z_order and it can
change its blend as well. However current implementation of pipe update
function has an issue where it doesn't un-stage the pipe if its blend
changes between consecutive frames. Check the example below.
* Frame N, pipe X is on right blend, odd index, at z_order 1
* Frame N+1, pipe X is on left blend, even index, at z_order 2
Now when mdss_mdp_mixer_pipe_update is called for Frame (N+1), it should
stage pipe X at z_order 2 and on left blend. It also need to remove the
pipe from right blend of the z_order 1. Due to the bug 2nd task is not
performed and it leads to above error message. There were no side effects
of this bug except for the transient error log.
Change-Id: I0d6b4d9574b8ea9229754199250e2ce795ca2e12
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
For more accurate clk rate calculations we need to know
which rotator item is assigned to which rotator block.
Change-Id: I5cb8a50728600af10d1a97ffd582269e82623f90
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
While reporting for the resolution details, do not check if
down stream data is valid or not as not all transmitter
configurations have down stream device attached.
Change-Id: I498b94956f0ddbae0dff22d323f8299ff1ecb262
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>
The number of cursor pipe structures allocated was mistakenly
set to the number of ViG pipes. Fix the issue to allocate it to the
number of cursor pipes.
Change-Id: I88185a97c64767ad993997d7e4b5398526068222
Signed-off-by: Alhad Purnapatre <alhadp@codeaurora.org>
Pass the secure pixel vmid for secure context banks in domain
attributes before calling attach for both mdss and rotator
SMMUs.
Change-Id: Ide25821d85c2e912cd91b8e206277456d4c78f3d
Signed-off-by: Shalaj Jain <shalajj@codeaurora.org>
SCM call to unlock the registers is not required for
msm8996 target. However, such call during resume
prints multiple error messages when GDSC is toggled. This
change adds mdss hw capability option to handle the
case.
Change-Id: I6084d0e1e2b7d08c853e44ee2c6e276cc47f1244
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Remove extra print for function name in debug module.
Change-Id: Ic7327bcedb2254b2bc4b7655138289a19605f935
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
"vdd-cx" is optional regulator and usage of incorrect API
returns the dummy regulator. Display driver tries to
enable/disable this regulator on each suspend/resume and
prints error based on return value. This change uses
correct API for optional regulator to avoid unnecessary
error messages on each suspend/resume.
Change-Id: I51df98fd32702e4de83c5ecc5311f176f82818e1
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
MDSS hardware on msm8996 target supports RGBX UBWC format
because it handles the RGBA and RGBX formats in same manner.
This change adds the RGBX UBWC format support with
compression ratio information.
Change-Id: I674d136496910e017d4c21d56b62def7eff0562e
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
When source split is used, pipe can be staged on two mixers or it can
be staged on right blend of a mixer. It is also possible that same pipe
is used at different z_order in consecutive frames. When pipe's z_order
is changed and it goes from two mixers to single mixer or right blend to
left blend or any other such variations, pipe needs to un-stage properly.
Fix issues in current code by correcting order of state assignments.
Change-Id: I5b26cc98186183713b7a187673bcb30440d14145
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Buffer lists are protected by list_lock to prevent multiple threads from
modifying the list. Locks are missing in a few places which may lead to
potential concurrent access and lead to corruption. Add proper locking
to prevent this.
CRs-Fixed: 806684
Change-Id: I95c5ebbb5cd9c11c38ea9be0826f3b8748632a5b
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Overlay buffer allocations are marked as kmemleak because the base
pointer is not being tracked, rather these are tracked as part of a
list. Add kmemleak_not_leak to prevent false positives.
Change-Id: I3c54c15b6d73d3aece8e28b7723e0cf9c4953be5
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
[cip@codeaurora.org: Resolved merge conflict]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Uninitialized panel_name array can cause the invalid string
comparison between "NON_PANEL" and uninitialized value. Fix this
by initialized the array with null string.
CRs-fixed: 790201
Change-Id: I18486db909e5d41e39b5e6052c8c7c760ae8d4b4
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Change Ic07deab12aa43bc4f61762303ed367fe3131389f,
msm: mdss: enable source split with dual-dsi partial update,
introduced the problem of only half screen getting updated for
4k HMDI. Since HDMI does not have a slave controller, it was not
configuring the src_split_req flag correctly. 4k HDMI uses both
left and right mixers controlled by a single ctl. Fix the issue
by setting the src_split_req appropriately.
Change-Id: I333afd85ae5dc88610c352b557a834526bafcdfd
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Enable mode switch to occur if atomic commit is being used.
Previously feature was implemented for prepare/commit pairings.
Change-Id: I5eb1b5512a695fd6412e30728eabe129159d7d96
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
It is possible for rotator to drop alpha value from RGBA8888
or to add don't care to RGB888.
Change-Id: I17b6ba7a4d793c4f77be5cb5e98a3b9aa59e90f4
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
The writeback block in the rotator supports ubwc output.
This change enables the client to specify ubwc input and
output format.
Change-Id: Ic9aee90b0edd2128383ecb03cdf7882cd8c8e3e1
Signed-off-by: Xiaoming Zhou <zhoux@codeaurora.org>
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
Left panel stays in sleep-in mode if clocks are not
turned on for both controllers. Enable clock
before sending commands and skip clamp controller
for command mode panel support on msm8996.
Change-Id: I8d6c6f9253407d1b6fd8001a00be4876a006deea
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
In HDMI Tx controller version 4 and beyond, HDCP registers have been
moved out of secure domain and can be accessed directly, in an
address range of their own. Add support to map this address range and
access these registers directly if we are running on HDMI controller
version 4 and above.
Change-Id: I2d790bf60f42055ba3e10d0ec82812be292826a3
Signed-off-by: Alhad Purnapatre <alhadp@codeaurora.org>
[cip@codeaurora.org: Removed arch/arm/boot/dts/qcom/msm8996-mdss.dtsi]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Currently, fb split height and width are calculated before setting
the split mode in overlay init function. This leads to bootup issues
when dual dsi panel is used with destination split is enabled. Hence
correct those values in overlay init while assigning the split mode.
Change-Id: I93108a60be9c6f7a63b6743daafd50743792573f
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
Current code does not program the panic luts
for the cursor pipes. Adding cursor pipes to
the panic luts programming.
Change-Id: Id17f5006d5344e8fd9363bcf4ff8bff2fa07cc5a
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Increase the prefetch lines and disable
the bandwidth calculations during vertical
blanking for 8992 and 8996 if the vertical timings
plus prefetch are enough.
Change-Id: I94f72a43c95f0574e2165810b9c20d50af1fecdb
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
Adjust prefill BW equations to update the
latency buffer size for 8996.
Change-Id: Iddcd6fad01025dcfd17b41d3ed2f98b03b7b08fc
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
When pipe_assign calls pipe_init_config it determines
if the pipe is for use by real time client based on info
pipes left mixer. This value was not properly assigned
prior to this call.
Change-Id: If5edf449b8e501f9400d81477fcc12a8285e1172
Signed-off-by: Terence Hampson <thampson@codeaurora.org>
Add new xlog messages to aid in debugging of MDSS issues. Some of the new
messages include information regarding mixer configuration, write-back
configuration at start and finish of the operation, pipe configuration
and pixel extensions etc. Also remove old mixer reg xlog and report xlog
from mdp_clk_ctrl only once to prevent flooding.
Conflicts:
drivers/video/msm/mdss/mdss_mdp_ctl.c
Change-Id: I11fd63a220b1ccd102dcd48d3878cf96fc91bc5f
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
