Commit graph

536005 commits

Author SHA1 Message Date
Jammy Zhou
a72ce6f841 drm/amd: add basic scheduling framework
run queue:
A set of entities scheduling commands for the same ring. It
implements the scheduling policy that selects the next entity to
emit commands from.

entity:
A scheduler entity is a wrapper around a job queue or a group of
other entities. This can be used to build hierarchies of entities.
For example all job queue entities belonging to the same process
may be placed in a higher level entity and scheduled against other
process entities.
Entities take turns emitting jobs from their job queue to the
corresponding hardware ring, in accordance with the scheduler policy.

Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Acked-by: Christian K?nig <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:30 -04:00
David Zhang
2da78e21d1 drm/amdgpu: Enable the Fiji DID 0x7300 support
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:30 -04:00
Alex Deucher
d07f5c4c23 drm/amdgpu: remove VM workaround for Fiji
The bug is fixed in fiji.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:29 -04:00
Alex Deucher
188a9bcd6c drm/amdgpu: add support for VCE 3.x on Fiji
VCE on fiji is single pipe only.

Reviewed-by: David Zhang <david1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:29 -04:00
David Zhang
974ee3db0f drm/amdgpu: Add Fiji support to the UVD 6.0 IP module
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:28 -04:00
David Zhang
1a5bbb6695 drm/amdgpu: Add Fiji support to the SDMA 3.0 IP module
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:27 -04:00
David Zhang
af15a2d51d drm/amdgpu: Add Fiji support to the GFX 8.0 IP module (v2)
v2: agd5f: fix the rb setup.

Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:27 -04:00
David Zhang
843908604d drm/amdgpu: Add Fiji support to the DCE 10.0 IP module (v2)
v2: agd5f: fix up XDMA golden settings

Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:26 -04:00
David Zhang
8e711e1a1a drm/amdgpu: Add Fiji support to SMC and DPM (v2)
v2: agd5f: prepare for release

Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:26 -04:00
David Zhang
d1c4dcfb76 drm/amdgpu: Add Fiji smu 7.1.3 headers (v2)
v2: agd5f: prepare for release

Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:25 -04:00
David Zhang
aa8a3b5395 drm/amdgpu: Add Fiji support to IH module
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:24 -04:00
David Zhang
127a262853 drm/amdgpu: Add Fiji support to the GMC 8.5 IP module
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:24 -04:00
David Zhang
48299f95f7 drm/amdgpu: Add Fiji DID 0x7300 common support
Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:23 -04:00
Alex Deucher
41548ef78b drm/amdgpu: handle conditional support for CIK properly
gfx7 support is not necessary or available if CIK support
is not enabled.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:23 -04:00
monk.liu
e60b344f6c drm/amdgpu: optimize amdgpu_parser_init
use kmalloc_array instead of kcalloc where appropriate and other
cleanups.

Signed-off-by: monk.liu <monk.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:22 -04:00
Jammy Zhou
2f7d10b393 drm/amdgpu: merge amdgpu_family.h into amd_shared.h (v2)
Make the definitions common for all driver components

v2: fix kfd

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:21 -04:00
Jammy Zhou
fa9f1d4e86 drm/amdgpu: add some pptable definitions
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:21 -04:00
Jammy Zhou
0b2daf09cf drm/amdgpu: add some common definitions to amd_shared.h
Add GPU family definitions and timeout value for IP components.

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:20 -04:00
Marek Olšák
c7890fea04 drm/amdgpu: allow userspace to read more debug registers
Feel free to suggest more.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:20 -04:00
Alex Deucher
8e9198d069 drm/amdgpu: move some atombios definitions to common folder (v2)
the definitions can be shared by different IP components.

v2: fix include path

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:19 -04:00
Christian König
5430a3ffb0 drm/amdgpu: fix UVD/VCE fence handling
We need to return the sequence number to userspace
even when we don't use user fences.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:18 -04:00
Alex Deucher
5ceb54c68a drm/amdgpu: add fence suspend/resume functions
Added to:
- handle draining the ring on suspend
- properly enable/disable interrupts on suspend and resume

Fix breakages from:
commit 467ee3be53d240d08beed2e82a941e820c1ac323
Author: Chunming Zhou <david1.zhou@amd.com>
Date:   Mon Jun 1 14:14:32 2015 +0800

    drm/amdgpu: always enable EOP interrupt v2

Tested-by: Audrey Grodzovsky <audrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:18 -04:00
Chunming Zhou
c6a4079bad drm/amdgpu: always enable EOP interrupt v2
v2 (chk): always enable EOP interrupt, independent of scheduler,
	  remove now unused delayed_irq handling.

Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:17 -04:00
Christian König
7f8a5290f5 drm/amdgpu: rework vm_grab_id interface
This makes assigning VM IDs independent from the use of VM IDs.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:16 -04:00
Christian König
fc8fa5e428 drm/amdgpu: no updates shouldn't cause vm flush v2
v2 (chk): split fix from original patch

Signed-off-by: monk.liu <monk.liu@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:16 -04:00
Christian König
cf6f1d3949 drm/amdgpu: fix signed overrun in amdgpu_ctx_get_fence
Otherwise the first 16 fences of a context will always signal immediately.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:15 -04:00
Christian König
cdecb65b4e drm/amdgpu: fix context memory leak
Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
2015-08-17 16:50:15 -04:00
Christian König
0753b45242 drm/amdgpu: remove amdgpu_fence_recreate
It's not used any more.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:50:14 -04:00
Christian König
21c16bf634 drm/amdgpu: add user fence context map v2
This is a prerequisite for the GPU scheduler to make the order
of submission independent from the order of execution.

v2: properly implement the locking

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:50:14 -04:00
Christian König
91e1a5207e drm/amdgpu: deal with foreign fences in amdgpu_sync
This also requires some error handling from the callers of that function.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:50:13 -04:00
Alex Deucher
0b492a4c92 drm/amdgpu: cleanup context structure v2
The comment is misleading and incorrect, remove it.

Printing the id is completely meaningless and this practice
can cause a race conditions on command submission.

The flags and hangs fields are completely unused.

Give all fields a common indentation.

v2: remove fpriv reference and unused flags as well, fix debug message.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
2015-08-17 16:50:12 -04:00
rezhu
404b2fa338 drm/amdgpu: add cgs_interface for pg and cg
v3: check whether ip_blocks is enable
v2: add break in the for loop.

Signed-off-by: Rex zhu <rezhu@amd.com>
2015-08-17 16:50:12 -04:00
Jammy Zhou
97baee7170 drm/amdgpu: fix some typo for cgs definitions
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:11 -04:00
Jammy Zhou
bf3911b06f drm/amdgpu: add cgs_get_firmware_info interface v2
This new interface can be used by IP components to retrieve the
firmware information from the core driver.

v2: fix one typo

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhou@amd.com>
Signed-off-by: Young Yang <Young.Yang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:11 -04:00
Chunming Zhou
57ff96cf47 drm/amdgpu: implement cgs gpu memory callbacks
This implements the cgs interface for allocating
GPU memory.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:10 -04:00
Chunming Zhou
25da442779 drm/amdgpu: add atom interfaces for CGS
This implements the interface for atombios command
and data table access.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:09 -04:00
Alex Deucher
0cf3be2178 drm/amdgpu: Implement irq interfaces for CGS
This implements the irq src registrar.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:09 -04:00
Chunming Zhou
97cb7f6e6c drm/amdgpu: Implement the pciconfig callbacks for CGS
This implements the pciconfig register accessors.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:08 -04:00
Chunming Zhou
aba684d87a drm/amdgpu: Implement mmio callbacks for CGS
This implements the MMIO register accessors.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:08 -04:00
Chunming Zhou
d03846af92 drm/amd: Add CGS interfaces
CGS (Common Graphics Services) is an AMD cross component
abstraction layer to designed to better encapsulate
specific IP block drivers so different teams can effectively
work on differnet IP block drivers independently. It provides
a common interface for things like accessing registers,
allocating GPU memory, and registering interrupt sources.
The plan is to eventually move more and more IP drivers to
this interface.  The first user is the ACP IP driver.

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:49:52 -04:00
Dan Carpenter
2902bc66fa net: ethernet: micrel: fix an error code
The dma_mapping_error() function returns true or false.  We should
return -ENOMEM if it there is a dma mapping error.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-17 12:23:22 -07:00
Guillaume Nault
8cb775bc0a ppp: fix device unregistration upon netns deletion
PPP devices may get automatically unregistered when their network
namespace is getting removed. This happens if the ppp control plane
daemon (e.g. pppd) exits while it is the last user of this namespace.

This leads to several races:

  * ppp_exit_net() may destroy the per namespace idr (pn->units_idr)
    before all file descriptors were released. Successive ppp_release()
    calls may then cleanup PPP devices with ppp_shutdown_interface() and
    try to use the already destroyed idr.

  * Automatic device unregistration may also happen before the
    ppp_release() call for that device gets executed. Once called on
    the file owning the device, ppp_release() will then clean it up and
    try to unregister it a second time.

To fix these issues, operations defined in ppp_shutdown_interface() are
moved to the PPP device's ndo_uninit() callback. This allows PPP
devices to be properly cleaned up by unregister_netdev() and friends.
So checking for ppp->owner is now an accurate test to decide if a PPP
device should be unregistered.

Setting ppp->owner is done in ppp_create_interface(), before device
registration, in order to avoid unprotected modification of this field.

Finally, ppp_exit_net() now starts by unregistering all remaining PPP
devices to ensure that none will get unregistered after the call to
idr_destroy().

Signed-off-by: Guillaume Nault <g.nault@alphalink.fr>
Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-17 12:22:20 -07:00
Shaohui Xie
11e122cbe9 net: phy: fix PHY_RUNNING in phy_state_machine
Currently, if phy state is PHY_RUNNING, we always register a CHANGE
when phy works in polling or interrupt ignored, this will make the
adjust_link being called even the phy link did Not changed.

checking the phy link to make sure the link did changed before we
register a CHANGE, if link did not changed, we do nothing.

Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-17 12:18:09 -07:00
Calvin Owens
5d37852bf7 Revert "net: limit tcp/udp rmem/wmem to SOCK_{RCV,SND}BUF_MIN"
Commit 8133534c76 ("net: limit tcp/udp rmem/wmem to
SOCK_{RCV,SND}BUF_MIN") modified four sysctls to enforce that the values
written to them are not less than SOCK_MIN_{RCV,SND}BUF.

That change causes 4096 to no longer be accepted as a valid value for
'min' in tcp_wmem and udp_wmem_min. 4096 has been the default for both
of those sysctls for a long time, and unfortunately seems to be an
extremely popular setting. This change breaks a large number of sysctl
configurations at Facebook.

That commit referred to b1cb59cf2e ("net: sysctl_net_core: check
SNDBUF and RCVBUF for min length"), which choose to use the SOCK_MIN
constants as the lower limits to avoid nasty bugs. But AFAICS, a limit
of SOCK_MIN_SNDBUF isn't necessary to do that: the BUG_ON cited in the
commit message seems to have happened because unix_stream_sendmsg()
expects a minimum of a full page (ie SK_MEM_QUANTUM) and the math broke,
not because it had less than SOCK_MIN_SNDBUF allocated.

This particular issue doesn't seem to affect TCP however: using a
setting of "1 1 1" for tcp_{r,w}mem works, although it's obviously
suboptimal. SK_MEM_QUANTUM would be a nice minimum, but it's 64K on
some archs, so there would still be breakage.

Since a value of one doesn't seem to cause any problems, we can drop the
minimum 8133534c added to fix this.

This reverts commit 8133534c76.

Fixes: 8133534c76 ("net: limit tcp/udp rmem/wmem to SOCK_MIN...")
Cc: Eric Dumazet <eric.dumazet@gmail.com>
Cc: Sorin Dumitru <sorin@returnze.ro>
Signed-off-by: Calvin Owens <calvinowens@fb.com>
Acked-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2015-08-17 12:10:30 -07:00
Robert Baldyga
05aa1a77dc dmaengine: fix balance of privatecnt inc/dec operations
This patch increments privatecnt value and set DMA_PRIVATE in device
caps in dma_request_slave_channel() function. This is needed to keep
privatecnt increment/decrement balance.

As function dma_release_channel() decrements privatecnt counter, we need
to increment it when channel is requested. Otherwise privatecnt drops
into negatives after few dma_release_channel() calls.

Reported-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Robert Baldyga <r.baldyga@samsung.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-08-17 22:47:43 +05:30
Linus Torvalds
a36304b9e1 Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto fixes from Herbert Xu:
 "This fixes the following issues:

   - a regression caused by the conversion of IPsec ESP to the new AEAD
     interface: ESN with authencesn no longer works because it relied on
     the AD input SG list having a specific layout which is no longer
     the case.  In linux-next authencesn is fixed properly and no longer
     assumes anything about the SG list format.  While for this release
     a minimal fix is applied to authencesn so that it works with the
     new linear layout.

   - fix memory corruption caused by bogus index in the caam hash code.

   - fix powerpc nx SHA hashing which could cause module load failures
     if module signature verification is enabled"

* git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
  crypto: caam - fix memory corruption in ahash_final_ctx
  crypto: nx - respect sg limit bounds when building sg lists for SHA
  crypto: authencesn - Fix breakage with new ESP code
2015-08-17 07:57:46 -07:00
Jammy Zhou
21df89a566 drm/amdgpu: fix one warning message
In function 'amdgpu_uvd_cs_pass2':
warning: 'min_ctx_size' may be used uninitialized in this function
  buf_sizes[0x4] = min_ctx_size;
                 ^
note: 'min_ctx_size' was declared here
  unsigned image_size, tmp, min_dpb_size, num_dpb_buffer, min_ctx_size;
                                                          ^
Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
2015-08-17 09:50:18 -04:00
Alex Deucher
d046520820 drm/radeon/dce6: assign different audio pins to each encoder
This allows you to send different audio to each audio capable
display.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 09:43:37 -04:00
Chris Wilson
903ecd0bb9 drm/i915: Flag the execlists context object as dirty after every use
Everytime we use the logical context with execlists it becomes dirty (as
the hardware will write the new register values afterwards, as well as
the GPU state that will be used). We need to then flag the context as
dirty everytime since after a swap-out/swap-in cycle the dirty flag will
be cleared, and a further swap-out cycle will then loose the most recent
GPU state.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@vger.kernel.org
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2015-08-17 10:12:09 +03:00
Dave Airlie
294947a5c7 Merge branch 'vmwgfx-next' of git://people.freedesktop.org/~thomash/linux into drm-next
A couple of fixes from the previous pull request as well as gl3 support.
There is one drm core change, an export of a previously private function.

Take 2 implementing screen targets, this time with the fbdev code adjusted
accordingly.

Also there is an implementation of register-driven command buffers, that
overrides the FIFO ring for command processing. It's needed for our upcoming
hardware revision.
* 'vmwgfx-next' of git://people.freedesktop.org/~thomash/linux: (35 commits)
  drm/vmwgfx: Fix copyright headers
  drm/vmwgfx: Add DX query support. Various fixes.
  drm/vmwgfx: Add command parser support for a couple of DX commands
  drm/vmwgfx: Command parser fixes for DX
  drm/vmwgfx: Initial DX support
  drm/vmwgfx: Update device includes for DX device functionality
  drm: export the DRM permission check code
  drm/vmwgfx: Fix crash when unloading vmwgfx v2
  drm/vmwgfx: Fix framebuffer creation on older hardware
  drm/vmwgfx: Fixed topology boundary checking for Screen Targets
  drm/vmwgfx: Fix an uninitialized value
  drm/vmwgfx: Fix compiler warning with 32-bit dma_addr_t
  drm/vmwgfx: Kill a bunch of sparse warnings
  drm/vmwgfx: Fix kms preferred mode sorting
  drm/vmwgfx: Reinstate the legacy display system dirty callback
  drm/vmwgfx: Implement fbdev on kms v2
  drm/vmwgfx: Add a kernel interface to create a framebuffer v2
  drm/vmwgfx: Avoid cmdbuf alloc sleeping if !TASK_RUNNING
  drm/vmwgfx: Convert screen targets to new helpers v3
  drm/vmwgfx: Convert screen objects to the new helpers
  ...
2015-08-17 16:03:48 +10:00