Remove voting on PLL regualtor for modem pil since it is not
required for MSMCOBALT. We already vote on XO.
CRs-Fixed: 1025447
Change-Id: I9f478194a1a6147a8312e232c6ca3fd1eeb01682
Signed-off-by: Puja Gupta <pujag@codeaurora.org>
Since 'qcom,vdd_pll' is optional property, change the flow so that pil
doesn't return if it is not present.
CRs-Fixed: 1025447
Change-Id: I530bbeb89f769afb188f28bcdc0230d32feed3dd
Signed-off-by: Puja Gupta <pujag@codeaurora.org>
Update msm gpio 89 pin control settings to pull down
in suspend to save power.
Change-Id: Ibd46ae4d6bebd40637a78a551984b4c16a693d79
Signed-off-by: Mohan Pallaka <mpallaka@codeaurora.org>
When WIPHY_FLAG_DFS_OFFLOAD is defined, driver would take care the
DFS related operation, hence the Kernel needs to ignore the DFS
states checking.
CRs-fixed:1032889
Change-Id: I02fa5e3e25427c0ca474455fa2d2be9eb6ea4bd9
Signed-off-by: Ryan Hsu <ryanhsu@codeaurora.org>
Add a panic handler to dump the OS performance state,
program counter OSM watchdog registers, and the APM status
register when the device crashes due to a kernel panic.
These are critical registers that are useful for debug.
CRs-Fixed: 1033031
Change-Id: I2bbf6884cf83457bfb7e5369bb97614bd4beb150
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Consider only those memory blocks with lowmem while
remapping into 4KB regions using CONFIG_FORCE_PAGES
feature.
Change-Id: Ie209fce6c310f911d8cf02d977e226660684a6ab
Signed-off-by: Shiraz Hashim <shashim@codeaurora.org>
CONFIG_FORCE_PAGES introduces a debug option to mark free
pages as read only in order to trigger a fault if any code
attempts to write to a page on the buddy list.
In order to achieve this it splits all section mappings in
to PAGE_SIZE pages during boot. While doing this split, it
wrongly allocates a pte (of page size) for each pmd. Linux
however in armv7 short descriptor format, uses same second
level pte for 2 consecutive pmds offset by the actual second
level table size. Refer comments in kernel file
arch/arm/include/asm/pgtable-2level.h for details.
Fix this by allocating pte for a section mapped pmd while
providing required offset if pte already exists.
Change-Id: Iadbaa5e71e4b220208a7275bf039a2a413349e42
Signed-off-by: Shiraz Hashim <shashim@codeaurora.org>
Add menu choice options for reclaiming virtual
memory belonging to any subsystem expected to have
a lifetime of the entire system. By default virtual
memory is not reclaimed.
Change-Id: I1b8a1492062bb9532700122878618989e5148647
Signed-off-by: Neeti Desai <neetid@codeaurora.org>
Signed-off-by: Susheel Khiani <skhiani@codeaurora.org>
Lowmem is currently mapped with sections (1MB/2MB) whenever
possible due to TLB performance boosts. Sections cannot easily
be changed at runtime however which makes implementing certain
features annoying. Add an option to map lowmem with 4K patches.
This is intended to be used as a debugging feature and should
NOT be used for performance testing.
Change-Id: I9612a99b8e05a022f5ba7e568f21307cf66b5667
Signed-off-by: Laura Abbott <lauraa@codeaurora.org>
Signed-off-by: Susheel Khiani <skhiani@codeaurora.org>
This change adds support to route On-Device logging and
USB logging traffic per peripheral. A peripherals'
traffic can go to either endpoint but not both. The
mux layer has a peripheral state and the mode switching
logic has multi mode support.
CRs-Fixed: 1004236
Change-Id: I54fef744bdf08a346e4aef22c1280e928cdaf5d2
Signed-off-by: Chris Lew <clew@codeaurora.org>
The test results indicate that larger transfers improve write speeds.
The Rx request transfer length is now 16K bytes. Increase the Rx
transfer length from 16K to 1MB to get good throughputs.
Change-Id: I3c64e6b96d569b4dc61805a53a0835db9142d55e
Signed-off-by: ChandanaKishori Chiluveru <cchilu@codeaurora.org>
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
This DT bindings documentation snapshot is taken as of msm-3.18
'commit 00df358f2e6a8 ("regulator: rpm-smd-regulator: introduce BoB
regulator type")'.
CRs-Fixed: 1023326
Change-Id: Icc20967019996616a4eb2ebba6df47e7bc7188d7
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
Fix issues with multi-rect to allow the multi-rects on the same
z-order. In multi-rect use cases the rect 0 of the pipes have higher
priority than rect 1. The change checks the priority of rect on the
right mixer with the priority of rect on the pipe staged on left mixer.
CRs-Fixed: 1023723
Change-Id: Ifd1df8ee04238db0338a7dd70eb5097af2d0eb62
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Enable sde v4l2 rotator node on 8996.
This replaces mdss rotator node.
Reserve dma 0/1, writeback mixers, writeback 0/1, and control 5
for rotator driver.
Disable WFD as it shares context bank with rotator.
CRs-Fixed: 1030443
Change-Id: Ie3970f29c7f1800c4457dc71a3f36a54e1cbdb91
Signed-off-by: Alan Kwong <akwong@codeaurora.org>
Bypass vbif dump for ununsed vbif by checking for
null pointer dereference of io base.
Change-Id: Ic7204921fc82d5aea31c58fcbb668b296794b1c1
CRs-Fixed: 1030443
Signed-off-by: Alan Kwong <akwong@codeaurora.org>
Validate input data length to ensure only relevant data
is copied.
CRs-Fixed: 1027585
Change-Id: I67eb4f162f944bbf4d9e55fb8fe93759e6b8ff91
Signed-off-by: Ashish Jain <ashishj@codeaurora.org>
Commit d0164adc89 ("mm, page_alloc: distinguish between being unable to
sleep, unwilling to sleep and avoiding waking kswapd") modified __GFP_WAIT
to explicitly identify the difference between atomic callers and those
that were unwilling to sleep. Later the definition was removed entirely.
The GFP_RECLAIM_MASK is the set of flags that affect watermark checking
and reclaim behaviour but __GFP_ATOMIC was never added. Without it, atomic
users of the slab allocator strip the __GFP_ATOMIC flag and cannot access
the page allocator atomic reserves. This patch addresses the problem.
The user-visible impact depends on the workload but potentially atomic
allocations unnecessarily fail without this path.
Change-Id: Ieac0932d146f7fd992db9fd834b0e9aa3822f891
Link: http://lkml.kernel.org/r/20160610093832.GK2527@techsingularity.net
Signed-off-by: Mel Gorman <mgorman@techsingularity.net>
Reported-by: Marcin Wojtas <mw@semihalf.com>
Acked-by: Vlastimil Babka <vbabka@suse.cz>
Acked-by: Michal Hocko <mhocko@suse.com>
Cc: <stable@vger.kernel.org> [4.4+]
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Git-Commit: 843f65ccbb2273430b57ae135ccd26dddee05be7
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
Signed-off-by: Vinayak Menon <vinmenon@codeaurora.org>
This change adds support to allow user space query if low level UFS driver
has encountered any error or not, this state can be read/cleared via
debugfs.
Change-Id: I867a4621315108aff17be852cfaadcfa945566a7
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Specify the panic register configuration in the VDD_APC0
and VDD_APC1 CPR device nodes. This enables the CPR panic
handler to dump the values of the specified registers during
a kernel panic.
CRs-Fixed: 1033060
Change-Id: Ifdd03f27ed1135acd4470d891e1b5aca4a11dd65
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Call cpr3_panic_notifier_init() when cpr3_parse_common_ctrl_data()
is called for CPRh controllers. This allows dumping registers during
a kernel panic when CPRh controller devices specify panic register
configuration.
CRs-Fixed: 1033060
Change-Id: I437fe28725d5c1ed06fe8b9735b04bbd84e92db1
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Add panic handler to dump a few critical CPR registers when device
crashes due to kernel panic errors.
CRs-Fixed: 1004533
Change-Id: Id01b4f959c134af48c509ade61c7ec46401b4e70
Signed-off-by: Tirupathi Reddy <tirupath@codeaurora.org>
SMEM_SMEM_STATIC_LOG_EVENTS is currently unused as its usecase has
been deprecated for a long time. Reallocate the ID to
SMEM_CHARGER_BATTERY_INFO.
CRs-Fixed: 1032131
Change-Id: I35a8307001ac14e3ade733d5f41d6231fe63ebd0
Signed-off-by: Dhoat Harpal <hdhoat@codeaurora.org>
The GMEM GX clamp should be set to the active state before
turning off the gdsc_gpu_gx.
CRs-Fixed: 1027772
Change-Id: I5bb97734a2402e763836250c3ce6f7fc308c20a6
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Add support to enable/disable the alpha pll using hwfsm
Also add support for initial configuration (needs to be split)
Change-Id: Ifc2fe0539b943e850681143da76da27274203ed2
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Add support for configuring rates of, enabling, and disabling
Alpha PLLs. This is sufficient for the types of PLLs found in
the global and multimedia clock controllers.
Change-Id: I0d26e8f6d225cc3669f3a9e3c37b45e49e139879
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Add all RPM clock data for msm8996 family of devices
ToDo: Adapt to changes needed for RPM over GLINK against
RPM over SMD that the driver currently supports
Change-Id: Ib095af601a4f03d866cf94c8e277d04630abb42b
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
This adds initial support for clocks controlled by the Resource
Power Manager (RPM) processor on some Qualcomm SoCs, which use
the qcom_rpm driver to communicate with RPM.
Such platforms are apq8064 and msm8960.
Change-Id: I1a73355bc9117c34589a25cf58446cad13ceb6e3
(cherry picked from commit 06d998a24c68be94685af38e8becfda3c8bf757b)
Git-commit: 06d998a24c68be94685af38e8becfda3c8bf757b
Git-repo: https://git.linaro.org/landing-teams/working/qualcomm/kernel.git
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
This adds initial support for clocks controlled by the Resource
Power Manager (RPM) processor on some Qualcomm SoCs, which use
the qcom_smd_rpm driver to communicate with RPM.
Such platforms are msm8916, apq8084 and msm8974.
The RPM is a dedicated hardware engine for managing the shared
SoC resources in order to keep the lowest power profile. It
communicates with other hardware subsystems via shared memory
and accepts clock requests, aggregates the requests and turns
the clocks on/off or scales them on demand.
This driver is based on the codeaurora.org driver:
https://www.codeaurora.org/cgit/quic/la/kernel/msm-3.10/tree/drivers/clk/qcom/clock-rpm.c
Change-Id: I8d2882de9410a992a8045caedc7ab71e3c3e45b2
(cherry picked from commit 69edeaf51c07c24e06b433762b3ada7b3d786315)
Git-commit: 69edeaf51c07c24e06b433762b3ada7b3d786315
Git-repo: https://git.linaro.org/landing-teams/working/qualcomm/kernel.git
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Add a driver for the A53 subsystem PLL, so that we can provide higher
frequency clocks for use by the system.
Change-Id: I69b4c363c8b656bcd9481b6310a972b8140311a9
(cherry picked from commit 60e4f862c16dfc995a71ec0f50524e020dbfde2f)
Git-commit: 60e4f862c16dfc995a71ec0f50524e020dbfde2f
Git-repo: https://git.linaro.org/landing-teams/working/qualcomm/kernel.git
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
The Krait CPU clocks are made up of a primary mux and secondary
mux for each CPU and the L2, controlled via cp15 accessors. For
Kraits within KPSSv1 each secondary mux accepts a different aux
source, but on KPSSv2 each secondary mux accepts the same aux
source.
Change-Id: I871de8d291f5c1b848b215766c61b8bd0ed98f77
Cc: <devicetree@vger.kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
TZ hdcp2p2 app interface has changed to include device,
session commands and version control. Update hdcp driver
to align.
CRs-Fixed: 1027108
Change-Id: I4acdad2f243ea32f6ce10b6c0064ef2a5262fab2
Signed-off-by: Shivaprasad Hongal <shongal@codeaurora.org>
Update using the default value of 1024 for decimation ratio
on VADC channels for msmcobalt. A smaller value may reduce
the time it takes for measurement but may include noise.
Change-Id: Id8952c4565dd95b154165c9f8e307e74bdbd443e
Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org>
Fix edge ctrl mask interface for DSB subunit to accept DSB event ranges
in both hexadecimal and decimal format.
Change-Id: Ibe650067fc30a65defa2c0e76ef5526235980f72
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
Add APSS CTIs on msmcobalt. These devices can be used to configure CTIs
for LMH and OLC blocks.
Change-Id: I76de8cd4c1d26015b26524e445d6a5ba00ce2a43
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
On an ARM64 arch this register is used by ETR to find correct location
of buffer in memory.
Change-Id: Ie0aa7932e46f63969ba85cb0dc4855b3b267f2d6
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
Add stricky enable flag to avoid reading TMC buffer before enabling TMC
at least once.
Change-Id: Iccb6338ef4fce25830f27541f5f22cfcad7264ae
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
'read_count' is used to reference count simultaneous TMC read requests.
This count should reset to zero in case tmc_read_preapare fails.
Change-Id: Iaded781ee76ec3b079ac9cd9d551bdfb42834fd9
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
The aggre NoC clocks are controlled by RPM and until now,
HLOS has only had to enable/disable the resource when
required. Due to a new requirement, enable support to
scale these resources as well.
Change-Id: I3b141d62f6c3b479d8d61ae7829e9f5ca72a3886
CRs-Fixed: 1030966
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
Timeout error is observed while waiting for
ADM_CMD_SET_PP_PARAMS_V5 command's response.
Fix the condition logic in wait_event_timeout()
to match the value set in adm_callback() when
response to ADM_CMD_SET_PP_PARAMS_V5 is received.
CRs-Fixed: 1030674
Change-Id: I711c860dc3de479eec0d22369d19615aef572ea1
Signed-off-by: Karthik Reddy Katta <a_katta@codeaurora.org>
On some devices TMC registers are not preserved across reset. Add
support to save TMC registers to read TMC buffer after a crash.
Change-Id: I5fb7e870ddece35159d1fe465d4b70d2a4c1ec35
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
Set the stream open flag immediately after the
stream is opened to ensure correct closure of
the stream if there is an error condition.
Change-Id: I61faf6ddf99ab504e492a4e37d577b67acf99f09
Signed-off-by: Ben Romberger <bromberg@codeaurora.org>
Enable use of noirq (i.e pull mode and push mode)
playback and capture.
CRs-Fixed: 992798
Change-Id: I98e68c2a485783be3c2b3eaa62577759d7e21d82
Signed-off-by: Haynes Mathew George <hgeorge@codeaurora.org>
Add capture support to MultiMedia3 frontend.
CRs-Fixed: 992798
Change-Id: Ie21a1c4a73c354a6dc1e733e6d2ac653f85f7647
Signed-off-by: Haynes Mathew George <hgeorge@codeaurora.org>
This patch adds stuff about new reclaim field in proc.txt
Change-Id: I1718fad12ec078e204e7a59769ce70fad7708756
Acked-by: Rob Landley <rob@landley.net>
Signed-off-by: Minchan Kim <minchan@kernel.org>
Patch-mainline: linux-mm @ 9 May 2013 16:21:29
[vinmenon@codeaurora.org: trivial merge conflict fixes]
Signed-off-by: Vinayak Menon <vinmenon@codeaurora.org>
Add new pcm device node to use in the ultra low latency
path in noirq mode.
Change-Id: I8a7bd938fc8eeeec5cd943e7445784559f13e05e
CRs-Fixed: 992798
Signed-off-by: Haynes Mathew George <hgeorge@codeaurora.org>
Implement platform drivers to support shared memory based
pcm playback and capture.
Change-Id: I882c67ae1c3d950b98bd002ac384cc3a7e77874a
CRs-Fixed: 992798
Signed-off-by: Haynes Mathew George <hgeorge@codeaurora.org>
Since a CPU may go offline after cpu_active_mask is used
to query active CPUs, set_cpus_allowed_ptr might inadverntently
pass an invalid cpu number to move_queued_task.
Fix this by ensuring that the cpumask op that uses cpu_active_mask
checks the return value.
CRs-Fixed: 1029014
Change-Id: Id43a629b40b72cc47773e4027d30953b3a94058d
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
