In SDM660 WSA speaker using MSM over soundwire version,
observe high cold start latency. As interrupt is disabled,
broadcast ack is not received which results in 200ms higher
latency. Reduce latency impact by blocking only for 10ms
for MSM over soundwire version.
Change-Id: Ic0e659d7c443c1462aba4da2f8bf9471031d02d2
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
Enable digital clock bits before digital codec reset.
Also update HD2 settings as per latest HW sequences.
CRs-Fixed: 2018603
Change-Id: I270a324ffebc8b84ef23ff6b209efcde724f9b37
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
With the recent changes in upstream, certain parameters
are updated in the core random number generator driver.
So update HW rng driver to provide the quality estimation
of true entropy in RNG's bitstream. Value 700 corresponds
to 70% an arbitrary value, which is taken from 3.10.
Change-Id: I0d27e44a05473bcbc84af82c79565f87329b9ae7
Signed-off-by: AnilKumar Chimata <anilc@codeaurora.org>
Observe random mute on speaker during device switch on
secondary images. Avoid reading previous register
read when SWR slave read and overwrite of previous register
when SWR slave write, by adjusting delays in respective APIs.
Change-Id: I302968ad8e774598c8414e05ba669f90bf39b82c
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
Observe compander for one speaker is not working.
Update offset in config compander API to set compander registers
as expected.
CRs-Fixed: 2019754
Change-Id: Ib75e01016e6a9fd39a953da40f36babc3beaec13
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
Without re-init timeout completion of btn_press object
waiting in correct_plug_swch work, if mbhc_deinit and mbhc_start
happens again, it results in crash. In mbhc_deinit,
cancel correct_plug_swch work to handle this.
CRs-Fixed: 2018976
Change-Id: Ic26edea18f5a8554f4dff3bf6ad49ec039493a64
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
Register offset for LPI_GPIO_16/17 should be 0x5040/0x5050.
Correct the offset to make sure LPI_GPIO_16/17 work.
CRs-Fixed: 2019608
Change-Id: Iac0bc2b434b23094c297e69eabea4d72bfd1eb8b
Signed-off-by: Meng Wang <mwang@codeaurora.org>
Pinctrl info is set to ap mclk for all the client. Remove
the wrong assignment.
Change-Id: I95fb16367157fa0cb47a1a25290eadb4472abb51
CRs-Fixed: 2015665
Signed-off-by: Meng Wang <mwang@codeaurora.org>
LPI GPIO 18 is used as a clock for native playback for wcd9335
on SDM660. Correct it as lpass mclk, not ap clk.
CRs-Fixed: 2015665
Change-Id: I1fa5f2dc314a73d139aacbb9689e9a161b9a54ef
Signed-off-by: Meng Wang <mwang@codeaurora.org>
Currently, the buffers used for transfers are allocated each time
the transfer is requested. This causes memory allocation failure
for higher order allocations possibly due to fragmentation or no
higher order blocks being available. Fix this by allocating the
buffers during the component bind and re-use the buffers across
transfers.
CRs-fixed: 2014478
Change-Id: I48212678e39d089fbb903d195faf45436f358f4b
Signed-off-by: Bhalchandra Gajare <gajare@codeaurora.org>
Restart mechanical detection as part of SSR device_up
functionality to receive headset events after SSR.
CRs-Fixed: 2015351
Change-Id: I359c701b8c7c086c087ab5fa7714b6bd3f7c4708
Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
Add the pinctrl clock for ln_bb_clk to the GCC driver
for MSM8996.
CRs-Fixed: 1063062
Change-Id: If85a0dbb26e350588cbd6614c032bf208a205be2
Signed-off-by: Devesh Jhunjhunwala <deveshj@codeaurora.org>
Add support for additional frequencies for the qspi_ser_clk_src
on msm8996.
Change-Id: I4efa0ad4dc3f68a0c54bd4cf7ee77b4c78be4be1
CRs-Fixed: 994014
Signed-off-by: Deepak Katragadda <dkatraga@codeaurora.org>
In some of the cases when UART submits sps transfer request, BAM finishes
transfer quickly. This results into deletion of Tx timeout timer from an
ISR context whereas in actual timer is not yet started. In such cases
del_timer and mod_timer are meeting to a race where mod_timer finds a
NULL handle due to deletion by del_timer.
Change the timer call sequence to submit the timer first and then do a
BAM transfer.
Change-Id: I1d75a43d928776eb24752fd97d0ef31e0d5b6a51
Signed-off-by: Mukesh Kumar Savaliya <msavaliy@codeaurora.org>
On SDM660, there is a HW bug that could lead to chip damage if
the 3.1V rail (normally provided by PM660 LDO7B) is turned on
while the 1.8V (LDO10A) rail is off. A simple workaround is to
ensure that LDO10A is turned on prior to LDO7B. Achieve this by
making pm660_l10 the parent-supply of the pm6601_l7 regulator.
Change-Id: I748d2b8526066e746002ad007789c10422c12c68
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
Initialize external backlight level to -1 when fb probe.
This is to make sure the external backlight level is
invalid the first time overlay kickoff.
CRs-Fixed: 2021142
Change-Id: I973b184903cdb5b378326b23ca5c958e4b868c76
Signed-off-by: Xu Yang <yangxu@codeaurora.org>
Unknown WMI events are being printed with log level warning.
Change the log level for the unknown wmi event print to debug.
CRs-Fixed: 2019156
Change-Id: Ice39487c698462d6c845dab2ede93f5c856364c0
Signed-off-by: Rakesh Pillai <pillair@codeaurora.org>
core_ctl is needed for SDM660 but not for SDM630. Both targets
share the same defconfig. So it can not be compiled out. Use
core_ctl_disable_cpumask kernel parameter to disable core_ctl
for SDM630.
Change-Id: I35883ac6c03d13268d351fdc707a54cec8569ed3
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
core_ctl can be completely disabled from a kernel parameter now.
Add a check to bail out early from the boost API.
Change-Id: Ib825500b0cb2c06af2cfcb82e5d79f91e9dd7b3b
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
Add a kernel parameter called "core_ctl_disable_cpumask" to
specify the CPUs for which core_ctl is not needed. As
core_ctl operates on a cluster basis, all of the CPUs in a
given cluster must be specified to disable core_ctl on that
cluster.
Change-Id: Idfdc5b3aa9f54bafe20489e5ded9d96da6eff21c
Signed-off-by: Pavankumar Kondeti <pkondeti@codeaurora.org>
In the cases that have FPC cable between main board and sub-board, USB
connector located on sub-board, add re-drive chipset on sub-board to
make sure the signal of rx/tx for super-speed is good enough.
Change-Id: I4a778b0eb6ba43a35a88425f2279041ba038da95
Signed-off-by: Liangliang Lu <luliang@codeaurora.org>
There is a leakage path in the TADC block while the device is shutdown
or is in deep sleep mode. To fix this hw problem, the driver needs to
disable hw conversions and enable direct test mode while charger is
plugged out, kernel goes to suspend or device shuts down. The driver
needs to undo those changes when charger is plugged in, kernel resumes
or device powers up.
Moreover while disabling hw conversions it is advisable to wait until
the current conversion is complete.
To realize this
* create a tadc_disable_votable, where the three usecases viz. charger
presence, suspend/resume and shutdown will vote. Enabling it will
disable hw conversions and enable direct test mode and vice versa for
disabling case.
* update complete to complete all since the disable path may be waiting
for conversion to complete.
* create a power supply notifier hook to get the usb presence/absence
notifications.
* add suspend,resume and shutdown driver callbacks that vote for
enabling/disabling tadc.
* prevent more requests coming in when the tadc is disabled.
* skip printing an error reading a channel for requests coming after
tadc is disabled. Return -ENODATA error for these situations.
* since we are introducing a secure write well beyond 0x3652, update the
code to treat everything beyond 0x3652 as locked.
CRs-Fixed: 2021456
Change-Id: Ifa92764d11f0b717558f3b7169313f5bcb1f507e
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
