Commit graph

6907 commits

Author SHA1 Message Date
Zhou Wang
500a1d9a43 PCI: hisi: Add HiSilicon SoC Hip05 PCIe driver
Add PCIe host support for HiSilicon SoC Hip05, related DT binding
documentation, and maintainer update.

[bhelgaas: changelog, 32-bit only config write warning text]
Signed-off-by: Zhou Wang <wangzhou1@hisilicon.com>
Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
Signed-off-by: liudongdong <liudongdong3@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rob Herring <robh@kernel.org> (DT binding)
2015-11-02 15:39:24 -06:00
Minghuan Lian
5192ec7b24 PCI: layerscape: Add support for LS1043a and LS2080a
Both LS1043a and LS2080a are based on ARMv8 64-bit architecture and have
similar PCIe implementation.  LUT is added to controller.

Add LS1043a and LS2080a support.

[bhelgaas: move unused field removal into separate patch, include DT update]
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> (DT update)
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Arnd Bergmann <arnd@arndb.de> (DT update)
2015-11-02 15:38:39 -06:00
Linus Torvalds
e86328c489 This is the bulk of GPIO changes for v4.4:
GPIO core:
 - Define and handle flags for open drain/open collector
   and open source/open emitter, also know as "single-ended"
   configurations.
 - Generic request/free operations that handle calling out
   to the (optional) pin control backend.
 - Some refactoring related to an ABI change that did not
   happen, yet provide useful.
 - Added a real-time compliance checklist. Many GPIO chips
   have irqchips, and need to think this over with the RT
   patches going upstream.
 - Restructure, fix and clean up Kconfig menus a bit.
 
 New drivers:
 - New driver for AMD Promony.
 - New driver for ACCES 104-IDIO-16, a port-mapped I/O
   card, ISA-style. Very retro.
 
 Subdriver changes:
 - OMAP changes to handle real time requirements.
 - Handle trigger types for edge and level IRQs on PL061
   properly. As this hardware is very common it needs to
   set a proper example for others to follow.
 - Some container_of() cleanups.
 - Delete the unused MSM driver in favor of the driver that
   is embedded inside the pin control driver.
 - Cleanup of the ath79 GPIO driver used by many, many
   OpenWRT router targets.
 - A consolidated IT87xx driver replacing the earlier
   very specific IT8761e driver.
 - Handle the TI TCA9539 in the PCA953x driver. Also
   handle ACPI devices in this subdriver.
 - Drop xilinx arch dependencies as these FPGAs seem to
   profilate over a few different architectures. MIPS and
   ARM come to mind.
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Merge tag 'gpio-v4.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio

Pull GPIO updates from Linus Walleij:
 "Here is the bulk of GPIO changes for the v4.4 development cycle.

  The only changes hitting outside drivers/gpio are in the pin control
  subsystem and these seem to have settled nicely in linux-next.

  Development mistakes and catfights are nicely documented in the
  reverts as you can see.  The outcome of the ABI fight is that we're
  working on a chardev ABI for GPIO now, where hope to show results for
  the v4.5 kernel.

  Summary of changes:

  GPIO core:
   - Define and handle flags for open drain/open collector and open
     source/open emitter, also know as "single-ended" configurations.
   - Generic request/free operations that handle calling out to the
     (optional) pin control backend.
   - Some refactoring related to an ABI change that did not happen, yet
     provide useful.
   - Added a real-time compliance checklist.  Many GPIO chips have
     irqchips, and need to think this over with the RT patches going
     upstream.
   - Restructure, fix and clean up Kconfig menus a bit.

  New drivers:
   - New driver for AMD Promony.
   - New driver for ACCES 104-IDIO-16, a port-mapped I/O card,
     ISA-style.  Very retro.

  Subdriver changes:
   - OMAP changes to handle real time requirements.
   - Handle trigger types for edge and level IRQs on PL061 properly.  As
     this hardware is very common it needs to set a proper example for
     others to follow.
   - Some container_of() cleanups.
   - Delete the unused MSM driver in favor of the driver that is
     embedded inside the pin control driver.
   - Cleanup of the ath79 GPIO driver used by many, many OpenWRT router
     targets.
   - A consolidated IT87xx driver replacing the earlier very specific
     IT8761e driver.
   - Handle the TI TCA9539 in the PCA953x driver.  Also handle ACPI
     devices in this subdriver.
   - Drop xilinx arch dependencies as these FPGAs seem to profilate over
     a few different architectures.  MIPS and ARM come to mind"

* tag 'gpio-v4.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (57 commits)
  gpio: fix up SPI submenu
  gpio: drop surplus I2C dependencies
  gpio: drop surplus X86 dependencies
  gpio: dt-bindings: document the official use of "ngpios"
  gpio: MAINTAINERS: Add an entry for the ATH79 GPIO driver
  gpio / ACPI: Allow shared GPIO event to be read via operation region
  gpio: group port-mapped I/O drivers in a menu
  gpio: Add ACCES 104-IDIO-16 driver maintainer entry
  gpio: zynq: Document interrupt-controller DT binding
  gpio: xilinx: Drop architecture dependencies
  gpio: generic: Revert to old error handling in bgpio_map
  gpio: add a real time compliance notes
  Revert "gpio: add a real time compliance checklist"
  gpio: Add GPIO support for the ACCES 104-IDIO-16
  gpio: driver for AMD Promontory
  gpio: xlp: Convert to use gpiolib irqchip helpers
  gpio: add a real time compliance checklist
  gpio/xilinx: enable for MIPS
  gpiolib: Add and use OF_GPIO_SINGLE_ENDED flag
  gpiolib: Split GPIO flags parsing and GPIO configuration
  ...
2015-11-02 12:59:12 -08:00
Bhupesh Sharma
df7701621b PCI: designware: Make "clocks" and "clock-names" optional DT properties
Move the clock-related properties in the DesignWare PCIe controller
bindings to 'optional' set of properties.

[bhelgaas: move to separate patch]
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2015-11-02 14:49:18 -06:00
Gabriele Paoloni
907fce0902 PCI: designware: Make "num-lanes" an optional DT property
Currently "num-lanes" is read in dw_pcie_host_init(), but it is only used
if we call dw_pcie_setup_rc() while bringing up the link.  If the link has
already been brought up by firmware, we need not call dw_pcie_setup_rc(),
and "num-lanes" is unnecessary.

Only complain about "num-lanes" if we actually need it and we didn't find a
valid value.

[bhelgaas: changelog]
Signed-off-by: Gabriele Paoloni <gabriele.paoloni@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2015-11-02 14:48:45 -06:00
Linus Torvalds
bc9d8c20ff This is the big bulk of pin control changes for the
v4.4 kernel development cycle:
 
 Infrastructure:
 - Doug Anderson wrote a patch adding an "init" state
   different from the "default" state for pin control
   state handling in the core framework. This is applied
   before the driver's probe() call if defined and takes
   precedence over "default". If both are defined, "init"
   will be applied *before* probe() and "default" will be
   applied *after* probe().
 
 Significant subdriver improvements:
 - SH PFC is switched to getting GPIO ranges from the
   device tree ranges property on DT platforms.
 - Got rid of CONFIG_ARCH_SHMOBILE_LEGACY, we are all
   modernized.
 - Got rid of SH PFC hardcoded IRQ numbers.
 - Allwinner sunxi external interrupt through the "r"
   controller.
 - Moved the Cygnus driver to use DT-provided GPIO
   ranges.
 
 New drivers:
 - Atmel PIO4 pin controller for the SAMA4D2 family
 
 New subdrivers:
 - Rockchip RK3036 subdriver
 - Renesas SH PFC R8A7795 subdriver
 - Allwinner sunxi A83T PIO subdriver
 - Freescale i.MX7d iomux lpsr subdriver
 - Marvell Berlin BG4CT subdriver
 - SiRF Atlas 7 step B SoC subdriver
 - Intel Broxton SoC subdriver
 
 Apart from this, the usual slew if syntactic and semantic
 fixes.
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Merge tag 'pinctrl-v4.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control updates from Linus Walleij:
 "This is the big bulk of pin control changes for the v4.4 kernel
  development cycle.  Development pace is high in pin control again this
  merge window.  28 contributors, 83 patches.

  It hits a few sites outside the pin control subsystem:

   - Device tree bindings in Documentation (as usual)
   - MAINTAINERS
   - drivers/base/* for the "init" state handling by Doug Anderson.
     This has been ACKed by Greg.
   - drivers/usb/renesas_usbhs/rcar2.c, for a dependent Renesas change
     in the USB subsystem.  This has been ACKed by both Greg and Felipe.
   - arch/arm/boot/dts/sama5d2.dtsi - this should ideally have gone
     through the ARM SoC tree but ended up here.

  This time I am using Geert Uytterhoeven as submaintainer for SH PFC
  since the are three-four people working in parallel with new Renesas
  ASICs.

  Summary of changes:

  Infrastructure:

   - Doug Anderson wrote a patch adding an "init" state different from
     the "default" state for pin control state handling in the core
     framework.  This is applied before the driver's probe() call if
     defined and takes precedence over "default".  If both are defined,
     "init" will be applied *before* probe() and "default" will be
     applied *after* probe().

  Significant subdriver improvements:

   - SH PFC is switched to getting GPIO ranges from the device tree
     ranges property on DT platforms.
   - Got rid of CONFIG_ARCH_SHMOBILE_LEGACY, we are all modernized.
   - Got rid of SH PFC hardcoded IRQ numbers.
   - Allwinner sunxi external interrupt through the "r" controller.
   - Moved the Cygnus driver to use DT-provided GPIO ranges.

  New drivers:

   - Atmel PIO4 pin controller for the SAMA4D2 family

  New subdrivers:

   - Rockchip RK3036 subdriver
   - Renesas SH PFC R8A7795 subdriver
   - Allwinner sunxi A83T PIO subdriver
   - Freescale i.MX7d iomux lpsr subdriver
   - Marvell Berlin BG4CT subdriver
   - SiRF Atlas 7 step B SoC subdriver
   - Intel Broxton SoC subdriver

  Apart from this, the usual slew if syntactic and semantic fixes"

* tag 'pinctrl-v4.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (81 commits)
  pinctrl: pinconf: remove needless loop
  pinctrl: uniphier: guard uniphier directory with CONFIG_PINCTRL_UNIPHIER
  pinctrl: zynq: fix UTF-8 errors
  pinctrl: zynq: Initialize early
  pinctrl: at91: add missing of_node_put
  pinctrl: tegra-xusb: Correct lane mux options
  pinctrl: intel: Add Intel Broxton pin controller support
  pinctrl: intel: Allow requesting pins which are in ACPI mode as GPIOs
  pinctrl: intel: Add support for multiple GPIO chips sharing the interrupt
  drivers/pinctrl: Add the concept of an "init" state
  pinctrl: uniphier: set input-enable before pin-muxing
  pinctrl: cygnus: Add new compatible string for gpio controller driver
  pinctrl: cygnus: Remove GPIO to Pinctrl pin mapping from driver
  pinctrl: cygnus: Optional DT property to support pin mappings
  pinctrl: sunxi: Add irq pinmuxing to sun6i "r" pincontroller
  pinctrl: sunxi: Fix irq_of_xlate for the r_pio pinctrl block
  pinctrl: sh-pfc: Remove obsolete r8a7778 platform_device_id entry
  pinctrl: sh-pfc: Remove obsolete r8a7779 platform_device_id entry
  pinctrl: sh-pfc: Stop including <linux/platform_data/gpio-rcar.h>
  usb: renesas_usbhs: Remove unneeded #include <linux/platform_data/gpio-rcar.h>
  ...
2015-11-02 12:30:39 -08:00
Linus Torvalds
9ff3ca58b0 * Convert EDAC to debugfs wrappers and make drivers use those. (Borislav Petkov)
* L3 and SoC support for xgene_edac. (Loc Ho)
 
 * AMD F15h, models 0x60-6f support to amd64_edac. (Aravind Gopalakrishnan)
 
 * Fixes and cleanups all over the place.
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Merge tag 'edac_for_4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp

Pull EDAC updates from Borislav Petkov:
 "A bunch of fixes all over the place and some hw enablement this time.

   - Convert EDAC to debugfs wrappers and make drivers use those
     (Borislav Petkov)

   - L3 and SoC support for xgene_edac (Loc Ho)

   - AMD F15h, models 0x60-6f support to amd64_edac (Aravind
     Gopalakrishnan)

   - Fixes and cleanups all over the place"

* tag 'edac_for_4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (22 commits)
  EDAC: Fix PAGES_TO_MiB macro misuse
  EDAC, altera: SoCFPGA EDAC should not look for ECC_CORR_EN
  EDAC: Use edac_debugfs_remove_recursive()
  EDAC, ppc4xx_edac: Fix module autoload for OF platform driver
  Documentation/EDAC: Add reference documents section for amd64_edac
  EDAC, amd64_edac: Update copyright and remove changelog
  EDAC, amd64_edac: Extend scrub rate support to F15hM60h
  EDAC: Don't allow empty DIMM labels
  EDAC: Fix sysfs dimm_label store operation
  EDAC: Fix sysfs dimm_label show operation
  arm64, EDAC: Add L3/SoC DT subnodes to the APM X-Gene SoC EDAC node
  EDAC, xgene: Add SoC support
  EDAC, xgene: Fix possible sprintf() overflow issue
  EDAC, xgene: Add L3 support
  EDAC, Documentation: Update X-Gene EDAC binding for L3/SoC subnodes
  EDAC, sb_edac: Fix TAD presence check for sbridge_mci_bind_devs()
  EDAC, ghes_edac: Remove redundant memory_type array
  EDAC, xgene: Convert to debugfs wrappers
  EDAC, i5100: Convert to debugfs wrappers
  EDAC, altera: Convert to debugfs wrappers
  ...
2015-11-02 12:14:50 -08:00
Linus Torvalds
17a1359034 MMC core:
- Add new API to set VCCQ voltage - mmc_regulator_set_vqmmc()
  - Add new ioctl to allow userspace to send multi commands
  - Wait for card busy signalling before starting SDIO requests
  - Remove MMC_CLKGATE
  - Enable tuning for DDR50 mode
  - Some code clean-up/improvements to mmc pwrseq
  - Use highest priority for eMMC restart handler
  - Add DT bindings for eMMC hardware reset support
  - Extend the mmc_send_tuning() API
  - Improve ios show for debugfs
  - A couple of code optimizations
 
 MMC host:
  - Some generic OF improvements
  - Various code clean-ups
  - sirf: Add support for DDR50
  - sunxi: Add support for card busy detection
  - mediatek: Use MMC_CAP_RUNTIME_RESUME
  - mediatek: Add support for eMMC HW-reset
  - mediatek: Add support for HS400
  - dw_mmc: Convert to use the new mmc_regulator_set_vqmmc() API
  - dw_mmc: Add external DMA interface support
  - dw_mmc: Some various improvements
  - dw_mmc-rockchip: MMC tuning with the clock phase framework
  - sdhci: Properly clear IRQs during resume
  - sdhci: Enable tuning for DDR50 mode
  - sdhci-of-esdhc: Use IRQ mode for card detection
  - sdhci-of-esdhc: Support both BE and LE host controller
  - sdhci-pci: Build o2micro support in the same module
  - sdhci-pci: Support for new Intel host controllers
  - sdhci-acpi: Support for new Intel host controllers
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Merge tag 'mmc-v4.4' of git://git.linaro.org/people/ulf.hansson/mmc

Pull MMC updates from Ulf Hansson:
 "MMC core:
   - Add new API to set VCCQ voltage - mmc_regulator_set_vqmmc()
   - Add new ioctl to allow userspace to send multi commands
   - Wait for card busy signalling before starting SDIO requests
   - Remove MMC_CLKGATE
   - Enable tuning for DDR50 mode
   - Some code clean-up/improvements to mmc pwrseq
   - Use highest priority for eMMC restart handler
   - Add DT bindings for eMMC hardware reset support
   - Extend the mmc_send_tuning() API
   - Improve ios show for debugfs
   - A couple of code optimizations

  MMC host:
   - Some generic OF improvements
   - Various code clean-ups
   - sirf: Add support for DDR50
   - sunxi: Add support for card busy detection
   - mediatek: Use MMC_CAP_RUNTIME_RESUME
   - mediatek: Add support for eMMC HW-reset
   - mediatek: Add support for HS400
   - dw_mmc: Convert to use the new mmc_regulator_set_vqmmc() API
   - dw_mmc: Add external DMA interface support
   - dw_mmc: Some various improvements
   - dw_mmc-rockchip: MMC tuning with the clock phase framework
   - sdhci: Properly clear IRQs during resume
   - sdhci: Enable tuning for DDR50 mode
   - sdhci-of-esdhc: Use IRQ mode for card detection
   - sdhci-of-esdhc: Support both BE and LE host controller
   - sdhci-pci: Build o2micro support in the same module
   - sdhci-pci: Support for new Intel host controllers
   - sdhci-acpi: Support for new Intel host controllers"

* tag 'mmc-v4.4' of git://git.linaro.org/people/ulf.hansson/mmc: (73 commits)
  mmc: dw_mmc: fix the wrong setting for UHS-DDR50 mode
  mmc: dw_mmc: fix the CardThreshold boundary at CardThrCtl register
  mmc: dw_mmc: NULL dereference in error message
  mmc: pwrseq: Use highest priority for eMMC restart handler
  mmc: mediatek: add HS400 support
  mmc: mmc: extend the mmc_send_tuning()
  mmc: mediatek: add implement of ops->hw_reset()
  mmc: mediatek: fix got GPD checksum error interrupt when data transfer
  mmc: mediatek: change the argument "ddr" to "timing"
  mmc: mediatek: make cmd_ints_mask to const
  mmc: dt-bindings: update Mediatek MMC bindings
  mmc: core: Add DT bindings for eMMC hardware reset support
  mmc: omap_hsmmc: Enable omap_hsmmc for Keystone 2
  mmc: sdhci-acpi: Add more ACPI HIDs for Intel controllers
  mmc: sdhci-pci: Add more PCI IDs for Intel controllers
  arm: lpc18xx_defconfig: remove CONFIG_MMC_DW_IDMAC
  arm: hisi_defconfig: remove CONFIG_MMC_DW_IDMAC
  arm: exynos_defconfig: remove CONFIG_MMC_DW_IDMAC
  arc: axs10x_defconfig: remove CONFIG_MMC_DW_IDMAC
  mips: pistachio_defconfig: remove CONFIG_MMC_DW_IDMAC
  ...
2015-11-02 11:40:22 -08:00
Mans Rullgard
61dd90224c devicetree: add Sigma Designs vendor prefix
Add the "sigma" vendor prefix for Sigma Designs, Inc.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2015-11-02 11:22:12 -06:00
Joerg Roedel
b67ad2f7c7 Merge branches 'x86/vt-d', 'arm/omap', 'arm/smmu', 's390', 'core' and 'x86/amd' into next
Conflicts:
	drivers/iommu/amd_iommu_types.h
2015-11-02 20:03:34 +09:00
Linus Walleij
aacaffd1d9 gpio: dt-bindings: document the official use of "ngpios"
There are a bunch of drivers that utilize the "ngpios" DT property
without any vendor prefix. Try to start cleaning up the mess by
defining what we mean by this property.

Cc: devicetree@vger.kernel.org
Cc: Pramod Kumar <pramodku@broadcom.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-31 22:12:32 +01:00
Tang Yuantian
d72c0f430b devicetree: bindings: Fixed a few typos
There is a few typos in Freescale QorIQ AHCI bindings, This
patch fixes them.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-10-31 09:52:15 +09:00
Tang Yuantian
d19f9aaf01 ahci: qoriq: Rename LS2085A SoC support code to LS2080A
Freescale is renaming the LS2085A SoC to LS2080A.
This patch addresses the same.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2015-10-31 09:52:15 +09:00
Michal Suchanek
fe2585e9c2 doc: dt: mtd: support partitions in a special 'partitions' subnode
To avoid conflict with other drivers using subnodes of the mtd device
create only one ofpart-specific node rather than any number of
arbitrary partition subnodes.

Signed-off-by: Michal Suchanek <hramrach@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-10-30 14:00:42 -07:00
Thomas Abraham
271bb1773b bindings: mfd: s2mps11: Add documentation for s2mps15 PMIC
Add dt-binding documentation for s2mps15 PMIC device. The s2mps15 device
is similar to s2mps11/14 PMIC device and has 27 LDO and 10 buck regulators.
This also supports RTC and three 32.768KHz clock outputs.

Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-10-30 18:57:38 +00:00
Charles Keepax
5530ef113d extcon: arizona: Add extcon specific device tree binding document
Subsystem specific bindings for the Arizona devices are being factored
out of the MFD binding document into separate documents for each
subsystem. This patch adds a binding document that covers the existing
extcon specific bindings.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-10-30 18:57:37 +00:00
Charles Keepax
f2f48a584d mfd: arizona: Remove bindings covered in new subsystem specific docs
Binding documentation has been added in new subsystem specific binding
documents. This patch removes the now duplicate documentation from the
MFD documentation.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-10-30 18:57:36 +00:00
Bjorn Andersson
9d6c243502 backlight: pm8941-wled: Add default-brightness property
Default the brightness to 2048 and add possibility to override this in
device tree.

Suggested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-10-30 18:47:51 +00:00
Moritz Fischer
794fab7d78 Documentation: arm: Fixed typo in socfpga fpga mgr example
Addresses should not be prefixed contain '0x' in nodes.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2015-10-30 13:04:19 -05:00
Sudeep Holla
71a0151c5c Documentation: devicetree: fix reference to legacy wakeup properties
This patch marks all the reference to the legacy wakeup bindings
and replaces them with the standard "wakeup-source" property.

All these legacy property are also listed under a separate section in
the generic wakeup-source binding document.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2015-10-30 13:04:19 -05:00
Sudeep Holla
a68eee4c74 Documentation: devicetree: standardize/consolidate on "wakeup-source" property
Currently different drivers use multiple forms of annotating devices
that should be set up as wakeup sources for the system.

This patch adds a separate binding document inorder to standardize and
consolidate to use "wakeup-source" boolean property to mark the devices
as wakeup capable.

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2015-10-30 13:04:18 -05:00
Krzysztof Kozlowski
8c1065801c mfd: dt-bindings: Document pulled down WRSTBI pin on S2MPS1X
Document a new Device Tree property 'samsung,s2mps11-wrstbi-ground'
indicating that WRSTBI pin of S2MPS13 PMIC is pulled down so
corresponding buck warm reset function should be disabled.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-10-30 17:20:38 +00:00
Cyrille Pitchen
c335bd5da0 mfd: devicetree: Add bindings for Atmel Flexcom
This patch documents the DT bindings for the Atmel Flexcom which will be
introduced by sama5d2x SoCs. These bindings will be used by the actual
Flexcom driver to be sent in another patch.

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-10-30 17:19:48 +00:00
Emilio López
5b855ff3f7 bindings: mfd: cros ec: Document vbc EC property
Some EC implementations include a small nvram space used to store
verified boot context data. This boolean property lets us indicate
whether this space is available or not on a specific EC implementation.

Signed-off-by: Emilio López <emilio.lopez@collabora.co.uk>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2015-10-30 17:18:51 +00:00
David S. Miller
740215ddb5 NFC 4.4 pull request
This is the NFC pull request for 4.4.
 
 It's a bit bigger than usual, the 3 main culprits being:
 
 - A new driver for Intel's Fields Peak NCI chipset. In order to
   support this chipset we had to export a few NCI routines and
   extend the driver NCI ops to not only support proprietary
   commands but also core ones.
 
 - Support for vendor commands for both STM drivers, st-nci
   and st21nfca. Those vendor commands allow to run factory tests
   through the NFC netlink interface.
 
 - New i2c and SPI support for the Marvell driver, together with
   firmware download support for this driver's core.
 
 Besides that we also have:
 
 - A few file renames in the STM drivers, to keep the naming
   consistent between drivers.
 
 - Some improvements and fixes on the NCI HCI layer, mostly to
   properly reach a secure element over a legacy HCI link.
 
 - A few fixes for the s3fwrn5 and trf7970a drivers.
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Merge tag 'nfc-next-4.4-2' of git://git.kernel.org/pub/scm/linux/kernel/git/sameo/nfc-next

Samuel Ortiz says:

====================
NFC 4.4 pull request

This is the NFC pull request for 4.4.

It's a bit bigger than usual, the 3 main culprits being:

- A new driver for Intel's Fields Peak NCI chipset. In order to
  support this chipset we had to export a few NCI routines and
  extend the driver NCI ops to not only support proprietary
  commands but also core ones.

- Support for vendor commands for both STM drivers, st-nci
  and st21nfca. Those vendor commands allow to run factory tests
  through the NFC netlink interface.

- New i2c and SPI support for the Marvell driver, together with
  firmware download support for this driver's core.

Besides that we also have:

- A few file renames in the STM drivers, to keep the naming
  consistent between drivers.

- Some improvements and fixes on the NCI HCI layer, mostly to
  properly reach a secure element over a legacy HCI link.

- A few fixes for the s3fwrn5 and trf7970a drivers.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2015-10-30 20:19:43 +09:00
Iyappan Subramanian
6ccbe6b248 Documentation: dts: xgene: Add TX/RX delay field
Signed-off-by: Iyappan Subramanian <isubramanian@apm.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2015-10-30 12:21:52 +09:00
Russell King
116ef0fcc9 Merge branches 'fixes' and 'misc' into for-next 2015-10-29 15:21:30 +00:00
yankejian
6d08f61787 net: hisilicon: updates HNS config and documents
updates the bindings documents and dtsi file according to the review
comments[https://lkml.org/lkml/2015/9/21/670] from Rob Herring <robh@kernel.org>

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: yankejian <yankejian@huawei.com>
Signed-off-by: huangdaode <huangdaode@hisilicon.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2015-10-27 20:20:24 -07:00
Charles Keepax
afafcdd3ff regulator: arizona: Add regulator specific device tree binding document
Subsystem specific bindings for the Arizona devices are being factored
out of the MFD binding document into separate documents for each
subsystem. This patch adds a binding document that covers the existing
regulator specific bindings.

Signed-off-by: Charles Keepax <ckeepax@opensource.wolfsonmicro.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-28 09:17:05 +09:00
Scott Wood
43f2cfcce2 Merge branch 'clock' into HEAD
This is a major overhaul of the clk-qoriq driver, which I'm merging
via PPC with Stephen Boyd's ack in order to apply subsequent PPC patches
that depend on it.
2015-10-27 18:14:16 -05:00
Scott Wood
567cf94dc7 powerpc/book3e-64/kexec: Enable SMP release
The SMP release mechanism for FSL book3e is different from when booting
with normal hardware.  In theory we could simulate the normal spin
table mechanism, but not at the addresses U-Boot put in the device tree
-- so there'd need to be even more communication between the kernel and
kexec to set that up.  Instead, kexec-tools will set a boolean property
linux,booted-from-kexec in the /chosen node.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: devicetree@vger.kernel.org
2015-10-27 18:13:29 -05:00
Soren Brinkmann
787dfbb294 gpio: zynq: Document interrupt-controller DT binding
HW and driver support the GPIO as interrupt-controller.
Document that in the DT binding.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27 17:01:28 +01:00
Justin Chen
5c5049dab9 watchdog: bcm7038: add device tree binding documentation
Add device tree binding documentation for the watchdog hardware block
on bcm7038 and newer SoCs.

Signed-off-by: Justin Chen <justinpopo6@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
2015-10-27 16:07:35 +01:00
Pramod Kumar
e0548004d4 pinctrl: cygnus: Add new compatible string for gpio controller driver
This new compatible string, "brcm,iproc-gpio", should be used for
all new iproc-based future SoCs.

Signed-off-by: Pramod Kumar <pramodku@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27 10:48:15 +01:00
Pramod Kumar
03e09bc185 pinctrl: cygnus: Optional DT property to support pin mappings
If GPIO controller's pins are muxed, pin-controller subsystem
need to be intimated by defining mapping between gpio and
pinmux controller. This patch adds required properties to
define this mapping via DT.

Signed-off-by: Pramod Kumar <pramodku@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-27 10:43:14 +01:00
Chaotian Jing
2c21d26825 mmc: dt-bindings: update Mediatek MMC bindings
Add 400Mhz clock source for HS400 mode

Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-10-27 10:21:15 +01:00
Chaotian Jing
794f15782d mmc: core: Add DT bindings for eMMC hardware reset support
Sometime only need set MMC_CAP_HW_RESET for one of MMC hosts,
So set it in device tree is better.

Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-10-27 10:21:15 +01:00
Leilk Liu
eca3a1ee8d spi: mediatek: Update document devicetree bindings to support multiple devices
This patch updates document devicetree bindings
to support multiple devices.

Signed-off-by: Leilk Liu <leilk.liu@mediatek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-27 13:33:35 +09:00
Vincent Cuissard
d8e018c0b3 NFC: nfcmrvl: update device tree bindings for Marvell NFC
Align NFC bindgins to use marvell instead of mrvl.

Signed-off-by: Vincent Cuissard <cuissard@marvell.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2015-10-27 04:24:54 +01:00
Vincent Cuissard
caf6e49bf6 NFC: nfcmrvl: add spi driver
This driver adds the support of SPI-based Marvell NFC controller.

Signed-off-by: Vincent Cuissard <cuissard@marvell.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2015-10-27 04:24:35 +01:00
Vincent Cuissard
b5b3e23e4c NFC: nfcmrvl: add i2c driver
This driver adds the support of I2C-based Marvell NFC controller.

Signed-off-by: Vincent Cuissard <cuissard@marvell.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2015-10-27 04:21:14 +01:00
Christophe Ricard
3648dc6d27 NFC: st-nci: Add ese-present/uicc-present dts properties
In order to align with st21nfca, dts configuration properties
ese_present and uicc_present are made available in st-nci driver.

So far, in early development firmware, because
nci_nfcee_mode_set(DISABLE) was not supported we had to try to
enable it during the secure element discovery phase.

After several trials on commercial and qualified firmware it appears
that nci_nfcee_mode_set(ENABLE) and nci_nfcee_mode_set(DISABLE) are
properly supported.

Such feature also help us to eventually save some time (~5ms) when
only one secure element is connected.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
2015-10-27 03:55:10 +01:00
Peter Ujfalusi
1be5336bc7 dmaengine: edma: New device tree binding
With the old binding and driver architecture we had many issues:
No way to assign eDMA channels to event queues, thus not able to tune the
system by moving specific DMA channels to low/high priority servicing. We
moved the cyclic channels to high priority within the code, but that was
just a workaround to this issue.
Memcopy was fundamentally broken: even if the driver scanned the DT/devices
in the booted system for direct DMA users (which is not effective when the
events are going through a crossbar) and created a map of 'used' channels,
this information was not really usable. Since via dmaengien API the eDMA
driver will be called with _some_ channel number, we would try to request
this channel when any channel is requested for memcpy. By luck we got
channel which is not used by any device most of the time so things worked,
but if a device would have been using the given channel, but not requested
it, the memcpy channel would have been waiting for HW event.
The old code had the am33xx/am43xx DMA event router handling embedded. This
should have been done in a separate driver since it is not part of the
actual eDMA IP.
There were no way to 'lock' PaRAM slots to be used by the DSP for example
when booting with DT.
In DT boot the edma node used more than one hwmod which is not a good
practice and the kernel prints warning because of this.

With the new bindings and the changes in the driver we can:
- No regression with Legacy binding and non DT boot
- DMA channels can be assigned to any TC (to set priority)
- PaRAM slots can be reserved for other cores to use
- Dynamic power management for CC and TCs, if only TC0 is used all other TC
  can be powered down for example

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-10-27 10:22:45 +09:00
Peter Ujfalusi
42dbdcc6bf dmaengine: ti-dma-crossbar: Add support for crossbar on AM33xx/AM43xx
The DMA event crossbar on AM33xx/AM43xx is different from the one found in
DRA7x family.
Instead of a single event crossbar it has 64 identical mux attached to each
eDMA event line. When the 0 event mux is selected, the default mapped event
is going to be routed to the corresponding eDMA event line. If different
mux is selected, then the selected event is going to be routed to the given
eDMA event.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-10-27 10:22:45 +09:00
Masahiro Yamada
e7ecbc057b ARM: uniphier: add outer cache support
This commit adds support for UniPhier outer cache controller.
All the UniPhier SoCs are equipped with the L2 cache, while the L3
cache is currently only integrated on PH1-Pro5 SoC.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2015-10-27 09:20:50 +09:00
Olof Johansson
8713181dce Merge branch 'for-upstream/juno-pcie' of git://linux-arm.org/linux-ld into next/arm64
* 'for-upstream/juno-pcie' of git://linux-arm.org/linux-ld:
  arm64: defconfig: Enable PCI generic host bridge by default
  arm64: Juno: Add support for the PCIe host bridge on Juno R1
  Documentation: of: Document the bindings used by Juno R1 PCIe host bridge

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-10-27 08:51:50 +09:00
Stefan Roese
e278fc71b2 mtd: fsmc_nand: Add BCH4 SW ECC support for SPEAr600
This patch adds support for 4-bit ECC BCH4 for the SPEAr600 SoC. This can
be used by boards equipped with a NAND chip that requires 4-bit ECC
strength. The SPEAr600 HW ECC only supports 1-bit ECC strength.

To enable SW BCH4, you need to specify this in your nand controller
DT node:

	nand-ecc-mode = "soft_bch";
	nand-ecc-strength = <4>;
	nand-ecc-step-size = <512>;

Tested on a custom SPEAr600 board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
[Brian: tweaked the comments a bit]
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-10-26 13:19:40 -07:00
Shawn Lin
87ffa7d30d Documentation: synopsys-dw-mshc: add bindings for idmac and edmac
synopsys-dw-mshc supports three types of transfer mode. We add
bindings and description for how to use them at runtime.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-10-26 16:00:16 +01:00
Sergei Shtylyov
a599579ee8 DT: mmc: sh_mmcif: document R8A7794 support
Renesas R8A7794 SoC also has the MMCIF controller.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-10-26 16:00:15 +01:00
Sergei Shtylyov
76d63c2b59 DT: mmc: sh_mmcif: fix "compatible" property text
The "compatible" property text contradicts even the example given in the MMCIF
binding document itself;  moreover, the Renesas MMCIF driver only matches  on
the generic "compatible" string and doesn't look for the SoC specific strings
at all. Thus describe "renesas,sh-mmcif" as a fallback value.

Fixes: b4c27763d7 ("mmc: sh_mmcif: Document DT bindings")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2015-10-26 16:00:14 +01:00