It's fairly common while debugging to need to enable the config clocks
for an SMMU so that you can poke around at the registers. Add a debugfs
file to do this.
CRs-Fixed: 997751
Change-Id: I31b90d64c2facb0a681f9da586e2c90803776819
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
The vanilla ARM DMA IOMMU mapper is used by many clients in our system,
but we have no functional test coverage of it. Add some functional
testing for it by leveraging the tests that were recently added for the
Fast DMA mapper. Since the Fast mapper and the ARM mapper are both DMA
API implementations we can share most of the code.
CRs-Fixed: 997751
Change-Id: I58734a82f4dc3e4658ab7995b6682205097da991
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
Functional tests are good. Add some for the fast DMA mapper.
CRs-Fixed: 997751
Change-Id: Iefb80124c335d65ea5bd8a15406c685125030003
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
The fast DMA API implementation that was recently needs to be profiled.
Add a new debugfs file (similar to the original "profiling" file) to do
this.
CRs-Fixed: 997751
Change-Id: I1236d9b6aaeab9d34b39e7f5d7b285691d1779da
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
io-pgtable-fast does some underhanded tricks to achieve performance.
One of those tricks is that it expects clients to call its map function
directly, rather than going through the IOMMU framework. Add a DMA API
implementation that goes through io-pgtable-fast.
CRs-Fixed: 997751
Change-Id: Iebcafeb630d9023f666078604898069e9f26dfdd
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
The DOMAIN_ATTR_PGTBL_INFO attribute will be useful in implementing DMA
APIs that can leverage the fast page table mapping routines. Implement
it.
CRs-Fixed: 997751
Change-Id: Id3acec0089b126e7d6ad44d8d322bf473614f716
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
For certain DMA API implementations, the overhead of going through the
IOMMU framework is too much. Such an implementation might want to
perform some rudimentary page table management using bits of information
from the underlying page tables. Add a domain attribute and structure
for querying this type of information. For now, the only information
supported is the kernel virtual address of the PMDs (assumed to be
virtually contiguous).
CRs-Fixed: 997751
Change-Id: I29d31e9649c24d30a5a7ffaa4b238a0203846594
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
Some of our users need to be able to call
iommu_{enable,disable}_config_clocks on domains for SMMUs that we
control. Implement them.
CRs-Fixed: 997751
Change-Id: Idc3692679409093faf8f458d53326e669d7f6479
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
There are certain use cases where it might be necessary to leave the
IOMMU's configuration clocks on. This might happen in places where an
IOMMU's clocks might not be known. A good example of this would be a
test library that needs to be able to do TLB invalidation from atomic
context. It would need to enable clocks up front (outside of atomic
context) and leave them on for the duration of the test.
Add some ops for enabling and disabling configuration clocks.
CRs-Fixed: 997751
Change-Id: I95056952f60494fe5745f2183f9af8aab3a40315
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
The upcoming "fast" DMA mapper will need to take control of TLB
invalidation. Doing so allows us to perform fewer TLB invalidation
operations since the DMA mapper layer has more knowledge about when
"stale" TLB entries might actually become a problem, so it can do TLB
invalidation much less frequently. Implement the tlbi_domain op for
this purpose.
CRs-Fixed: 997751
Change-Id: Iba9f499dba89db91c1150947b9599d85ade65b0e
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
Some higher-level DMA mappers might be able to squeeze out more
performance if TLB invalidation can be delegated to them, since they
might have more knowledge about when a stale TLB is problem than the
IOMMU driver. Add a callback for this purpose that can be implemented
by individual IOMMU drivers.
CRs-Fixed: 997751
Change-Id: If817f5514fdd5d24b9c592440760b81b88ec71a8
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
We'd like to understand the performance of the fast page table mapper,
which only supports 4K page sizes. Add a debugfs file to profile the
new mapper.
CRs-Fixed: 997751
Change-Id: I5adc3c3ecd432552386b600b9e66e3db42e73138
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
An io-pgtable implementation for fast 4K mappings was recently added,
and we've now implemented all of the domain attributes necessary to use
it. Wire it up.
CRs-Fixed: 997751
Change-Id: I9ddd2dd2cad91ac3d3ccce7c0cd0abb37cd57075
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
Some IOMMU drivers offer "fast" page table management routines for
special cases. There is often a trade-off with memory, etc. with these
so make their usage explicit with a domain attribute.
CRs-Fixed: 997751
Change-Id: Ia9f8ad6d924b294b6758970da2e9767f183b5649
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
It's fast for use cases that require super fast IOMMU mappings (in
exchange for memory). Enable it.
CRs-Fixed: 997751
Change-Id: I016937309ac8e16775d13e63b630bb98469c9fca
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
Certain use cases require performance that can't be achieved with the
general-purpose SMMU page table code. By limiting ourselves to 4K page
mappings (no block mappings) and pre-populating the first and second
levels of the page tables up front, we can eliminate a lot of the work
needed for page table mapping and unmapping.
Add a performance-tuned io-pgtable implementation for ARMv8L page tables
that only supports 4K page mappings. Any size can be mapped, but only
4K page mappings will be installed in the page tables.
CRs-Fixed: 997751
Change-Id: I5861270709675016988052360d196e0a16a0d103
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
Currently we restrict the pgsize_bitmap for the entire SMMU every time
we allocate some new page tables. However, certain io-pgtable
implementations might wish to restrict the formats beyond the
restrictions of the SMMU itself, which forces all domains on that SMMU
to the same pgsize_bitmap, even if the other domains would prefer to use
a more permissive page table format. Besides that, some SMMUs in the
system might have different supported page sizes at the hardware level,
so applying those to everyone else is wrong.
Fix these issues by implementing the new .get_pgsize_bitmap IOMMU op.
CRs-Fixed: 997751
Change-Id: I9a73a31ee63a054cc44c50a21f7a616efd4af964
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
Currently we use a single pgsize_bitmap per IOMMU driver. However, some
IOMMU drivers might service different IOMMUs with different supported
page sizes. Some drivers might also want to restrict page sizes for
different use cases. Support these use cases by adding a
.get_pgsize_bitmap function to the iommu_ops which can optionally be
used by the driver to return a domain-specific pgsize_bitmap.
CRs-Fixed: 997751
Change-Id: I46d70733be647599e148fe52258a4d8f009ac48a
Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org>
Clear IEOB interrupt only for channels that have
IEOB interrupt enabled. This is needed to make sure IEOB interrupt
is not missed after switching from polling to interrupt.
CRs-Fixed: 1014388
Change-Id: Ia6484ed03d9508b827f8c7e4dadb84c14e306bd9
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
Add the DUMMY network interface and the crypto ECHAINIV module
needed for tunneling in advanced data call scenarios.
ECHAINIV is the default algorithm for CBC which is needed for
setting up a tunnel using XFRM state. Dummy network device is used
to route the IPv6 tunneled traffic when there is no IPv6 route
present on a wireless device. The default route in the dummy
interface routing table will route egress packets.
CRs-Fixed: 1017216
Change-Id: I8638814f7e06b0e63638c5acd268663d6a627718
Signed-off-by: Subash Abhinov Kasiviswanathan <subashab@codeaurora.org>
Update v4l_fill_fmtdesc() with qcom specific video
color formats to prevent it from throwing up
a warning stacktrace and flooding the logs.
CRs-Fixed: 1018787
Change-Id: Ia140bfb2fcd699937cd845c4489458e5fefb5150
Signed-off-by: Arun Menon <avmenon@codeaurora.org>
Implement clk_osm_get_cpu_cycle_counter() which returns the
running cycle counter value. Register these two functions with
a scheduler-provided callback to allow the scheduler to estimate
CPU frequency without notification. Lastly, setup the cycle
counter to be increased on every rising edge of the XO clock
for improved accuracy.
Change-Id: Ie0f60ca79efc05901a88da13f7a6476f390518a5
CRs-Fixed: 988356
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Most of CPUs increase cycle counter by one every cycle which makes
frequency = cycles / time_delta is correct. Therefore it's reasonable
to get rid of current cpu_cycle_max_scale_factor and ask cycle counter
read callback function to return scaled counter value when it's needed
in such a case that cycle counter doesn't increase every cycle.
Thus multiply NSEC_PER_SEC / HZ_PER_KHZ to CPU cycle counter delta
as we calculate frequency in khz and remove cpu_cycle_max_scale_factor.
This allows us to simplify frequency estimation and cycle counter API.
Change-Id: Ie7a628d4bc77c9b6c769f6099ce8d75740262a14
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
Enable bimc_bwmon device and the associated bw_hwmon governor
to scale DDR frequency as per the bandwidth between CPU and DDR.
Change-Id: I4efa37b8bb84ab62e82086b622896173b7d2fc7d
Signed-off-by: Rohit Gupta <rohgup@codeaurora.org>
Substitute 'MSM' in the devfreq device/config names to 'QCOM' to
comply with the current standards.
Change-Id: I156ba6e2b5f8e06a28540ca5def5b178c3604512
Signed-off-by: Rohit Gupta <rohgup@codeaurora.org>
Add cpu-bwmon device that monitors the traffic between CPU and
DDR and raises an interrupt when the byte count crosses a
threshold.
Change-Id: Ib9b508591d28d22e7d5aa8f33d8d829d3378ccea
Signed-off-by: Rohit Gupta <rohgup@codeaurora.org>
Writeback display now supports more MDP formats. This change adds
the definitions for those formats.
CRs-Fixed: 978785
Change-Id: I72fc29a8d7b286b0766c0483ba69d6e02d29b661
Signed-off-by: Benet Clark <benetc@codeaurora.org>
This patch turns off clock and bus control as well releases other
software resources upon driver exit. This patch
corrects crash due to resource leakage.
CRs-Fixed: 1018309
Change-Id: Ie0c6639fff9b829a58e12037f88c6508864b60a0
Signed-off-by: Alan Kwong <akwong@codeaurora.org>
Enable rotator driver to use r3 driver for r3 minor versions.
CRs-Fixed: 1018722
Change-Id: Ida9a93db8459d065ab7850de506e5b9124f6fdd4
Signed-off-by: Alan Kwong <akwong@codeaurora.org>
Copy speaker configuration from active to inactive bank
and perform bank switch operation while speaker channels
are getting enabled or disabled. This will make sure that
soundwire banks are always in sync and allow independent
control of speaker channels.
CRs-fixed: 1007465
Change-Id: Ic1653194c22fa5669b1c04fd9630158633fb00a5
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
Request device ungroup of speaker channels for independent
disable. It is possible that stereo speaker channels can be
disabled one after other, so remove them from group otherwise
speaker can be left in enabled state.
CRs-fixed: 1007465
Change-Id: I358ab4edcb85ec65b064ca28368ad744f2d36870
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
Handle soundwire slave devices ungroup in master controller.
Set the group device id to 0 when soundwire slave devices
request ungroup for independent control.
CRs-fixed: 1007465
Change-Id: I4f1b39dac949aa3f6aa3abb12ff0310fb0e98d1c
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
Add soundwire API to remove the soundwire slave devices
from group so that the devices can be controlled
independently as required.
CRs-fixed: 1007465
Change-Id: Ibca3e33c0e85629ae5ce121e75526f4786d6408a
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
Add support for 48x2 frame structure in soundwire
so that when slave device data path is not enabled,
all control messaging will happen with 48x2 frame.
Soundwire slave devices send an explicit request to
enable data path which in turn change the frame
structure to 48x16.
CRs-fixed: 996586
Change-Id: Ia4329ac982eb2a29a2b925897cd87ca9711c30e3
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
Add in device tree info to enable flash LED.
CRs-fixed: 1015501
Change-Id: I0c6471549dfa7af435a5ce5f21a56caab1c4ea09
Signed-off-by: Mohan Pallaka <mpallaka@codeaurora.org>
Signed-off-by: Chun Zhang <chunz@codeaurora.org>
If driver is registered before FW ready indication then bus error
observed because of powering off the hardware before calling
driver probe. Fix the issue by powering off only when driver is
not registered.
Also add top level reset after FW ready without which bus error
is observed.
CRs-fixed: 1015484
Change-Id: I26609c4011f10c1a9ee62b092050394e064ee2a2
Signed-off-by: Prashanth Bhatta <bhattap@codeaurora.org>
CONFIG_CPUSET sets affinity to cpu 0 without cgroup setting.
Due to this performance regressed.
CRs-Fixed: 1014436
Change-Id: Icf96a123b8d6e9c007198c2969d60e3707a57098
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
Enable energy aware driver for msmcortex targets to support energy aware
scheduler feature.
CRs-fixed: 1018108
Change-Id: I5745dbcbb946ee2f937d1e77a68a4e87bc85e08e
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
This patch addresses kernel addresses leak by changing
the format specifier to adhere to the kptr_restrict system setting.
CRs-Fixed: 987013
Change-Id: I32649a26f54d96c56d80aa2a1bd5f5d9dd0dd9d3
Signed-off-by: Manoj Prabhu B <bmanoj@codeaurora.org>
Allow modem mba, modem pbl and err_ready timeouts to be disabled by
writing to starting of pil_imem region.
CRs-Fixed: 1015492
Change-Id: I786d8edcd89e3624ef05ffc9a6953a8f840bbac0
Signed-off-by: Puja Gupta <pujag@codeaurora.org>
Add DSP memory region node that allows for buffers
to be created to be shared with DSP.
Change-Id: Iffd95234813a5dcd8ab7ec07a4ff1d2c679bb26f
Signed-off-by: Sathish Ambley <sathishambley@codeaurora.org>
PCIe is not used or tested on RUMI or SIM for msmcobalt.
Thus, disable PCIe on these platforms.
Change-Id: I0682801c0893a1b1516033b2ec0b0e2ec2713fdd
Signed-off-by: Tony Truong <truong@codeaurora.org>
Add support for secure session that checks whether the
buffer being passed was allocated from a secure heap and
appropriately maps the buffers in the secure context bank.
Change-Id: If590f65d033e264c04f0ad782895b02765ff4f3d
Signed-off-by: Sathish Ambley <sathishambley@codeaurora.org>
Add device node for HW event driver. HW event driver can be used to
configure HW events on msmcobalt device.
Change-Id: I5e633e798a0655d783554538b83b4642ec428c8c
Signed-off-by: Shashank Mittal <mittals@codeaurora.org>
This register write allows to select the usb3 phy mode. It is
recommended to explicitly select the usb3 phy mode before
programming the phy init sequence.
Change-Id: I2cb648b976d72d2020357881768674241557c56b
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
qmp phy can run in display port mode or in usb3 mode.
It is recommended to explicitly select the usb3 phy
mode before programming the phy init sequence, since
TCSR_USB3_DP_PHYMODE register is commonly used to
select mode between display port driver as well as
ssphy driver.
Change-Id: I270596868762ccd4f2f2cc9b0daaca647a2bee88
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Video firmware will send a HFI_PIC_STRUCT field in sequence changed
event, which indicates whether the clip is interlaced or progressive.
If the color format is NV12 and the clip is interlaced, DPB mode
would be combined NV12 while the DPB mode is split i.e. DPB is in
UBWC and OPB is in NV12. Also combining the pic struct change and
bit depth change into a single event to the userspace.
CRs-fixed: 1017209
Change-Id: Ife71e31622a53d0ea4cc418d434998e710352e10
Signed-off-by: Vikash Garodia <vgarodia@codeaurora.org>
