Commit graph

577557 commits

Author SHA1 Message Date
Harshdeep Dhatt
c2682f2a06 msm: kgsl: Increase fault detection threshold value
The current value is leading to spurious fault interrupts
from the GPU. Increase the threshold 4 times so that hardware
fault detection won't be triggered as quickly.

CRs-Fixed: 1073836
Change-Id: Ie780cec4de818c94a407461580f9d80de7e4ec84
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
2016-11-07 16:17:04 -07:00
Syed Rameez Mustafa
b9b63b0c62 sched/hmp: Fix memory leak when task fork fails
The scheduler allocates memory for the task load structures during
fork. It then relies to sched_exit() to be called to free that memory.
However, if the fork itself fails at any point after the allocation,
the memory is left unclaimed forever. Fix this memory leak by freeing
the allocated memory under error conditions.

Change-Id: I14a8290c9fcc4174ec80560e9f9d7bcdb119761f
Signed-off-by: Syed Rameez Mustafa <rameezmustafa@codeaurora.org>
2016-11-07 14:46:22 -08:00
Syed Rameez Mustafa
576259be4a sched/hmp: Use GFP_KERNEL for top task memory allocations
Task load structure allocations can consume a lot of memory as the
number of tasks begin to increase. Also they might exhaust the atomic
memory pool pretty quickly if a workload starts spawning lots of
threads in a short amount of time thus increasing the possibility of
failed allocations. Move the call to init_new_task_load() outside
atomic context and start using GFP_KERNEL for allocations. There is
no need for this allocation to be in atomic context.

Change-Id: I357772e10bf8958804d9cd0c78eda27139054b21
Signed-off-by: Syed Rameez Mustafa <rameezmustafa@codeaurora.org>
2016-11-07 14:46:21 -08:00
Syed Rameez Mustafa
ecd8f7800f sched/hmp: Use improved information for frequency notifications
Recent changes to scheduler guided frequency have started reporting
the maximum of the cpu load and the load of the top task on a CPU
to the governor. Use the same information to determine whether a
notification is necessary or not.

Change-Id: I1928c6cd0509952443a912ef54e0d72d5f75955d
Signed-off-by: Syed Rameez Mustafa <rameezmustafa@codeaurora.org>
2016-11-07 14:46:20 -08:00
Syed Rameez Mustafa
54052c3658 sched/hmp: Remove capping when reporting load to the cpufreq governor
Capping load when reporting to the governor was important prior to new
scheduler guided frequency changes as intra-cluster migrations would
sometimes lead to CPU loads well in excess of 100%. With the new top
task approach however, load greater than 100% is no longer possible
except for the same conditions that were previously exempted (i.e.
inter-cluster migrations and frequency aggregation).

Change-Id: I3e4f5e39ec9ae7eeaba9a567efd245a7aec1b7ad
Signed-off-by: Syed Rameez Mustafa <rameezmustafa@codeaurora.org>
2016-11-07 14:46:19 -08:00
Subbaraman Narayanamurthy
e0520b6c77 qpnp-fg-gen3: support configuring ESR FCC based on charging status
Currently, fuel gauge assumes that the battery charging current
is provided only by the main charger. When ESR pulse is needed,
it notifies only the main charger to lower its FCC. However, with
parallel charger also supplying the FCC to the battery, the main
charger can end up increasing its FCC instead of lowering it.
This is because of the fact that FCC of main charger is lower
than the total battery charging current because of the current
distribution to the parallel charger and the code sent by FG
allows it to increase its FCC.

Fix this by controlling ESR FCC current code to 300mA in software
when the device is charging and the parallel charger is enabled.
Switch back to hardware control when the device is not charging
or parallel charger is disabled.

Change-Id: I0e6e600f72f9ef8864f9b775df88f674de9cb52c
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2016-11-07 14:32:10 -08:00
Subbaraman Narayanamurthy
416ddbdbf3 qpnp-smb2: add support to configure charge inhibit
Currently charge inhibit feature is enabled by default and the
charge inhibit threshold is not configurable. Add a device tree
parameter "qcom,chg-inhibit-threshold-mv" through which the
charge inhibit threshold can be configured. If the property is
not specified, then charge inhibit feature is kept disabled.

Change-Id: I464d720abc138e8cd9ba8d7f1704cd91f4408bee
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2016-11-07 14:32:10 -08:00
Subbaraman Narayanamurthy
c15a8e246d ARM: dts: msm: update the ESR pulse width in pmicobalt
As per the hardware documentation, increase the duration
between attempts to measure ESR as the ESR pulse amplitude got
increased. This is to reduce the power consumption.

Change-Id: I65027413ecb22a1e89e37a12f66c5abda6c3ba28
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2016-11-07 14:32:10 -08:00
Subbaraman Narayanamurthy
5652fdc60b qpnp-fg-gen3: extend profile integrity word usage
Currently, profile integrity register is using only bit 0 to
indicate whether the profile is loaded or not. Now that the
profile can be loaded and/or fuel gauge can be restarted by the
bootloader, extend the usage of that word by using other bits
to provide more information. This is to aid the debugging.

Change-Id: Ib04ab10998de2f57b05cd976c3e9c8a1e2f4c574
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2016-11-07 14:32:09 -08:00
Subbaraman Narayanamurthy
1ddf07d8e2 qpnp-fg-gen3: update empty voltage threshold and empty SOC irq handling
As per the hardware characterization, update the battery empty
voltage threshold to 2.8V. Since this moves the voltage little
away from cutoff voltage, update the empty SOC interrupt handling
to report SOC as 0. Since we only need the rising edge of empty
SOC interrupt, modify the interrupt flag as well.

Change-Id: I665a6f879af4e6b6e9f94b5464be7894d5ea67cb
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2016-11-07 14:32:09 -08:00
Subbaraman Narayanamurthy
e5f967c5a9 qpnp-fg-gen3: expose a fake battery SOC for debug board
When a debug board is present, battery ID will be something like
7 Kohms. Expose a fake battery SOC when this is detected. This
will help avoiding the device shutdown if a low battery voltage
is seen by FG and state of charge goes to 0.

Change-Id: I750b2adfb00f12960f74bd552a5896f66ecaece6
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
2016-11-07 14:32:08 -08:00
Vidyakumar Athota
b1a6c6f3a7 ASoC: wcd9335: Fix AANC click and pop in voice call
Currently ANC output is connected to speaker path before PA
is enabled. This is causing click sound during voice call
when adaptive ANC is enabled. Fix this issue by connecting ANC
output to speaker path after PA is enabled.

Change-Id: I5f381b1e0c0222b8ae81d923da0b86d742b3cccd
Signed-off-by: Vidyakumar Athota <vathota@codeaurora.org>
2016-11-07 13:36:56 -08:00
Arve Hjønnevåg
580f1555aa ANDROID: binder: Clear binder and cookie when setting handle in flat binder struct
Prevents leaking pointers between processes

BUG: 30768347
Change-Id: Id898076926f658a1b8b27a3ccb848756b36de4ca
Signed-off-by: Arve Hjønnevåg <arve@android.com>
Git-repo: https://android.googlesource.com/kernel/msm.git
Git-commit: 11032d745836280574827bb1db5e64a94945180e
Signed-off-by: Dennis Cagle <d-cagle@codeaurora.org>
2016-11-07 12:40:09 -08:00
Nicholas Troast
ab23ab8211 qpnp-smb2: force HVDCP to 5V before reboot
When the MSM resets the USB data lines are pulled low. If an HVDCP adapter
is attached and operating at >5V, and the phone reboots then the HVDCP
adapter will be in a bad state and the USB input will be suspended. Fix
this by forcing the HVDCP adapter to 5V in the shutdown path.

Change-Id: I953d42418f90398bd4248f8b761cf63943ce5532
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
2016-11-07 12:39:38 -08:00
Harry Yang
da4cc80edb qcom-charger: Add batch register access support for CC2 removal
Provide a convient and compact way for a bunch of register
reads/saves and writes.

CRs-Fixed: 1079913
Change-Id: Ica6a60f3f5bd1fad624d01ea410e62dbed09dac8
Signed-off-by: Harry Yang <harryy@codeaurora.org>
2016-11-07 12:09:12 -08:00
Harshdeep Dhatt
8a7ca4ded7 msm: kgsl: Ignore EAGAIN when programming perfcounter
When programming perfcounter via gpu commands, we may encounter
-EAGAIN because of cancelling rb events either due to soft reset
or when powering down the device. Ignore this error because we
have already set up the perfcounter in software and it will be
programmed in hardware by adreno_perfcounter_restore when gpu
comes back up.

CRs-Fixed: 1024199
Change-Id: I5dc3561d15fa50ac58646f96559cfd262020dda9
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
2016-11-07 12:49:49 -07:00
Nicholas Troast
2dad6f26dc qpnp-smb2: fix reverse boost when input is removed
When any input is removed it is likely that reverse boost can happen.
Detect reverse boost by checking if the switcher-power-ok interrupt
triggers 3 times within 1 second. If detected then suspend all input.
Once VBUS falls the input can be resumed for the next insertion.

Change-Id: I3dbe4fe426111023b60eefd968c426be7d6057b9
Signed-off-by: Nicholas Troast <ntroast@codeaurora.org>
2016-11-07 11:37:08 -08:00
Bhalchandra Gajare
a26e74323e ASoC: wcd934x: fix MAD enable sequence for ADC2
Microphone Activity Detection (MAD) hardware block in codec needs to
be in micbias mode and bandgap must be enabled whenever the input
to the MAD block is from ADC2. Change updates the codec register
sequence for MAD Input mixer control accordingly.

CRs-Fixed: 1085214
Change-Id: Ic57b1db8688ff634ed7d62279baa7c042d126550
Signed-off-by: Bhalchandra Gajare <gajare@codeaurora.org>
2016-11-07 11:22:14 -08:00
Vidyakumar Athota
9a52c21164 ASoC: wcd934x: Fix AANC click and pop in voice call
Currently ANC output is connected to speaker path before PA
is enabled. This is causing click sound during voice call
when adaptive ANC is enabled. Fix this issue by connecting ANC
output to speaker path after PA is enabled.

Change-Id: I2103773a17e7d9ee5acb3f21dc955e2da493b3b4
Signed-off-by: Vidyakumar Athota <vathota@codeaurora.org>
2016-11-07 11:11:37 -08:00
Sathish Ambley
2295550247 msm: ADSPRPC: Use secure session device while freeing memory
Make sure that the secure session device is used while freeing the
buffer that was allocated from secure memory.

Change-Id: I07802c21c661fe18fb2fda70980b04f646408d7d
Signed-off-by: Sathish Ambley <sathishambley@codeaurora.org>
2016-11-07 10:11:51 -08:00
Osvaldo Banuelos
120ff46702 ARM: dts: msm: Enable VDD_APC CPR aging for msmcobalt v2
Enable VDD_APC CPR aging for msmcobalt v2 and define a CPR
closed-loop and open-loop voltage margin reduction of 15 mV
for CPR local rev 3 parts and greater to account for this
feature being enabled.

CRs-Fixed: 1081084
Change-Id: I50a3ca4e09c6cd6edeb5c15478989e19926c6576
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
2016-11-07 07:53:16 -08:00
Osvaldo Banuelos
da0db5ee22 ARM: dts: msm: update VDD_APC CPR settings for msmcobalt
Update the default CPR min/max step quotient,
count repeat, consecutive down, and aging RO scaling
factor values for VDD_APC0 and VDD_APC1 to match the latest
hardware guidelines.

CRs-Fixed: 1080409
Change-Id: Ibb35a3f475725af96276389f78abb790ea5b5b81
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
2016-11-07 07:49:10 -08:00
Ashay Jaiswal
78bea34638 ARM: dts: msm: Add stub regulator devices for msmtriton
Add stub regulator devices for msmtriton because RPM regulator
support is not yet in place.

CRs-Fixed: 1086513
Change-Id: I40220bcf960a10d7d6271e09b9f85107ed0c24af
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
2016-11-07 14:57:01 +05:30
Taniya Das
00a15f8275 defconfig: msm: Add support for GCC clocks
GCC clock controller is required to be enabled for all peripheral clocks
supported by global clock controller.

Change-Id: I11c6cc7f09b403a09bdf65a14f7b9d327c5d9613
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2016-11-07 14:54:00 +05:30
Taniya Das
cea92c6266 clk: qcom: gcc: Cleanup code for GCC clocks
The fmax & num_fmax have been updated to reflect the new variable names and
also fall back to branch clocks clock_ops for hardware branch clocks for
now until the new ops are available.

Change-Id: I8b86ebbabe37bb86bd20eafe9501c4677f21a553
Signed-off-by: Taniya Das <tdas@codeaurora.org>
2016-11-07 14:37:42 +05:30
Hareesh Gundu
0f6ff69a01 msm: kgsl: Allow mempools to configure from the device tree
Add driver support to configure mempools from the device tree.
This will enable mempools to configure per device specific and
reduces the high kgsl memory usage based on configuration.

CRs-Fixed: 1064046
Change-Id: I0a7e36b7e1fef9d42a4c0fe33d69a4debf15af2f
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
2016-11-07 13:04:21 +05:30
Gaurav Kohli
c56339c969 soc: qcom: pil: Using devm_ioremap for mapping restart reg of modem
GCC region has been mapped by regmap instead of devm_ioremap_resource.
So to map modem restart register which is part of gcc region requires
devm_ioremap otherwise mapping error occurs.

Change-Id: I1d97d8ef831e3a91df47eebf22e1156d0a3712ae
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
2016-11-06 22:58:07 -08:00
Neeraj Upadhyay
2d3f9b1ffd defconfig: msm: update msmfalcon defconfigs
Bring in updates from msmcortex defconfigs to msmfalcon's.

Change-Id: Iedbae0d4738c7badf3d4faf60f43e8c8bdab51e1
Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
2016-11-06 20:13:53 -08:00
Walter Yang
d0e976a886 ASoC: pcm: change capture_active to unsigned int
In combo usecase there are 2 front-end dai's with
same codec dai, for example, multi-phrase ADSP SVA detection.
Using a single bit as the counter causes the counter to roll
over to 0 during combo usecase.
To resolve this, change counter to unsigned int from single bit.

CRs-Fixed: 1086127
Change-Id: I2dd07bd967b7d4fb4878b6d65bd0f011c6b15bdd
Signed-off-by: Walter Yang <yandongy@codeaurora.org>
2016-11-07 11:32:05 +08:00
Linux Build Service Account
85d7e134cc Merge "msm: kgsl: Fix potential device NULL pointer dereferences" 2016-11-05 07:35:31 -07:00
Linux Build Service Account
2b28b1372c Merge "ARM: dts: msm: update ICNSS DT node for msmcobalt interposer" 2016-11-05 07:35:29 -07:00
Linux Build Service Account
ef1311a1e8 Merge "ARM: dts: msm: update bus bandwidth vote for msmcobalt ufs" 2016-11-04 22:22:10 -07:00
Linux Build Service Account
6d25dab1ba Merge "sched: prevent race between disable window statistics and task grouping" 2016-11-04 22:22:09 -07:00
Linux Build Service Account
3bc988427d Merge "regulator: cprh-kbss-regulator: update temp sensor ID for msmcobalt" 2016-11-04 22:22:08 -07:00
Linux Build Service Account
9d601a126f Merge "ARM: dts: msm: Add ADC nodes for pmfalcon" 2016-11-04 22:22:08 -07:00
Linux Build Service Account
f2fedb98bd Merge "diag: Fix race condition while closing SMD" 2016-11-04 22:22:06 -07:00
Linux Build Service Account
115a8ef46d Merge "diag: Add mutex protection while closing SMD" 2016-11-04 22:22:06 -07:00
Linux Build Service Account
9454b9f32d Merge "msm: ext_display: update hpd and notify logic" 2016-11-04 22:22:02 -07:00
Linux Build Service Account
68afff6f34 Merge "ASoC: msmcobalt: Update ignore suspend for MAD_CPE out widgets" 2016-11-04 22:22:01 -07:00
Linux Build Service Account
8e9e0fd780 Merge "Merge remote-tracking branch 'msm4.4/tmp-da9a92f' into msm-4.4" 2016-11-04 22:22:00 -07:00
Hareesh Gundu
71963395a5 msm: kgsl: Fix potential device NULL pointer dereferences
Ensure that device pointer isn't NULL before using it in
kgsl_snapshot_save_frozen_objs().

Change-Id: I676dfa5567b1d09427e3e7691045fabc71b53d43
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
2016-11-04 21:46:22 -07:00
Karthikeyan Periasamy
0e5ae23063 Revert "defconfig: msm64: msm: Compile vidc driver as LKM"
Video kernel modules as LKM make the T32 debugging difficult.
So, We revert the change and make video drivers as part of boot image.

CRs-Fixed: 1086328
Change-Id: Icd8aa9f935eb0096d1e13934ea556c74d7341093
Signed-off-by: Karthikeyan Periasamy <kperiasa@codeaurora.org>
2016-11-04 18:29:05 -07:00
Joonwoo Park
dfb9634d03 sched: prevent race between disable window statistics and task grouping
Change of colocation group requires to finish CPU busy time accounting
prior to its operation by calling update_task_ravg().  However when
window statistics accounting is disabled, update_task_ravg() acts as
nop and results in incorrect CPU time accounting.

Disallow colocation group change while window statistics accounting is
disabled in order to prevent race between reset_all_window_stats() and
colocation grouping functions.

Change-Id: I6dfa20b8d8b0ae7ccc94119bf9cf14c5e11a1cf7
Signed-off-by: Joonwoo Park <joonwoop@codeaurora.org>
2016-11-04 17:25:30 -07:00
Venkat Gopalakrishnan
359e6bb764 ARM: dts: msm: update bus bandwidth vote for msmcobalt ufs
The bandwidth vote determines the bus throughput needed for a
given running UFS gear frequency. For high throughput use cases
the current interface speed based votes may not be sufficient to
achieve peak user level throughput, as it doesn't count for other
system level latencies in the data path. Hence vote higher but
making sure the system stays in nominal voltage corner.

Change-Id: I95cda7e33288df7099826b37c2f436c5a33792e8
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
2016-11-04 15:13:10 -07:00
Skylar Chang
388eea86fe msm: ipa: fix division by 0 for DMA pipes
For DMA pipes, bufer size is 0. This commit fixes a
division by 0 in kernel when connecting DMA pipes.

Change-Id: I11551594e5115e71aa116cc7238953205a4118c3
CRs-Fixed: 1085266
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
2016-11-04 13:27:42 -07:00
Phani Kumar Uppalapati
492e06c8a0 ASoC: wcd934x: Change SIDO reference to internal
Add support to change SIDO reference to internal mode
during rock bottom sleep mode.

CRs-Fixed: 1080507
Change-Id: I8d70ad663f3476e1c81cc2126b1229a3c7c80265
Signed-off-by: Phani Kumar Uppalapati <phaniu@codeaurora.org>
2016-11-04 12:42:19 -07:00
Oleg Perelet
691ddba4ee msm: kgsl: Enable limits management on A540v2
Add limits management to A540v2 GPU feature set.

CRs-Fixed: 1075694
Change-Id: Ib2680fb97fed1d297c9a96c95edb08dea620495b
Signed-off-by: Oleg Perelet <operelet@codeaurora.org>
2016-11-04 09:53:49 -07:00
Sriharsha Allenki
5875dc5e26 ARM: dts: msm: Add ADC nodes for pmfalcon
Clients of VADC_HC and BTM include reading voltage phone
power, system thermistors for thermal mitigation such as
msm_therm, case_therm, XO therm. Round robin ADC (RRADC)
provides clients ability to read supported channels from
PMfalcon RRADC such as battery ID, battery thermistors,
DCIN and USBIN voltage and current. Add the supported VADC,
BTM and RR ADC channels for the msmfalcon platforms.

Change-Id: I1b8bf9762642e0af73d7ac7fa51c974b93fd4b31
Signed-off-by: Sriharsha Allenki <sallenki@codeaurora.org>
2016-11-04 13:00:34 +05:30
Walter Yang
e69b06911e ASoC: add 352800Hz into the pcm known rates
Add 352800Hz into pcm known rates to match with the sound
sample rate macro definitions.

CRs-Fixed: 1082850
Change-Id: Iedd78288f71ddcaa9fcb2f63bd3b73be2c0006dd
Signed-off-by: Walter Yang <yandongy@codeaurora.org>
2016-11-03 23:28:30 -07:00
AnilKumar Chimata
45da966c60 qcedev: Validate Source and Destination addresses
Source and Destination addresses passed by user space apps/clients
are validated independent of type of operation to mitigate kernel
address space exploitation.

Change-Id: I9ecb0103d7a73eedb2e0d1db1d5613b18dd77e59
Signed-off-by: AnilKumar Chimata <anilc@codeaurora.org>
2016-11-04 11:35:15 +05:30