Commit graph

3969 commits

Author SHA1 Message Date
Chris Wilson
6bda10d152 drm/i915: Completely disable fence pipelining.
I'm still seeing tiling corruption of PutImage and CopyArea (I think)
under mutter on pnv, so obviously the pipelining logic is deeply flawed.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 23:19:37 +00:00
Chris Wilson
0cdab21f9a drm/i915: Uncouple render/power ctx before suspending
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 23:19:37 +00:00
Chris Wilson
9b3826bf84 drm/i915: Ignore fenced commands for gpu access on gen4
Userspace should not have been declaring that it needed fenced GPU
access with gen4+ as those GPUs have no fenced commands, but to be on
the safe side it is easier to ignore userspace in case they did.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 23:18:32 +00:00
Chris Wilson
e3c4e5dd5a drm/i915: caps.has_rc6 is no longer used, remove it.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 23:18:31 +00:00
Chris Wilson
3c8cdf9b60 drm/i915: Power Context register is only available for gen4 mobiles
The ability to save the hardware context upon powering down the render
clock through PWRCTXA is only available on a couple of gen4 chipsets.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 23:18:31 +00:00
Chris Wilson
88f23b8fa3 drm/i915: Avoid using PIPE_CONTROL on Ironlake
The workaround is hideous and we are using the STORE_DWORD on all other
generations on all other rings, so use for the gen5 render ring as
well.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 23:18:14 +00:00
Chris Wilson
2a1292fd4c drm/i915/lvds: Always restore panel-fitter when enabling the LVDS
Linus Torvalds pointed out that our code was unbalanced when powering on
the panel with respect to the power off sequence in that we were failing
to restore the panel-fitter. The consequence of this would be that
across a simple DPMS off/on for a non-native mode, without an intervening
modeset, the panel fitter would remain disabled and the output would shift
on the panel.

Reported-by: Linus Torvalds <torvalds@linux-foundation.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 23:01:06 +00:00
Chris Wilson
6fd0d56e3b drm/i915/ringbuffer: Only print an error on the second attempt to reset head
There's not much we can do here but hope for the best. However the first
failure happens quite frequently and if often remedied by the second
attempt to reset HEAD. So only print the error if that attempt also
fails.

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=19802
Reported-by: Thomas Meyer <thomas@m3y3r.de>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
2010-12-05 23:01:05 +00:00
Chris Wilson
160b1543cd drm/i915/dp: Trivial code tidy
Locally scope the crtc to where it is used.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 14:54:05 +00:00
Chris Wilson
5aa7d52aeb Merge branch 'drm-intel-fixes' into drm-intel-next
Immediate merge for the conflicting introduction of HAS_COHERENT_RINGS.

Conflicts:
	drivers/gpu/drm/i915/i915_dma.c
	include/drm/i915_drm.h
2010-12-05 10:43:39 +00:00
Daniel Vetter
bbf0c6b362 drm/i915: announce to userspace that the bsd ring is coherent
Otherwise we can't really fix the abi-braindeadness of forcing
libva to manually wait for rendering when switching rings. Which
in turn makes implementing hw semaphores a pointless exercise
(at least for ironlake).

[Also added the relaxed fencing param to explain the jump in
numbering - relaxed fencing is in -next.]

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 10:40:39 +00:00
Chris Wilson
382ab78c0e Merge branch 'drm-intel-fixes' into drm-intel-next 2010-12-05 00:37:43 +00:00
Chris Wilson
f7746f0e1f drm/i915: Enable self-refresh for Ironlake
We disabled this a while ago as it was inexplicably broken. However, it
now appears to work...

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 00:37:39 +00:00
Chris Wilson
1ec14ad313 drm/i915: Implement GPU semaphores for inter-ring synchronisation on SNB
The bulk of the change is to convert the growing list of rings into an
array so that the relationship between the rings and the semaphore sync
registers can be easily computed.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 00:37:38 +00:00
Chris Wilson
340479aac6 drm/i915: Be paranoid and bail on resetting if we can't take the lock.
This will declare the machine wedged, but is better than truly wedging
the machine.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 00:37:38 +00:00
Chris Wilson
4add75c43f drm/i915: Allow LVDS to be on pipe A for Ironlake+
Previously we enabled this for gen4, only to have to revert it due to it
causing a large number of spurious wakeups. Try again hoping that the
hardware has become more sane in the mean time...

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 00:37:37 +00:00
Chris Wilson
f684f5b48c drm/i915: Re-enable RC6 for power-savings.
Let's see if we've successfully cleared up all the bugs from last
time...

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 00:37:37 +00:00
Chris Wilson
c1858123db drm/i915: Enable CB tuning of the Display PLL
Magic numbers from the specs. This is supposed to allow the PLL some
variance to improve jitter performance and VCO headroom across
manufacturing and environmental variations.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 00:37:36 +00:00
Chris Wilson
a589b9f429 drm/i915: Explain why we need to write DPLL twice
... it's because setting the Pixel Multiply bits only takes effect once
the PLL is enabled and stable.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 00:37:35 +00:00
Chris Wilson
17fe698110 drm/i915/lvds: Connect the PWM to the LVDS pipe
... and do not just assume to always use pipe B.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-12-05 00:37:35 +00:00
Chris Wilson
49078f7d10 drm/i915: Factor in pixel-repeat in FDI M/N calculation
Fixes the modesetting on the secondary panel of the Libretto W100 and
presumably many more Ironlake laptops with SDVO LVDS displays.

Reported-and-tested-by: Matthew Willoughby <mattfredwill@gmail.com>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
2010-12-04 13:41:04 +00:00
Chris Wilson
22ed1113a9 drm/i915: Death to the unnecessary 64bit divide
Use the hardware DDA to calculate the ratio with as much accuracy as is
possible.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
2010-12-03 23:51:02 +00:00
Chris Wilson
47f1c6c9ff drm/i915: Clean conflicting modesetting registers upon init
If we leave the registers in a conflicting state then when we attempt
to teardown the active mode, we will not disable the pipes and planes
in the correct order -- leaving a plane reading from a disabled pipe and
possibly leading to undefined behaviour.

Reported-and-tested-by: Andy Whitcroft <apw@canonical.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=32078
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: stable@kernel.org
2010-12-03 17:50:55 +00:00
Francisco Jerez
2e5702aff3 drm/nouveau: fabricate DCB encoder table for iMac G4
In typical Apple fashion there's no standard information about what
encoders are present on this machine, this patch adds a quirk to
provide it.

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:12:01 +10:00
Ben Skeggs
7f4a195fcb drm/nouveau: tidy up and extend dma object creation interfaces
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:59 +10:00
Ben Skeggs
6d6c5a157a drm/nouveau: remove some useless GETPARAMs
These have been unused since UMS support was ripped out, so lets remove
them completely.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:57 +10:00
Ben Skeggs
2cb3d3b6c6 drm/nv84: fix minor issues in PCRYPT implementation
Fix running of destroy_context() when create_context() has never been
called for the channel, and fill in engine's tlb_flush() function pointer.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:56 +10:00
Ben Skeggs
7b4808bb6e drm/nouveau: remove dummy page use from PCI(E)GART, use PTE present instead
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:54 +10:00
Ben Skeggs
9fea1bcbff drm/nv50: fix 0x100c90 init for NVAF
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:52 +10:00
Ben Skeggs
20f63afe98 drm/nv50: allocate page for unknown PFB object in nv50_fb.c
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:50 +10:00
Ben Skeggs
e41115d0ad drm/nouveau: rework gpu-specific instmem interfaces
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:48 +10:00
Ben Skeggs
dc1e5c0dbf drm/nouveau: simplify gpuobj suspend/resume
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:47 +10:00
Ben Skeggs
fce2bad0ee drm/nv50: rework PGPIO IRQ handling and hotplug detection
Allows callers to install their own handlers for when a GPIO line
changes state (such as for hotplug detect).

This also fixes a bug where we weren't acknowledging the GPIO IRQ
until after the bottom half had run, causing a severe IRQ storm
in some cases.

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:45 +10:00
Ben Skeggs
e4cbadcaaa drm/nv04-nv40: unregister irq handler on destroy
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:43 +10:00
Ben Skeggs
274fec93cd drm/nouveau: tidy+move PGRAPH ISRs to their respective *_graph.c files
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:41 +10:00
Ben Skeggs
5178d40dff drm/nouveau: move PFIFO ISR into nv04_fifo.c
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:39 +10:00
Ben Skeggs
25b85783da drm/nv04-nv40: register vblank isr
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:38 +10:00
Ben Skeggs
8cbe71a6e7 drm/nouveau: move bitfield/enum helpers to nouveau_util.c
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:36 +10:00
Ben Skeggs
19b7fc7bf5 drm/nv50: use register/unregister functionality for PDISPLAY ISR
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:34 +10:00
Ben Skeggs
2cbd4c8185 drm/nv50: move GPIO ISR to nv50_gpio.c
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:32 +10:00
Ben Skeggs
d7facf9dc5 drm/nv84: move PCRYPT ISR out of nouveau_irq.c
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:30 +10:00
Ben Skeggs
8f8a54482b drm/nouveau: allow irq handlers to be installed by engine-specific code
Lets start to clean up this mess!

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:29 +10:00
Ben Skeggs
a169f09b96 drm/nv50: 0x50c0 apparently works on NVA3+ too, so lets allow it
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:27 +10:00
Ben Skeggs
aa2c2e8039 drm/nv50: fix compute object class
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:25 +10:00
Francisco Jerez
23c45e8ed2 drm/nouveau: Fix sleep while atomic in nouveau_bo_fence().
Reported-by: Pekka Paalanen <pq@iki.fi>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:23 +10:00
Francisco Jerez
87a326a385 drm/nv20: Add Z compression support.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Tested-by: Xavier Chantry <chantry.xavier@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:21 +10:00
Francisco Jerez
a5cf68b04b drm/nouveau: Rework tile region handling.
The point is to share more code between the PFB/PGRAPH tile region
hooks, and give the hardware specific functions a chance to allocate
per-region resources.

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:20 +10:00
Francisco Jerez
e419cf0954 drm/nouveau: Add a separate class for the kernel channel mutex.
nouveau_bo_move_m2mf() needs to lock the kernel channel, and it may be
called from the pushbuf IOCTL with an user channel already locked. Use
a separate subclass for the kernel channel mutex because this is
legitimate mutex nesting.

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:18 +10:00
Francisco Jerez
1f6d2de2c5 drm/nv50: Keep track of the head a channel is vsync'ing to.
In a multihead setup vblank interrupts may end up enabled in both
heads. In that case we want to ignore the vblank interrupts coming
from the wrong CRTC to avoid tearing and unbalanced calls to
drm_vblank_get/put (fdo bug 31074).

Reported-by: Felix Leimbach <felix.leimbach@gmx.net>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:16 +10:00
Francisco Jerez
1c180fa5bd drm/nouveau: Call drm_vblank_pre/post_modeset() around mode setting.
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2010-12-03 15:11:14 +10:00