There is a current leakage on S5 and LDO XO RF rail during
BT sleep. To prevent the current leakage, L7A/L17A/L25A
should be on during BT sleep. So, change L7A/L17A/L25A LDOs
from pin control version to SW control not to follow HW_EN2.
RFCLK2 has not been turned off during sleep and caused
extra current penalty. For RFCLK2 to follow HW_EN2 pin control,
clk_rf_clk2_pin should be used.
Change-Id: Ie316941535f62afd75eac21280061b489e9196c1
Signed-off-by: Sungjun Park <sjpark@codeaurora.org>
start and end must be page aligned while calling
flush_tlb_kernel_range else the last page may get
missed while invalidation.
Change-Id: Ibaab202c47a475623e197a13191b2fed638ce20b
Signed-off-by: Shiraz Hashim <shashim@codeaurora.org>
Correct the camera dtis place to support multiple chipset
version for msmcobalt skuk device.
Change-Id: I20e12bc1597ad15cb3dc9c3ef18d81d039931e07
Signed-off-by: Wei Ding <weiding@codeaurora.org>
Modify the clock_gcc dummy clock to use the real clock controller for all
global clock controller clients.
Change-Id: Iac989d3c9312654b599d8299206e5478ca454861
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Add IMEM PIL entry to save relocatable address of images
loaded by PIL.
Change-Id: I79acd047c7e414ed19a2f992f8ff801b63c8a2ad
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
Set LAB's precharge time to max 500us to optimize the precharge
behavior as suggested in the hardware documentation.
CRs-Fixed: 1084297
Change-Id: I118f4254686caf498087847916b7710662ab31e7
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Currently, some properties in LABIBB regulator driver are having
prefix "qpnp" which is not reflecting the vendor. Change it to
"qcom" to reflect the vendor name correctly and also match with
other DT properties.
CRs-Fixed: 1071971
Change-Id: I182dddc29f3d7c7b449b56ac7fb84e74061cf3a4
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Add initial set of configuration for GPU mempools
to reserve page pools at init time of kgsl driver.
CRs-Fixed: 1064046
Change-Id: Ie6789e13be7316a0de43538b9e477920fa64c6bb
Signed-off-by: Hareesh Gundu <hareeshg@codeaurora.org>
Convert most of the pmfalcon stub-regulator devices to a
rpm-smd-regulator devices. This ensures that requests made for
these regulators are aggregated by the RPM processor along with
the requests from other processors.
Also, add a dummy gfx_vreg_corner regulator until the CPR node
is added.
While at it, rename all regulators names and add pm/pm2 prefix
to differentiate between regulators on multiple supported PMICs.
Also update all clients with new regulator phandles.
CRs-Fixed: 1077493
Change-Id: I95b17de5bf17b62096d2c9d60633b6b30768752a
Signed-off-by: Ashay Jaiswal <ashayj@codeaurora.org>
A540v1 and v2 both need to enable the LMLOADKILL quirk for the
GPU.
CRs-Fixed: 1036444
Change-Id: I84243578a1ef2f9948f0c9a8c1c00dc6a31eb579
Signed-off-by: Harshdeep Dhatt <hdhatt@codeaurora.org>
Disable lpm sleep modes for msmfalcon emulation platform
at boot time as PMIC related functionality is not emulated.
Change-Id: If2309a590ad37547354c0917dd11a202daa9abe4
Signed-off-by: Raju P.L.S.S.S.N <rplsssn@codeaurora.org>
Add UFS and sdhc2 node for QRD interposer msmcobalt. Config
corresponding GPIO to no pull and change its polarity to
enable SD card detection.
CRs-Fixed: 1086932
Change-Id: Ibf9ac87dc605266a90f7364b6618297e66902b39
Signed-off-by: xiaonian <xiaonian@codeaurora.org>
Add device tree support for msmcobalt interposer platform
using msmfalcon QRD.
CRs-Fixed: 1086541
Change-Id: If17aa7a60832b71a94d75718da07158e1474ef31
Signed-off-by: Zhenhua Huang <zhenhuah@codeaurora.org>
As per the hardware documentation, increase the duration
between attempts to measure ESR as the ESR pulse amplitude got
increased. This is to reduce the power consumption.
Change-Id: I65027413ecb22a1e89e37a12f66c5abda6c3ba28
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
As per the hardware characterization, update the battery empty
voltage threshold to 2.8V. Since this moves the voltage little
away from cutoff voltage, update the empty SOC interrupt handling
to report SOC as 0. Since we only need the rising edge of empty
SOC interrupt, modify the interrupt flag as well.
Change-Id: I665a6f879af4e6b6e9f94b5464be7894d5ea67cb
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Enable VDD_APC CPR aging for msmcobalt v2 and define a CPR
closed-loop and open-loop voltage margin reduction of 15 mV
for CPR local rev 3 parts and greater to account for this
feature being enabled.
CRs-Fixed: 1081084
Change-Id: I50a3ca4e09c6cd6edeb5c15478989e19926c6576
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
Update the default CPR min/max step quotient,
count repeat, consecutive down, and aging RO scaling
factor values for VDD_APC0 and VDD_APC1 to match the latest
hardware guidelines.
CRs-Fixed: 1080409
Change-Id: Ibb35a3f475725af96276389f78abb790ea5b5b81
Signed-off-by: Osvaldo Banuelos <osvaldob@codeaurora.org>
The new diag client requires additional memory from hlos.
This patch caters to diag memory requirement
CRs-Fixed: 1079523
Change-Id: Ie96470b93d879d2c175f18aef25f3e256cd0a322
Signed-off-by: Manoj Prabhu B <bmanoj@codeaurora.org>
