Commit graph

1934 commits

Author SHA1 Message Date
Russell King
05c74a6cbc ARM: SMP: consolidate the common parts of smp_prepare_cpus()
There is a certain amount of smp_prepare_cpus() which doesn't belong
in the platform support code - that is, code which is invariant to the
SMP implementation.  Move this code into arch/arm/kernel/smp.c, and
add a platform_ prefix to the original function.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:09:08 +00:00
Russell King
fd778f0ad7 ARM: SMP: get rid of get_core_count()
We don't need this small function as well as scu_get_core_count()

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:08:27 +00:00
Russell King
8975b6c0fd ARM: SMP: Clean up ncores sanity checks
scu_get_core_count() never returns zero cores, so we don't need to
check and correct if ncores is zero.

Tegra was missing the check against NR_CPUS, leading to a potential
bitfield overflow if this becomes the case.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:08:27 +00:00
Russell King
bbc3d14e9a ARM: SMP: move CPU number sanity checks to smp_init_cpus()
Ensure that the number of CPUs is sanity checked before setting
the number of possible CPUs.  This avoids any chance of overflowing
the cpu_possible bitmap.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-20 15:08:26 +00:00
Santosh Shilimkar
b89cd71a15 omap4: l2x0: Enable early BRESP bit
The AXI protocol specifies that the write response can only
be sent back to an AXI master when the last write data has been
accepted. This optimization enables the PL310 to send the write
response of certain write transactions as soon as the store buffer
accepts the write address. This behavior is not compatible with
the AXI protocol and is disabled by default. You enable this
optimization by setting the Early BRESP Enable bit in the
Auxiliary Control Register (bit [30]).

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Mans Rullgard <mans@mansr.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-18 09:33:01 -08:00
Santosh Shilimkar
b0f20ff9d7 omap4: l2x0: Set share override bit
Clearing bit 22 in the PL310 Auxiliary Control register (shared
attribute override enable) has the side effect of transforming Normal
Shared Non-cacheable reads into Cacheable no-allocate reads.

Coherent DMA buffers in Linux always have a Cacheable alias via the
kernel linear mapping and the processor can speculatively load cache
lines into the PL310 controller. With bit 22 cleared, Non-cacheable
reads would unexpectedly hit such cache lines leading to buffer
corruption

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-18 09:32:55 -08:00
Mans Rullgard
11e0264046 omap4: l2x0: enable instruction and data prefetching
Enabling L2 prefetching improves performance as shown on Panda
ES2.1 board with mem test, and it has measurable impact on
performances. I think we should consider it, even though it damages
"writes" a bit. (rebased to k.org)
Usually the prefetch is used at both levels together L1 + L2, however,
to enable the CP15 prefetch engines, these are under security, and on
GP devices, we cannot enable it(e.g. on PandaBoard). However, just
enabling PL310 prefetch seems to provide performance improvement,
as shown in the data below (from Ubuntu) and would be a great thing
to pull in.

What prefetch does is enable automatic next line prefetching. With this
enabled, whenever the PL310 receives a cachable read request, it
automatically prefetches the following cache line as well.

Measurement Data:
==
STOCK 10.10 WITHOUT PATCH

========================
~# ./memspeed
size    8388608 8192k 8M
offset  8388608, 0
buffers 0x2aaad000 0x2b2ad000
copy  libc          133 MB/s
copy  Android v5    273 MB/s
copy  Android NEON  235 MB/s
copy  INT32         116 MB/s
copy  ASM ARM       187 MB/s
copy  ASM VLDM 64   204 MB/s
copy  ASM VLDM 128  173 MB/s
copy  ASM VLD1      216 MB/s
read  ASM ARM       286 MB/s
read  ASM VLDM      242 MB/s
read  ASM VLD1      286 MB/s
write libc         1947 MB/s
write ASM ARM      1943 MB/s
write ASM VSTM     1942 MB/s
write ASM VST1     1935 MB/s

10.10 + PATCH
=============
~# ./memspeed
size    8388608 8192k 8M
offset  8388608, 0
buffers 0x2ab17000 0x2b317000
copy  libc          129 MB/s
copy  Android v5    256 MB/s
copy  Android NEON  356 MB/s
copy  INT32         127 MB/s
copy  ASM ARM       321 MB/s
copy  ASM VLDM 64   337 MB/s
copy  ASM VLDM 128  321 MB/s
copy  ASM VLD1      350 MB/s
read  ASM ARM       496 MB/s
read  ASM VLDM      470 MB/s
read  ASM VLD1      488 MB/s
write libc         1701 MB/s
write ASM ARM      1682 MB/s
write ASM VSTM     1693 MB/s
write ASM VST1     1681 MB/s

Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-18 09:32:41 -08:00
Santosh Shilimkar
1773e60a81 omap4: l2x0: Construct the AUXCTRL value using defines
This patch removes the hardcoded value of auxctrl value and
construct it using bitfields

Bit 25 is reserved and is always set to 1. Same value
of this bit is retained in this patch

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-18 09:31:59 -08:00
John Rigby
fe297dde5a OMAP4: enable smc instruction in new assembler versions
New assemblers need -march=armv7-a+sec on command line or
.arch_extension sec inline to enable use of the smc instruction.

This patch uses as-instr to check the latter to conditionally
enable the former in AFLAGS for files that use smc.

Checked on both old and new binutils to verify that it does
not break old versions.

Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 17:28:07 -08:00
Bryan Wu
1a6b59232b omap: kill all section mismatch warning for omap2plus_defconfig
This patch will kill following section mismatch warnings:

WARNING: vmlinux.o(.text+0x24a00): Section mismatch in reference from the function zoom_twl_gpio_setup() to the (unknown reference) .init.data:(unknown)
The function zoom_twl_gpio_setup() references
the (unknown reference) __initdata (unknown).
This is often because zoom_twl_gpio_setup lacks a __initdata
annotation or the annotation of (unknown) is wrong.

WARNING: vmlinux.o(.text+0x24bfc): Section mismatch in reference from the function cm_t35_twl_gpio_setup() to the (unknown reference) .init.data:(unknown)
The function cm_t35_twl_gpio_setup() references
the (unknown reference) __initdata (unknown).
This is often because cm_t35_twl_gpio_setup lacks a __initdata
annotation or the annotation of (unknown) is wrong.

WARNING: vmlinux.o(.data+0x1d3e0): Section mismatch in reference from the variable h4_config to the (unknown reference) .init.data:(unknown)
The variable h4_config references
the (unknown reference) __initdata (unknown)
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console,

WARNING: vmlinux.o(.data+0x1dc08): Section mismatch in reference from the variable sdp2430_config to the (unknown reference) .init.data:(unknown)
The variable sdp2430_config references
the (unknown reference) __initdata (unknown)
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console,

WARNING: vmlinux.o(.data+0x1e1d8): Section mismatch in reference from the variable apollon_config to the (unknown reference) .init.data:(unknown)
The variable apollon_config references
the (unknown reference) __initdata (unknown)
If the reference is valid then annotate the
variable with __init* or __refdata (see linux/init.h) or name the variable:
*_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console,

Signed-off-by: Bryan Wu <bryan.wu@canonical.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 17:25:26 -08:00
Ohad Ben-Cohen
7c50152f08 omap: boards w/ wl12xx should select REGULATOR_FIXED_VOLTAGE
Power to the wl12xx wlan device is controlled by a fixed regulator.

Boards that have the wl12xx should select REGULATOR_FIXED_VOLTAGE so
users will not be baffled.

Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 17:02:08 -08:00
Jean Pihet
447b8da5d7 OMAP3: add comments for erratas i540 and i478 workarounds
Add comments and IDs for the following erratas:
- i540: MPU cannot exit from Standby,
- i478: Unexpected Cold-Reset is generated when device is coming
   back from OFF mode

Signed-off-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 16:48:20 -08:00
Tony Lindgren
fea83f6a9b Merge branch 'devel-board' into omap-for-linus 2010-12-17 15:14:02 -08:00
Aaro Koskinen
2d200665c3 arm: omap: add minimal support for RM-680
Add minimal support for Nokia RM-680 board.

Tested with omap2plus_defconfig.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
[tony@atomide.com: updated to remove omap_gpio_init
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 15:13:47 -08:00
Aaro Koskinen
20dbeb1081 arm: omap: sdram-nokia: add 97.6/195.2 MHz timing data
Introduce 97.6/195.2 MHz memory timing data. Based on patches by Eduardo
Valentin, Igor Dmitriev and Juha Keski-Saari.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Cc: Eduardo Valentin <eduardo.valentin@nokia.com>
Cc: Igor Dmitriev <ext-dmitriev.igor@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 15:13:46 -08:00
Aaro Koskinen
15d24e118d arm: omap: sdram-nokia: delete redundant timing data
41.5 MHz SDRAM clock is not usable.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 15:13:46 -08:00
Aaro Koskinen
2b1af87ace arm: omap: sdram-nokia: improve error handling
Actually check for errors: print an error log and return NULL.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 15:13:46 -08:00
Aaro Koskinen
e5f5b5422d arm: omap: sdram-nokia: use array to list timings
Use an array to make it easier to add new values.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 15:13:45 -08:00
Aaro Koskinen
fbd208e977 arm: omap: sdram-nokia: prepare for new memory timings
Rename the current timings to indicate they're for 166 MHz. Based on
patches by Eduardo Valentin and Juha Keski-Saari.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Cc: Eduardo Valentin <eduardo.valentin@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 15:13:45 -08:00
Aaro Koskinen
fcd8d84633 arm: omap: add sdram-nokia.h
Add a header file for Nokia SDRAM functions. Based on patches by Juha
Keski-Saari.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 15:13:44 -08:00
Aaro Koskinen
6c3bc4eb56 arm: omap: rename board-rx51-sdram.c to sdram-nokia.c
Rename the file and functions so that it can be reused by future Nokia
boards. Based on patches by Juha Keski-Saari.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-17 15:13:44 -08:00
Greg Kroah-Hartman
36facadd9e Merge branch 'usb-next' into musb-merge
* usb-next: (132 commits)
  USB: uas: Use GFP_NOIO instead of GFP_KERNEL in I/O submission path
  USB: uas: Ensure we only bind to a UAS interface
  USB: uas: Rename sense pipe and sense urb to status pipe and status urb
  USB: uas: Use kzalloc instead of kmalloc
  USB: uas: Fix up the Sense IU
  usb: musb: core: kill unneeded #include's
  DA8xx: assign name to MUSB IRQ resource
  usb: gadget: g_ncm added
  usb: gadget: f_ncm.c added
  usb: gadget: u_ether: prepare for NCM
  usb: pch_udc: Fix setup transfers with data out
  usb: pch_udc: Fix compile error, warnings and checkpatch warnings
  usb: add ab8500 usb transceiver driver
  USB: gadget: Implement runtime PM for MSM bus glue driver
  USB: gadget: Implement runtime PM for ci13xxx gadget
  USB: gadget: Add USB controller driver for MSM SoC
  USB: gadget: Introduce ci13xxx_udc_driver struct
  USB: gadget: Initialize ci13xxx gadget device's coherent DMA mask
  USB: gadget: Fix "scheduling while atomic" bugs in ci13xxx_udc
  USB: gadget: Separate out PCI bus code from ci13xxx_udc
  ...
2010-12-16 10:05:06 -08:00
Felipe Contreras
1cd25df4e5 OMAP: iommu: make iva2 iommu selectable
It seems dsp-link will do this, and tidspbridge too at some point, but
right now it's not possible to select CONFIG_MPU_BRIDGE_IOMMU.

Cc: Fernando Guzman Lugo <fernando.lugo@ti.com>
Cc: Yogesh Marathe <yogesh_marathe@ti.com>
Signed-off-by: Felipe Contreras <felipe.contreras@nokia.com>
2010-12-15 11:33:31 -06:00
Guzman Lugo, Fernando
c7f4ab26e3 OMAP: iommu: create new api to set valid da range
Some IOMMUs cannot use the whole 0x0 - 0xFFFFFFFF range.
With this new API the valid range can be set.

Signed-off-by: Fernando Guzman Lugo <x0095840@ti.com>
Acked-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com>
2010-12-15 11:29:10 -06:00
Tony Lindgren
df127ee375 omap: Fix setting omap_irq_base for 2430
We need to test for 24xx not 242x. Otherwise interrupts won't work.

Reported-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-14 19:17:31 -08:00
Russell King
7627dc802a ARM: GIC: private a standard get_irqnr_preamble assembler macro
Provide a standard get_irqnr_preamble assembler macro for platforms
to use, which retrieves the base address of the GIC CPU interface
from gic_cpu_base_addr.  Allow platforms to override this by defining
HAVE_GET_IRQNR_PREAMBLE.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14 19:21:47 +00:00
Russell King
ff2e27ae0b ARM: GIC: consolidate gic_cpu_base_addr to common GIC code
Every architecture using the GIC has a gic_cpu_base_addr pointer for
GIC 0 for their entry assembly code to use to decode the cause of the
current interrupt.  Move this into the common GIC code.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14 19:21:42 +00:00
Russell King
384895330e ARM: GIC: Remove MMIO address from gic_cpu_init, rename to gic_secondary_init
We don't need to re-pass the base address for the CPU interfaces to the
GIC for secondary CPUs, as it will never be different from the boot CPU
- and even if it was, we'd overwrite the boot CPU's base address.

Get rid of this argument, and rename to gic_secondary_init().

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14 19:21:40 +00:00
Russell King
b580b899dd ARM: GIC: provide a single initialization function for boot CPU
Provide gic_init() which initializes the GIC distributor and current
CPU's GIC interface for the boot (or single) CPU.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14 19:21:30 +00:00
Paul Walmsley
c2015dc88a OMAP2: PRCM: fix some SHIFT macros that were actually bitmasks
After Charu's GPIO hwmod patches, GPIO initialization on N800 emits
the following messages for all GPIO banks:

omap_hwmod: gpio1: cannot be enabled (3)

This is due to OMAP24XX_ST_GPIOS_SHIFT being defined as a bitmask.
Fix this and also fix two other macros that had the same problem.

Thanks to Tony Lindgren <tony@atomide.com> for originally reporting
this bug.

Signed-off-by: Paul Walmsley <paul@pwsan.com
Cc: Charulatha Varadarajan <charu@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-10 18:04:43 -08:00
Tony Lindgren
79b357c217 Merge branch 'devel-gpio' into omap-for-linus 2010-12-10 11:37:47 -08:00
Tony Lindgren
df1e9d1c21 omap: Split omap_read/write functions for omap1 and omap2+
Otherwise multi-omap1 support for omap1 won't work as the cpu_class_is_omap1()
won't work until the SoC is detected.

Note that eventually these will go away, please use ioremap + read/write instead.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-10 09:46:24 -08:00
Tony Lindgren
67b738ef32 Merge branch 'devel-omap-irq' into omap-for-linus 2010-12-10 09:44:39 -08:00
Tony Lindgren
5d190c4010 omap2+: Initialize omap_irq_base for entry-macro.S from platform code
This way we can use the generic omap SoC detection code instead.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-10 09:42:51 -08:00
Hema HK
09e7200221 arm: OMAP4430: musb: Configure musb to OTG mode
Enabling the musb OTG mode for SDP and PANDA boards.

Signed-off-by: Hema HK <hemahk@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2010-12-10 14:56:41 +02:00
Hema HK
e70357e35c mfd: TWL6030: OMAP4: Registering the TWL6030-usb device
Registering the twl6030-usb transceiver device as a child to twl6030 core.
Removed the NOP transceiver init call from board file.

Populated twl4030_usb_data platform data structure with the function
pointers for OMAP4430 internal PHY operation to be used by twl630-usb driver.

Signed-off-by: Hema HK <hemahk@ti.com>
Cc: Samuel Ortiz <sameo@linux.intel.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2010-12-10 14:46:51 +02:00
Hema HK
4c42fbc99f usb: musb: TWL6030: Selecting TWL6030_USB transceiver
Selecting the twl6030-usb for OMAP4430SDP and OMAP4PANDA boards and
adding OMAP4 internal phy code for compilation

Signed-off-by: Hema HK <hemahk@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2010-12-10 14:45:59 +02:00
Hema HK
c33fad0c37 usb: otg: Adding twl6030-usb transceiver driver for OMAP4430
Adding the twl6030-usb transceiver support for OMAP4 musb driver.

OMAP4 supports 2 types of transceiver interface.

1. UTMI: The PHY is embedded within OMAP4. The transceiver functionality
is split between the twl6030 PMIC chip and OMAP4430. The VBUS, ID pin
sensing and OTG SRP generation part is integrated in TWL6030 and UTMI PHY
functionality is embedded within the OMAP4430.

There is no direct interactions between the MUSB controller and TWL6030
chip to communicate the session-valid, session-end and ID-GND events.
It has to be done through a software by setting/resetting bits in
one of the control module register of OMAP4430 which in turn toggles
the appropriate signals to MUSB controller.

The internal transceiver has functional clocks and
powerdown bits to powerdown the PHY for power saving.

Since there is no option available for having 2 transceiver drivers
for one USB controller, internal PHY specific APIs are passed through
plaform_data function pointers to use in the twl6030-usb transceiver
driver.

2. ULPI interface is provided for off-chip transceivers.

Signed-off-by: Hema HK <hemahk@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2010-12-10 14:43:51 +02:00
Ajay Kumar Gupta
a9c037832e musb: am35x: fix compile error due to control apis
commit 4814ced511 (OMAP:
control: move plat-omap/control.h to mach-omap2/control.h)
moved <plat/control.h> to another location, preventing
drivers from accessing it, so we need to pass function
pointers from arch code to be able to talk to internal
PHY on AM35x.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2010-12-10 10:21:35 +02:00
Felipe Balbi
46960847ef arm: omap4: enable usb on 4430sdp
Let musb work on 4430sdp as well. We can now
test any problems with multi-omap builds.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2010-12-10 10:21:34 +02:00
Felipe Balbi
0349176120 usb: musb: move clock handling to glue layer
musb core doesn't need to know about platform
specific details. So start moving clock
handling to platform glue layer and make
musb core agnostic about that.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2010-12-10 10:21:24 +02:00
Felipe Balbi
18688fbeb0 usb: musb: split tusb6010 to its own platform_driver
Just adding its own platform_driver, not really
using it yet.

When all HW glue layers are converted, more patches
will come to split power management code from musb_core
and move it completely to HW glue layer.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2010-12-10 10:21:14 +02:00
Felipe Balbi
ce40c5767a usb: musb: split am35x to its own platform_driver
Just adding its own platform_driver, not really
using it yet.

When all HW glue layers are converted, more patches
will come to split power management code from musb_core
and move it completely to HW glue layer.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2010-12-10 10:21:13 +02:00
Felipe Balbi
dc09886bfa usb: musb: split omap2430 to its own platform_driver
Just adding its own platform_driver, not really
using it yet.

When all HW glue layers are converted, more patches
will come to split power management code from musb_core
and move it completely to HW glue layer.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2010-12-10 10:21:11 +02:00
Felipe Balbi
05ac10dd68 usb: musb: trivial search and replace patch
change all ocurrences of musb_hdrc to musb-hdrc.

We will call glue layer drivers musb-<glue layer>,
so in order to keep things somewhat standard, let's
change the underscore into a dash.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2010-12-10 10:21:10 +02:00
Felipe Balbi
7c92554642 usb: musb: add Kconfig options for each glue layer
This will make things simpler when choosing which
glue layer to compile. It avoids a lot of magic
around the "default" Kconfig option and lets the
user choose what exactly s/he wants to compile.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2010-12-10 10:21:09 +02:00
Felipe Balbi
1ea7f352d8 arm: omap4: panda: initialize musb
initialize the musb port on pandaboard.

Signed-off-by: Ming Lei <tom.leiming@gmail.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2010-12-10 10:20:46 +02:00
Kevin Hilman
e83df17f17 OMAP2+: PM/serial: fix console semaphore acquire during suspend
commit 0d8e2d0dad (OMAP2+: PM/serial:
hold console semaphore while OMAP UARTs are disabled) added use of the
console semaphore to protect UARTs from being accessed after disabled
during idle, but this causes problems in suspend.

During suspend, the console semaphore is acquired by the console
suspend method (console_suspend()) so the try_acquire_console_sem()
will always fail and suspend will be aborted.

To fix, introduce a check so the console semaphore is only attempted
during idle, and not during suspend.  Also use the same check so that
the console semaphore is not prematurely released during resume.

Thanks to Paul Walmsley for suggesting adding the same check during
resume.

Cc: Paul Walmsley <paul@pwsan.com>
Tested-by: Jean Pihet <j-pihet@ti.com>
Tested-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-09 16:41:29 -08:00
Tony Lindgren
c451278c28 Merge branch 'devel-cleanup' into omap-for-linus 2010-12-09 15:48:03 -08:00
Aaro Koskinen
e281f7ec95 arm: omap2: io: fix clk_get() error check
clk_get() return value should be checked with IS_ERR().

Signed-off-by: Aaro Koskinen <aaro.koskinen@nokia.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2010-12-07 18:12:56 -08:00