3 commits

Author	SHA1	Message	Date
Patrick Fay	6b82744603	Perf: arm64: Use all 6 counters in tracecounters ... Tracecounter code was only displaying the values from the first 4 PMU counters. This patch will display all 6 PMU counter values. Change output strings L2CTR0, L2CTR1 to CTR4, CTR5 respectively. Change-Id: I111355513bf30a2544bf10e4fbfda79f4cf2678c Signed-off-by: Patrick Fay <pfay@codeaurora.org>	2017-03-06 15:46:56 -08:00
Neil Leeder	94d0fa9c7c	Perf: arm64: Refine disable/enable in tracecounters ... Tracecounter code was not disabling counters as early as possible and enabling them as late as possible. Refine the logic so cycles spent inside the handler are lower. This results in more accurate per-process counter values. Change-Id: I5a83028da3c747c30a9e5a0ea3003638beadffec Signed-off-by: Neil Leeder <nleeder@codeaurora.org>	2016-03-23 20:48:18 -07:00
Sheetal Sahasrabudhe	a585783352	Perf: arm64: Add L1 counters to tracepoints ... Create tracepoints framework for collecting L1 counters on per-pid basis. Add hooks into scheduler to invoke collection. Change-Id: I04cbf0c526162e70680573f5f365f8b41d3079ed Signed-off-by: Sheetal Sahasrabudhe <sheetals@codeaurora.org> [satyap: trivial merge conflict resolution] Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>	2016-03-23 20:48:14 -07:00