This fixes a section error on OMAP when the framebuffer is enabled.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* 'for-linus' of git://git390.osdl.marist.edu/pub/scm/linux-2.6:
[S390] tod clock: announce clocksource as perfect
[S390] Rename "idle_time" attribute to "idle_time_us".
[S390] Fix priority mistakes in drivers/s390/cio/cmf.c
[S390] Fix memory detection.
[S390] Fix compile on !CONFIG_SMP.
[S390] device_schedule_callback() for dcssblk.
[S390] Fix smsgiucv init on no iucv machines
[S390] cio: use INIT_WORK to initialize struct work.
* 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux-2.6-lguest:
lguest: tidy up documentation
kernel/futex.c: make 3 functions static
unexport access_process_vm
lguest: make async_hcall() static
With commit 5984a2fc7e kobject_name() is
correctly being used to access the name field of kobj, but that function
needs a pointer to a kobject, not the kobject itself.
Signed-off-by: Robert Schwebel <r.schwebel@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
After Adrian Bunk's "make async_hcall static" moved things around, update
comments to match (aka "make Guest").
Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
The Time of Day clock is the standard time source for s390. It is
- monotonic
- allows very fast reading
- architecture guarantees at least microsecond stepping
- available as part of the architecture
We should announce the rate of tod as 400 to be in sync with the
description found in clocksource.h:
"400-499:Perfect The ideal clocksource. A must-use where available."
This change will prefer tod over less reliable clock sources.
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Seems that people prefer to have the unit encoded in the attribute
name. Also makes parsing easier.
Now we have:
# cat /sys/devices/system/cpu/cpu0/idle_time_us
131473592
instead of
# cat /sys/devices/system/cpu/cpu0/idle_time
131473592 us
Cc: Arjan van de Ven <arjan@infradead.org>
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Yet another patch in the countless series of memory detection fixes:
if the last area of the reported storage size is a hole the detection
loop will loop forever.
Just break chunk detection loop if its end is going to be larger than
reported storage size.
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
Commit fae8b22d3e
"[S390] Add per-cpu idle time / idle count sysfs attributes" causes
a link error on !CONFIG_SMP.
Fix this by adding some #ifdef's. Real fix would be to cleanup the
code since we don't register a cpu on !CONFIG_SMP. But that would
be quite a big patch. For the time being this is good enough.
arch/s390/kernel/built-in.o: In function `do_monitor_call':
(.text+0x50d4): undefined reference to `per_cpu__s390_idle'
arch/s390/kernel/built-in.o: In function `cpu_idle':
(.text+0x518c): undefined reference to `per_cpu__s390_idle'
make: *** [.tmp_vmlinux1] Error 1
Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
In accordance with the newly formalized 32-bit boot protocol, set
%ebx == %ebp == %edi == 0 in order to support future extensions to the
protocol.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
The Jazz machines have to use the PIT timer for dyntick and highresolution
kernels. This may break because currently just like i386 used to do MIPS
uses two separate spinlocks in the actual PIT code and the PC speaker
code. So switch to do it the same that x86 currently does PIT locking.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Fix ISA irq acknowledge.
Make r4030 clockevent code look like other mips clockevent code.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Register A20R clockevent.
Remove PIT timer setup because it doesn't work
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/au1000/pb1200/irqmap.c:101: warning: ignoring return value of 'request_irq', declared with attribute warn_unused_result
And while at it a few coding style cleanups.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Do not include unnecessary headers.
* Do not mention time.README.
* Do not mention mips_timer_ack.
* Make clocksource_mips static. It is now dedicated to c0_timer.
* Initialize clocksource_mips.read statically.
* Remove null_hpt_read.
* Remove an argument of plat_timer_setup. It is just a placeholder.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This adds in the x3proto and magicpanelr2 mach types, plugs in
highlander and rts7751r2d groups, and also hooks up the r2d
subtypes.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
R7780RP can't do byte-sized accesses to CF, so needs to do word
sized access with low-byte masking. This same problem exists
on older versions of the R2D, with the same workaround having
been implemented in 43f4b8c757
there. Follow that change for the highlander boards.
This does not impact R7780MP or SH7785 based Highlander modules.
If you're unfortunate enough to be stuck with an R7780RP, this
patch is for you!
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
It's assumed that .eh_frame is terminated with 4-byte 0 in shared
libraries and executable. It seems to be the case for VDSOs too.
Without this terminator, I saw failures when unwinding from VDSO,
though I don't know how other architectures handle this issue.
For the normal libs, crtendS.o gives this terminator. We can use
such terminating objects. Or we can add a 4-byte 0 with modifying
the linker script like as the patch below.
Signed-off-by: Kaz Kojima <kkojima@rr.iij4u.or.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
While using separate IRQ stacks can cut down on stack consumption,
many users can also use 4k stacks directly without the additional
need of separate stacks for soft and hardirqs.
With this split, we support the same rationale for 4KSTACKS as
m68knommu, with the IRQSTACKS abstraction as per ppc64.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
movca.l is restricted to SH-4 and up only, though compilers that
are unable to support ISA tuning (especially older versions of
binutils) will happily compile in the bogus opcode on older parts.
Conditionalize it to fix SH-3 regressions noted by Kristoffer.
Signed-off-by: Stuart Menefy <stuart.menefy@st.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Re-order the EMAC interrupts in the walnut.dts file so that they are mapped
correctly.
Signed-off-by: Steve Falco <sfalco at harris.com>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
mmu_mapin_ram() loops over total_lowmem to setup page tables. However, if
total_lowmem is less that 16M, the subtraction rolls over and results in
a number just under 4G (because total_lowmem is an unsigned value).
This patch rejigs the loop from countup to countdown to eliminate the
bug.
Special thanks to Magnus Hjorth who wrote the original patch to fix this
bug. This patch improves on his by making the loop code simpler (which
also eliminates the possibility of another rollover at the high end)
and also applies the change to arch/powerpc.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
The 44x family has an interesting "feature" which is a virtually
tagged instruction cache (yuck !). So far, we haven't dealt with
it properly, which means we've been mostly lucky or people didn't
report the problems, unless people have been running custom patches
in their distro...
This is an attempt at fixing it properly. I chose to do it by
setting a global flag whenever we change a PTE that was previously
marked executable, and flush the entire instruction cache upon
return to user space when that happens.
This is a bit heavy handed, but it's hard to do more fine grained
flushes as the icbi instruction, on those processor, for some very
strange reasons (since the cache is virtually mapped) still requires
a valid TLB entry for reading in the target address space, which
isn't something I want to deal with.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
