/* Copyright (c) 2016-2017,2019 The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and * only version 2 as published by the Free Software Foundation. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ /dts-v1/; #include "apq8098-v2.1.dtsi" #include "msm8998-mdss-panels.dtsi" #include "msm8998-cdp.dtsi" / { model = "Qualcomm Technologies, Inc. APQ 8098 V2.1 mediabox"; compatible = "qcom,apq8098-cdp", "qcom,apq8098", "qcom,cdp"; qcom,board-id = <8 1>; }; &spi_10 { status = "disabled"; }; &msm_ath10k_wlan { status = "ok"; }; &mdss_mdp { qcom,mdss-pref-prim-intf = "hdmi"; }; &sde_hdmi { qcom,display-type = "primary"; }; &mdss_fb2 { qcom,cont-splash-memory { linux,contiguous-region = <&cont_splash_mem>; }; }; &slim_aud { tasha_codec { wsa_spkr_sd1: msm_cdc_pinctrll { compatible = "qcom,msm-cdc-pinctrl"; pinctrl-names = "aud_active", "aud_sleep"; pinctrl-0 = <&spkr_1_sd_active_mediabox>; pinctrl-1 = <&spkr_1_sd_sleep_mediabox>; }; wsa_spkr_sd2: msm_cdc_pinctrlr { compatible = "qcom,msm-cdc-pinctrl"; pinctrl-names = "aud_active", "aud_sleep"; pinctrl-0 = <&spkr_2_sd_active_mediabox>; pinctrl-1 = <&spkr_2_sd_sleep_mediabox>; }; }; }; &mdss_dsi { status = "disabled"; }; &sdhc_2 { vdd-supply = <&pm8998_l21>; qcom,vdd-voltage-level = <2950000 2960000>; qcom,vdd-current-level = <200 800000>; vdd-io-supply = <&pm8998_l13>; qcom,vdd-io-voltage-level = <1808000 2960000>; qcom,vdd-io-current-level = <200 22000>; pinctrl-names = "active", "sleep"; pinctrl-0 = <&sdc2_clk_on &sdc2_cmd_on &sdc2_data_on &sdc2_cd_on_mediabox>; pinctrl-1 = <&sdc2_clk_off &sdc2_cmd_off &sdc2_data_off &sdc2_cd_off_mediabox>; qcom,clk-rates = <400000 20000000 25000000 50000000 100000000 200000000>; qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104"; cd-gpios = <&tlmm 86 0x1>; status = "ok"; }; &tspp { qcom,lpass-timer-tts = <1>; }; &snd_9335 { qcom,msm-mi2s-master = <1>, <1>, <1>, <0>; qcom,msm-mbhc-hphl-swh = <1>; }; &wcd_usbc_analog_en1_gpio { status = "disabled"; }; &wcd_usbc_analog_en2n_gpio { status = "disabled"; }; &pcie0 { qcom,boot-option = <0x0>; }; &soc { qcom,msm-dai-mi2s { dai_mi2s3: qcom,msm-dai-q6-mi2s-quat { /* SD0 (1 << 0) | SD1 (1 << 1) | SD2 (1 << 2) */ qcom,msm-mi2s-rx-lines = <0>; qcom,msm-mi2s-tx-lines = <15>; /* SD3 (1 << 3) */ pinctrl-names = "default", "sleep"; pinctrl-0 = <&quat_mi2s_active &quat_mi2s_sd0_active &quat_mi2s_sd1_active &quat_mi2s_sd2_active &quat_mi2s_sd3_active>; pinctrl-1 = <&quat_mi2s_sleep &quat_mi2s_sd0_sleep &quat_mi2s_sd1_sleep &quat_mi2s_sd2_sleep &quat_mi2s_sd3_sleep>; }; }; };