d72a5abb7e
Make the remaining definitions of the 5272 ColdFire registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
107 lines
2.8 KiB
C
107 lines
2.8 KiB
C
/***************************************************************************/
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/*
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* linux/arch/m68knommu/platform/5272/config.c
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*
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* Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
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* Copyright (C) 2001-2002, SnapGear Inc. (www.snapgear.com)
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*/
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/***************************************************************************/
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/phy.h>
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#include <linux/phy_fixed.h>
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#include <asm/machdep.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include <asm/mcfuart.h>
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/***************************************************************************/
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/*
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* Some platforms need software versions of the GPIO data registers.
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*/
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unsigned short ppdata;
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unsigned char ledbank = 0xff;
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/***************************************************************************/
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static void __init m5272_uarts_init(void)
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{
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u32 v;
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/* Enable the output lines for the serial ports */
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v = readl(MCF_MBAR + MCFSIM_PBCNT);
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v = (v & ~0x000000ff) | 0x00000055;
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writel(v, MCF_MBAR + MCFSIM_PBCNT);
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v = readl(MCF_MBAR + MCFSIM_PDCNT);
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v = (v & ~0x000003fc) | 0x000002a8;
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writel(v, MCF_MBAR + MCFSIM_PDCNT);
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}
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/***************************************************************************/
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static void m5272_cpu_reset(void)
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{
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local_irq_disable();
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/* Set watchdog to reset, and enabled */
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__raw_writew(0, MCFSIM_WIRR);
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__raw_writew(1, MCFSIM_WRRR);
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__raw_writew(0, MCFSIM_WCR);
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for (;;)
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/* wait for watchdog to timeout */;
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}
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/***************************************************************************/
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void __init config_BSP(char *commandp, int size)
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{
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#if defined (CONFIG_MOD5272)
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/* Set base of device vectors to be 64 */
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writeb(0x40, MCFSIM_PIVR);
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#endif
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#if defined(CONFIG_NETtel) || defined(CONFIG_SCALES)
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/* Copy command line from FLASH to local buffer... */
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memcpy(commandp, (char *) 0xf0004000, size);
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commandp[size-1] = 0;
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#elif defined(CONFIG_CANCam)
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/* Copy command line from FLASH to local buffer... */
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memcpy(commandp, (char *) 0xf0010000, size);
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commandp[size-1] = 0;
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#endif
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mach_reset = m5272_cpu_reset;
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mach_sched_init = hw_timer_init;
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}
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/***************************************************************************/
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/*
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* Some 5272 based boards have the FEC ethernet diectly connected to
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* an ethernet switch. In this case we need to use the fixed phy type,
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* and we need to declare it early in boot.
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*/
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static struct fixed_phy_status nettel_fixed_phy_status __initdata = {
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.link = 1,
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.speed = 100,
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.duplex = 0,
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};
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/***************************************************************************/
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static int __init init_BSP(void)
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{
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m5272_uarts_init();
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fixed_phy_add(PHY_POLL, 0, &nettel_fixed_phy_status);
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return 0;
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}
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arch_initcall(init_BSP);
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/***************************************************************************/
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