This patch limits the pixel clock to 13.4 MHz - 266 MHz for i.MX6Q and 13.5 MHz - 270 MHz for i.MX6DL, which is the range documented in the HDMI Transmitter chapter of the respective reference manuals. Without this patch, when connected to a monitor capable of 2160p60 modes, dw_hdmi will happily report this mode and the IPU code will cause a division by zero in ipu_di_config_clock when trying to figure out how to divide the 264 MHz HSP clock down to ~600 MHz. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
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.. | ||
dw_hdmi-imx.c | ||
imx-drm-core.c | ||
imx-drm.h | ||
imx-ldb.c | ||
imx-tve.c | ||
ipuv3-crtc.c | ||
ipuv3-plane.c | ||
ipuv3-plane.h | ||
Kconfig | ||
Makefile | ||
parallel-display.c |