android_kernel_oneplus_msm8998/include/linux/phy/phy-qcom-ufs.h
Yaniv Gardi 741bd793f5 scsi: ufs: minimize exposure of ufs header files
Until now, the phy-qcom-ufs-*.* files used ufs data structures and
macros and thus, we had to expose most of them in include/linux/scsi/ufs
path. But now, after removing support for phy 28nm in apq8084 under
kernel 3.14, we can minimize the exposure of code to essential minimum.
To do that, we relocate the ufs.h, unipro.h, ufshcd.h and ufs-qcom.h
files back to reside internally in the driver.

Also this patch contains some very minor changes suggested by the
upstream checkpatch script.

Change-Id: Id2a923a6a0b1c76565c25f2797a666f3a0d1315f
Signed-off-by: Yaniv Gardi <ygardi@codeaurora.org>
[subhashj@codeaurora.org: resolved merge conflicts]
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
[venkatg@codeaurora.org: fixed header includes and other
trivial merge conflicts]
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
2016-03-22 10:58:52 -07:00

60 lines
1.8 KiB
C

/*
* Copyright (c) 2013-2015, Linux Foundation. All rights reserved.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
*/
#ifndef PHY_QCOM_UFS_H_
#define PHY_QCOM_UFS_H_
#include "phy.h"
/**
* ufs_qcom_phy_enable_ref_clk() - Enable the phy
* ref clock.
* @phy: reference to a generic phy
*
* returns 0 for success, and non-zero for error.
*/
int ufs_qcom_phy_enable_ref_clk(struct phy *phy);
/**
* ufs_qcom_phy_disable_ref_clk() - Disable the phy
* ref clock.
* @phy: reference to a generic phy.
*/
void ufs_qcom_phy_disable_ref_clk(struct phy *phy);
/**
* ufs_qcom_phy_enable_dev_ref_clk() - Enable the device
* ref clock.
* @phy: reference to a generic phy.
*/
void ufs_qcom_phy_enable_dev_ref_clk(struct phy *phy);
/**
* ufs_qcom_phy_disable_dev_ref_clk() - Disable the device
* ref clock.
* @phy: reference to a generic phy.
*/
void ufs_qcom_phy_disable_dev_ref_clk(struct phy *phy);
int ufs_qcom_phy_enable_iface_clk(struct phy *phy);
void ufs_qcom_phy_disable_iface_clk(struct phy *phy);
int ufs_qcom_phy_start_serdes(struct phy *phy);
int ufs_qcom_phy_set_tx_lane_enable(struct phy *phy, u32 tx_lanes);
int ufs_qcom_phy_ctrl_rx_linecfg(struct phy *generic_phy, bool ctrl);
int ufs_qcom_phy_calibrate_phy(struct phy *phy, bool is_rate_B);
int ufs_qcom_phy_is_pcs_ready(struct phy *phy);
void ufs_qcom_phy_save_controller_version(struct phy *phy,
u8 major, u16 minor, u16 step);
#endif /* PHY_QCOM_UFS_H_ */