303b5bd525
The performance Monitor Unit on the kryo processor
has additional performance events over the architected
events in ARM processors. This adds support for these
additional events.
Change-Id: I90356b7d2cfebd9d985ec6f92c6d000be9911a7c
Signed-off-by: Neil Leeder <nleeder@codeaurora.org>
[satyap: trivial merge conflict resolution and remove check_event &
map_event functionality to align with kernel 4.4]
Signed-off-by: Satya Durga Srinivasu Prabhala <satyap@codeaurora.org>
58 lines
1.9 KiB
C
58 lines
1.9 KiB
C
/*
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* Copyright (c) 2015 The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __PERF_EVENT_KRYO_H
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#define __PERF_EVENT_KRYO_H
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#define pmactlr_el0 "S3_5_c11_c0_2"
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#define pmresr0l_el0 "S3_5_c11_c3_0"
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#define pmresr0h_el0 "S3_5_c11_c3_1"
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#define pmresr1l_el0 "S3_5_c11_c3_2"
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#define pmresr1h_el0 "S3_5_c11_c3_3"
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#define pmresr2l_el0 "S3_5_c11_c3_4"
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#define pmresr2h_el0 "S3_5_c11_c3_5"
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#define pmxevcntcr_el0 "S3_5_c11_c0_3"
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#define RESR_L 0
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#define RESR_H 1
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#define RESR_ENABLE 0x80000000
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#define ARMV8_PMCR_P 0x00000002 /* Reset counters */
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#define ARMV8_PMCR_C 0x00000004 /* Reset cycle counter */
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#define PMACTLR_UEN 0x00000001
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#define PMUSERENR_UEN 0x00000001
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/*
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event encoding: NRCCG
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n = prefix (1 for Kryo CPU)
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r = register
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cc = code
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g = group
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*/
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#define KRYO_EVT_PREFIX 1
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#define KRYO_EVT_MASK 0x000FFFFF
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#define KRYO_EVT_PREFIX_MASK 0x000F0000
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#define KRYO_EVT_REG_MASK 0x0000F000
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#define KRYO_EVT_CODE_MASK 0x00000FF0
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#define KRYO_EVT_GROUP_MASK 0x0000000F
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#define KRYO_EVT_PREFIX_SHIFT 16
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#define KRYO_EVT_REG_SHIFT 12
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#define KRYO_EVT_CODE_SHIFT 4
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#define KRYO_EVT_GROUP_SHIFT 0
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#define KRYO_MODE_EXCL_MASK 0xC0000000
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#define KRYO_MAX_L1_REG 2
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#define KRYO_MAX_GROUP 7
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#endif
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