android_kernel_oneplus_msm8998/arch/arm/mach-tegra
Murali Nalajala 764f9334a3 cpu_pm: Add level to the cluster pm notification
Cluster pm notifications without level information increases difficulty
and complexity for the registered drivers to figure out when the last
coherency level is going into power collapse.

Send notifications with level information that allows the registered
drivers to easily determine the cluster level that is going in/out of
power collapse.

There is an issue with this implementation. GIC driver saves and
restores the distributed registers as part of cluster notifications. On
newer platforms there are multiple cluster levels are defined (e.g l2,
cci etc). These cluster level notofications can happen independently.
On MSM platforms GIC is still active while the cluster sleeps in idle,
causing the GIC state to be overwritten with an incorrect previous state
of the interrupts. This leads to a system hang. Do not save and restore
on any L2 and higher cache coherency level sleep entry and exit.

Change-Id: I31918d6383f19e80fe3b064cfaf0b55e16b97eb6
Signed-off-by: Archana Sathyakumar <asathyak@codeaurora.org>
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org>
2016-03-22 11:07:20 -07:00
..
board-paz00.c ARM: tegra: paz00: use con_id's to refer GPIO's in gpiod_lookup table 2015-10-02 14:30:57 +02:00
board.h ARM: tegra: Convert PMC to a driver 2014-07-17 14:58:43 +02:00
common.h
cpuidle-tegra20.c ARM: tegra20: Store CPU "resettable" status in IRAM 2015-05-04 12:58:19 +02:00
cpuidle-tegra30.c Power management and ACPI updates for v4.1-rc1 2015-04-14 20:21:54 -07:00
cpuidle-tegra114.c ARM: tegra: cpuidle: implement cpuidle_state.enter_freeze() 2015-08-13 16:53:38 +02:00
cpuidle.c ARM: tegra: Use a function to get the chip ID 2014-07-17 13:36:41 +02:00
cpuidle.h
flowctrl.c ARM: tegra: Initialize flow controller from DT 2014-08-26 11:43:55 -06:00
flowctrl.h ARM: tegra: Initialize flow controller from DT 2014-08-26 11:43:55 -06:00
hotplug.c ARM: Remove __ref on hotplug cpu die path 2015-10-22 09:55:03 -07:00
io.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
iomap.h soc/tegra: fuse: Unify Tegra20 and Tegra30 drivers 2015-07-16 10:38:28 +02:00
irammap.h
irq.c ARM: tegra: remove old LIC support 2015-03-15 00:40:52 +00:00
irq.h ARM: tegra: remove old LIC support 2015-03-15 00:40:52 +00:00
Kconfig clk: tegra: Add functions for parsing CVB tables 2015-07-16 09:32:47 +02:00
Makefile ARM: v7 setup function should invalidate L1 cache 2015-06-01 11:30:26 +01:00
platsmp.c ARM: tegra: Convert PMC to a driver 2014-07-17 14:58:43 +02:00
pm-tegra20.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
pm-tegra30.c ARM: tegra: Sort includes alphabetically 2014-07-17 13:29:57 +02:00
pm.c cpu_pm: Add level to the cluster pm notification 2016-03-22 11:07:20 -07:00
pm.h ARM: tegra: Convert PMC to a driver 2014-07-17 14:58:43 +02:00
reset-handler.S ARM: tegra20: Store CPU "resettable" status in IRAM 2015-05-04 12:58:19 +02:00
reset.c ARM: v7 setup function should invalidate L1 cache 2015-06-01 11:30:26 +01:00
reset.h ARM: SoC: platform support for v4.2 2015-06-26 11:34:35 -07:00
sleep-tegra20.S ARM: tegra20: Store CPU "resettable" status in IRAM 2015-05-04 12:58:19 +02:00
sleep-tegra30.S ARM: tegra: Fix typo (reset -> rest) in comment 2015-05-04 13:25:19 +02:00
sleep.h ARM: tegra20: Store CPU "resettable" status in IRAM 2015-05-04 12:58:19 +02:00
sleep.S ARM: convert all "mov.* pc, reg" to "bx reg" for ARMv6+ 2014-07-18 12:29:04 +01:00
tegra.c soc/tegra: pmc: move to using a restart handler 2015-05-04 14:21:45 +02:00