Andrzej Hajda 3367b08ebc clk: samsung: exynos3250: Fix PLL rates ... [ Upstream commit a8321e7887410a2b2e80ab89d1ef7b30562658ea ] Rates declared in PLL rate tables should match exactly rates calculated from PLL coefficients. If that is not the case, rate of the PLL's child clock might be set not as expected. For instance, if in the PLL rates table we have a 393216000 Hz entry and the real value as returned by the PLL's recalc_rate callback is 393216003, after setting PLL's clk rate to 393216000 clk_get_rate will return 393216003. If we now attempt to set rate of a PLL's child divider clock to 393216000/2 its rate will be 131072001, rather than 196608000. That is, the divider will be set to 3 instead of 2, because 393216003/2 is greater than 196608000. To fix this issue declared rates are changed to exactly match rates generated by the PLL, as calculated from the P, M, S, K coefficients. In this patch an erroneous P value for 74176002 output frequency is also corrected. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Tomasz Figa <tomasz.figa@gmail.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2018-05-30 07:49:16 +02:00
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at91	clk: at91: fix check of clk_register() returned value	2016-06-07 18:14:34 -07:00
bcm	clk: bcm2835: De-assert/assert PLL reset signal when appropriate	2018-04-24 09:32:08 +02:00
berlin	ARM: SoC driver updates for v4.4	2015-11-10 15:00:03 -08:00
h8300	h8300: unaligned divcr register support.	2015-11-08 22:44:37 +09:00
hisilicon	clk: Remove unneeded semicolons	2015-09-17 11:15:14 -07:00
imx	clk: imx6: refine hdmi_isfr's parent to make HDMI work on i.MX6 SoCs w/o VPU	2017-12-20 10:04:59 +01:00
ingenic	clk: ingenic: Include clk.h	2015-07-20 11:11:36 -07:00
keystone	clk: keystone: fix a trivial typo	2015-10-19 15:29:09 -07:00
mediatek	clk: mediatek: add the option for determining PLL source clock	2017-12-20 10:04:59 +01:00
meson	clk: meson: Fix meson_clk_register_clks() signature type mismatch	2016-05-11 11:21:12 +02:00
mmp	clk: mmp: mmp2: fix return value check in mmp2_clk_init()	2016-11-26 09:54:53 +01:00
mvebu	clk: mvebu: armada-38x: add support for missing clocks	2018-04-24 09:32:08 +02:00
mxs	clk:mxs: Fix bug on frequency divider	2015-10-01 15:24:34 -07:00
nxp	clk-divider: make sure read-only dividers do not write to their register	2016-05-11 11:21:11 +02:00
pistachio	clk: pistachio: correct critical clock list	2015-08-26 11:34:43 -07:00
pxa	The clk framework changes for 4.3 are mostly updates to existing drivers	2015-08-31 17:26:48 -07:00
qcom	clk: qcom: msm8916: fix mnd_width for codec_digcodec	2018-03-22 09:23:28 +01:00
rockchip	clk: rockchip: Prevent calculating mmc phase if clock rate is zero	2018-05-30 07:49:14 +02:00
samsung	clk: samsung: exynos3250: Fix PLL rates	2018-05-30 07:49:16 +02:00
shmobile	ARM: SoC platform updates for v4.4	2015-11-10 14:56:23 -08:00
sirf	clk: atlas7: fix noc/socket disconnect/reconnect for unit clks	2015-09-29 08:27:14 -07:00
socfpga	clk: socfpga: Add a second parent option for the dbg_base_clk	2015-08-24 16:49:03 -07:00
spear	The clk framework changes for 4.3 are mostly updates to existing drivers	2015-08-31 17:26:48 -07:00
st	drivers: clk: st: Correct the pll-type for A9 for stih418	2015-10-08 23:52:59 -07:00
sunxi	clk: sunxi: Add apb0 gates for H3	2017-05-02 21:19:47 -07:00
tegra	clk: tegra: Fix cclk_lp divisor register	2017-12-20 10:04:59 +01:00
ti	clk: ti: dra7-atl-clock: fix child-node lookups	2017-11-30 08:37:23 +00:00
ux500	clk/ARM: move Ux500 PRCC bases to the device tree	2015-08-24 16:49:14 -07:00
versatile	clk: versatile: sp810: support reentrance	2016-05-11 11:21:12 +02:00
x86
zte	clk: zx: Constify parent names in clock init data	2015-07-28 11:59:39 -07:00
zynq	ARM: SoC platform updates for v4.3	2015-09-01 12:18:40 -07:00
clk-asm9260.c
clk-axi-clkgen.c	clk: axi-clkgen: Remove clk.h include	2015-07-20 10:52:50 -07:00
clk-axm5516.c
clk-cdce706.c	clk: Convert __clk_get_flags() to clk_hw_get_flags()	2015-08-24 16:48:44 -07:00
clk-cdce925.c	clk: cdce925: Include clk.h	2015-07-20 11:11:32 -07:00
clk-clps711x.c	clk: clps711x: Remove clk.h include	2015-07-20 10:52:53 -07:00
clk-composite.c	clk: Convert basic types to clk_hw based provider APIs	2015-08-24 16:48:48 -07:00
clk-conf.c	clk: Fix __set_clk_rates error print-string	2018-04-13 19:50:16 +02:00
clk-devres.c
clk-divider.c	clk: divider: Fix clk_divider_round_rate() to use clk_readl()	2016-10-31 04:14:01 -06:00
clk-efm32gg.c	clk: efm32gg: Remove clk.h include	2015-07-20 10:52:54 -07:00
clk-fixed-factor.c	clk: Convert basic types to clk_hw based provider APIs	2015-08-24 16:48:48 -07:00
clk-fixed-rate.c
clk-fractional-divider.c	clk: fractional-divider: switch to rational best approximation	2015-10-02 11:29:48 -07:00
clk-gate.c	clk: basic-type: Silence warnings about lock imbalances	2015-07-28 11:59:28 -07:00
clk-gpio.c	clk: gpio: Get parent clk names in of_gpio_clk_setup()	2015-11-18 17:19:01 -08:00
clk-highbank.c	clk: highbank: Include clk.h	2015-07-20 11:11:22 -07:00
clk-ls1x.c
clk-max-gen.c
clk-max-gen.h
clk-max77686.c
clk-max77802.c	clk: max77802: Update MODULE_AUTHOR() email address	2015-10-14 11:31:55 -07:00
clk-mb86s7x.c
clk-moxart.c	clk: moxart: Include clk.h	2015-07-20 11:11:33 -07:00
clk-multiplier.c	clk: Remove clk_{register,unregister}_multiplier()	2015-10-23 13:34:46 -07:00
clk-mux.c	clk: Replace __clk_get_num_parents with clk_hw_get_num_parents()	2015-08-24 16:48:43 -07:00
clk-nomadik.c	clk: nomadik: Remove clk.h and clkdev.h includes	2015-07-20 10:52:57 -07:00
clk-nspire.c
clk-palmas.c	clk: palmas: Remove clkdev.h includes	2015-07-20 10:52:58 -07:00
clk-pwm.c
clk-qoriq.c	clk: qoriq: Don't allow CPU clocks higher than starting value	2016-11-18 10:48:35 +01:00
clk-rk808.c	clk: rk808: Remove clk.h include	2015-07-20 10:53:00 -07:00
clk-s2mps11.c	clk: s2mps11: Use kcalloc instead of kzalloc for array allocation	2015-07-28 11:59:32 -07:00
clk-scpi.c	clk: scpi: fix return type of __scpi_dvfs_round_rate	2018-04-13 19:50:16 +02:00
clk-si514.c	Add driver for the si514 clock generator chip	2015-10-08 23:52:55 -07:00
clk-si570.c	clk: si570: Include clk.h	2015-07-20 11:11:35 -07:00
clk-si5351.c	clk: si5351: Rename internal plls to avoid name collisions	2018-03-24 10:58:48 +01:00
clk-si5351.h
clk-stm32f4.c	clk: stm32f4: Convert to clk_hw based provider APIs	2015-08-24 16:48:51 -07:00
clk-twl6040.c	Merge branch 'cleanup-clk-h-includes' into clk-next	2015-07-28 11:59:09 -07:00
clk-u300.c	clk: u300: Remove clk.h include	2015-07-20 10:53:04 -07:00
clk-vt8500.c
clk-wm831x.c	clk: clk-wm831x: fix a logic error	2017-01-12 11:22:48 +01:00
clk-xgene.c	clk: xgene: Add missing parenthesis when clearing divider value	2016-10-07 15:23:47 +02:00
clk.c	clk: Don't show the incorrect clock phase	2018-05-30 07:49:11 +02:00
clk.h
clkdev.c	clkdev: fix clk_add_alias() with a NULL alias device name	2015-10-20 17:24:08 +01:00
Kconfig	ARM: SoC driver updates for v4.4	2015-11-10 15:00:03 -08:00
Makefile	clk: Make x86/ conditional on CONFIG_COMMON_CLK	2017-05-14 13:32:55 +02:00