Core configuration register IFU_BRUB_RESERVE has to be setup to handle a silicon errata which can result in a CPU hang. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/8902/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
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xlp-hal | ||
xlr | ||
common.h | ||
haldefs.h | ||
interrupt.h | ||
mips-extns.h | ||
psb-bootinfo.h |