5416a88c2f
[ Upstream commit e991c24d68b8c0ba297eeb7af80b1e398e98c33f ] We have quite a lot of code that depends on the order of the __ctl_load inline assemby and subsequent memory accesses, like e.g. disabling lowcore protection and the writing to lowcore. Since the __ctl_load macro does not have memory barrier semantics, nor any other dependencies the compiler is, theoretically, free to shuffle code around. Or in other words: storing to lowcore could happen before lowcore protection is disabled. In order to avoid this class of potential bugs simply add a full memory barrier to the __ctl_load macro. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: Sasha Levin <alexander.levin@verizon.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
77 lines
1.9 KiB
C
77 lines
1.9 KiB
C
/*
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* Copyright IBM Corp. 1999, 2009
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*
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* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
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*/
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#ifndef __ASM_CTL_REG_H
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#define __ASM_CTL_REG_H
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#include <linux/bug.h>
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#define __ctl_load(array, low, high) { \
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typedef struct { char _[sizeof(array)]; } addrtype; \
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\
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BUILD_BUG_ON(sizeof(addrtype) != (high - low + 1) * sizeof(long));\
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asm volatile( \
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" lctlg %1,%2,%0\n" \
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: \
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: "Q" (*(addrtype *)(&array)), "i" (low), "i" (high) \
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: "memory"); \
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}
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#define __ctl_store(array, low, high) { \
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typedef struct { char _[sizeof(array)]; } addrtype; \
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\
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BUILD_BUG_ON(sizeof(addrtype) != (high - low + 1) * sizeof(long));\
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asm volatile( \
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" stctg %1,%2,%0\n" \
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: "=Q" (*(addrtype *)(&array)) \
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: "i" (low), "i" (high)); \
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}
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static inline void __ctl_set_bit(unsigned int cr, unsigned int bit)
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{
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unsigned long reg;
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__ctl_store(reg, cr, cr);
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reg |= 1UL << bit;
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__ctl_load(reg, cr, cr);
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}
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static inline void __ctl_clear_bit(unsigned int cr, unsigned int bit)
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{
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unsigned long reg;
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__ctl_store(reg, cr, cr);
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reg &= ~(1UL << bit);
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__ctl_load(reg, cr, cr);
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}
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void smp_ctl_set_bit(int cr, int bit);
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void smp_ctl_clear_bit(int cr, int bit);
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union ctlreg0 {
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unsigned long val;
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struct {
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unsigned long : 32;
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unsigned long : 3;
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unsigned long lap : 1; /* Low-address-protection control */
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unsigned long : 4;
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unsigned long edat : 1; /* Enhanced-DAT-enablement control */
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unsigned long : 4;
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unsigned long afp : 1; /* AFP-register control */
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unsigned long vx : 1; /* Vector enablement control */
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unsigned long : 17;
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};
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};
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#ifdef CONFIG_SMP
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# define ctl_set_bit(cr, bit) smp_ctl_set_bit(cr, bit)
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# define ctl_clear_bit(cr, bit) smp_ctl_clear_bit(cr, bit)
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#else
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# define ctl_set_bit(cr, bit) __ctl_set_bit(cr, bit)
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# define ctl_clear_bit(cr, bit) __ctl_clear_bit(cr, bit)
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#endif
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#endif /* __ASM_CTL_REG_H */
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