8148b9d900
kernel device tree source code for OnePlus 5 & 5T P device Change-Id: I84f40e66833ea1ce30eb1d9a710d6e1529e9e637
332 lines
6.8 KiB
Text
332 lines
6.8 KiB
Text
/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <dt-bindings/spmi/spmi.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/msm/power-on.h>
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&spmi_bus {
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qcom,pm8998@0 {
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compatible ="qcom,spmi-pmic";
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reg = <0x0 SPMI_USID>;
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#address-cells = <2>;
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#size-cells = <0>;
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pm8998_revid: qcom,revid@100 {
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compatible = "qcom,qpnp-revid";
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reg = <0x100 0x100>;
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};
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qcom,power-on@800 {
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compatible = "qcom,qpnp-power-on";
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reg = <0x800 0x100>;
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interrupts = <0x0 0x8 0x0 IRQ_TYPE_NONE>,
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<0x0 0x8 0x1 IRQ_TYPE_NONE>,
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<0x0 0x8 0x4 IRQ_TYPE_NONE>,
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<0x0 0x8 0x5 IRQ_TYPE_NONE>;
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interrupt-names = "kpdpwr", "resin",
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"resin-bark", "kpdpwr-resin-bark";
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qcom,pon-dbc-delay = <15625>;
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qcom,system-reset;
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qcom,store-hard-reset-reason;
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qcom,pon_1 {
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qcom,pon-type = <0>;
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qcom,pull-up = <1>;
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linux,code = <116>;
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qcom,support-reset = <1>;
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qcom,s1-timer = <10256>;
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qcom,s2-timer = <2000>;
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qcom,s2-type = <7>;
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};
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qcom,pon_2 {
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qcom,pon-type = <1>;
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qcom,pull-up = <1>;
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linux,code = <114>;
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};
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qcom,pon_3 {
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qcom,pon-type = <3>;
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qcom,support-reset = <1>;
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qcom,pull-up = <1>;
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qcom,s1-timer = <6720>;
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qcom,s2-timer = <2000>;
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qcom,s2-type = <PON_POWER_OFF_DVDD_HARD_RESET>;
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qcom,use-bark;
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};
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};
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qcom,temp-alarm@2400 {
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compatible = "qcom,qpnp-temp-alarm";
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reg = <0x2400 0x100>;
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interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_RISING>;
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label = "pm8998_tz";
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qcom,channel-num = <6>;
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qcom,temp_alarm-vadc = <&pm8998_vadc>;
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};
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pm8998_gpios: gpios {
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compatible = "qcom,qpnp-pin";
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gpio-controller;
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#gpio-cells = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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label = "pm8998-gpio";
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gpio@c000 {
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reg = <0xc000 0x100>;
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qcom,pin-num = <1>;
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status = "disabled";
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};
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gpio@c100 {
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reg = <0xc100 0x100>;
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qcom,pin-num = <2>;
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status = "disabled";
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};
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gpio@c200 {
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reg = <0xc200 0x100>;
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qcom,pin-num = <3>;
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status = "disabled";
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};
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gpio@c300 {
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reg = <0xc300 0x100>;
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qcom,pin-num = <4>;
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status = "disabled";
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};
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gpio@c400 {
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reg = <0xc400 0x100>;
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qcom,pin-num = <5>;
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status = "disabled";
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};
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gpio@c500 {
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reg = <0xc500 0x100>;
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qcom,pin-num = <6>;
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status = "disabled";
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};
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gpio@c600 {
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reg = <0xc600 0x100>;
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qcom,pin-num = <7>;
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status = "disabled";
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};
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gpio@c700 {
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reg = <0xc700 0x100>;
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qcom,pin-num = <8>;
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status = "disabled";
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};
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gpio@c800 {
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reg = <0xc800 0x100>;
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qcom,pin-num = <9>;
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status = "disabled";
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};
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gpio@c900 {
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reg = <0xc900 0x100>;
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qcom,pin-num = <10>;
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status = "disabled";
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};
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gpio@ca00 {
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reg = <0xca00 0x100>;
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qcom,pin-num = <11>;
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status = "disabled";
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};
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gpio@cb00 {
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reg = <0xcb00 0x100>;
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qcom,pin-num = <12>;
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status = "disabled";
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};
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gpio@cc00 {
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reg = <0xcc00 0x100>;
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qcom,pin-num = <13>;
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status = "disabled";
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};
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gpio@cd00 {
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reg = <0xcd00 0x100>;
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qcom,pin-num = <14>;
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status = "disabled";
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};
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gpio@ce00 {
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reg = <0xce00 0x100>;
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qcom,pin-num = <15>;
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status = "disabled";
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};
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gpio@cf00 {
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reg = <0xcf00 0x100>;
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qcom,pin-num = <16>;
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status = "disabled";
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};
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gpio@d000 {
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reg = <0xd000 0x100>;
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qcom,pin-num = <17>;
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status = "disabled";
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};
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gpio@d100 {
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reg = <0xd100 0x100>;
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qcom,pin-num = <18>;
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status = "disabled";
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};
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gpio@d200 {
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reg = <0xd200 0x100>;
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qcom,pin-num = <19>;
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status = "disabled";
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};
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gpio@d300 {
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reg = <0xd300 0x100>;
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qcom,pin-num = <20>;
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status = "disabled";
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};
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gpio@d400 {
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reg = <0xd400 0x100>;
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qcom,pin-num = <21>;
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status = "disabled";
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};
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gpio@d500 {
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reg = <0xd500 0x100>;
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qcom,pin-num = <22>;
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status = "disabled";
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};
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gpio@d600 {
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reg = <0xd600 0x100>;
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qcom,pin-num = <23>;
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status = "disabled";
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};
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gpio@d700 {
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reg = <0xd700 0x100>;
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qcom,pin-num = <24>;
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status = "disabled";
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};
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gpio@d800 {
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reg = <0xd800 0x100>;
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qcom,pin-num = <25>;
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status = "disabled";
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};
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gpio@d900 {
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reg = <0xd900 0x100>;
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qcom,pin-num = <26>;
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status = "disabled";
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};
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};
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pm8998_coincell: qcom,coincell@2800 {
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compatible = "qcom,qpnp-coincell";
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reg = <0x2800 0x100>;
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};
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pm8998_rtc: qcom,pm8998_rtc {
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compatible = "qcom,qpnp-rtc";
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#address-cells = <1>;
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#size-cells = <1>;
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qcom,qpnp-rtc-write = <0>;
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qcom,qpnp-rtc-alarm-pwrup = <0>;
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qcom,pm8998_rtc_rw@6000 {
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reg = <0x6000 0x100>;
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};
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qcom,pm8998_rtc_alarm@6100 {
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reg = <0x6100 0x100>;
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interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
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};
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};
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pm8998_vadc: vadc@3100 {
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compatible = "qcom,qpnp-vadc-hc";
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reg = <0x3100 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "eoc-int-en-set";
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qcom,adc-bit-resolution = <15>;
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qcom,adc-vdd-reference = <1875>;
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chan@6 {
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label = "die_temp";
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reg = <6>;
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qcom,decimation = <2>;
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qcom,pre-div-channel-scaling = <0>;
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qcom,calibration-type = "absolute";
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qcom,scale-function = <3>;
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qcom,hw-settle-time = <0>;
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qcom,fast-avg-setup = <0>;
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qcom,cal-val = <0>;
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};
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chan@0 {
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label = "ref_gnd";
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reg = <0>;
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qcom,decimation = <2>;
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qcom,pre-div-channel-scaling = <0>;
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qcom,calibration-type = "absolute";
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qcom,scale-function = <0>;
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qcom,hw-settle-time = <0>;
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qcom,fast-avg-setup = <0>;
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qcom,cal-val = <0>;
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};
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chan@1 {
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label = "ref_1250v";
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reg = <1>;
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qcom,decimation = <2>;
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qcom,pre-div-channel-scaling = <0>;
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qcom,calibration-type = "absolute";
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qcom,scale-function = <0>;
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qcom,hw-settle-time = <0>;
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qcom,fast-avg-setup = <0>;
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qcom,cal-val = <0>;
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};
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};
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pm8998_adc_tm: vadc@3400 {
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compatible = "qcom,qpnp-adc-tm-hc";
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reg = <0x3400 0x100>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupts = <0x0 0x34 0x0 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "eoc-int-en-set";
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qcom,adc-bit-resolution = <15>;
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qcom,adc-vdd-reference = <1875>;
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qcom,adc_tm-vadc = <&pm8998_vadc>;
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qcom,decimation = <0>;
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qcom,fast-avg-setup = <0>;
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};
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};
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qcom,pm8998@1 {
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compatible ="qcom,spmi-pmic";
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reg = <0x1 SPMI_USID>;
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#address-cells = <2>;
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#size-cells = <0>;
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};
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};
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