kernel device tree source code for OnePlus 5 & 5T P device Change-Id: I84f40e66833ea1ce30eb1d9a710d6e1529e9e637
1319 lines
40 KiB
Text
1319 lines
40 KiB
Text
/* Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/*
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* As a general rule, only version-specific property overrides should be placed
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* inside this file. Common device definitions should be placed inside the
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* msm8998.dtsi file.
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*/
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#include "msm8998.dtsi"
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#include "msm8998-v2-camera.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. MSM8998 v2";
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qcom,msm-id = <292 0x20000>;
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};
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&clock_cpu {
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compatible = "qcom,cpu-clock-osm-msm8998-v2";
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reg = <0x179c0000 0x4000>,
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<0x17916000 0x1000>,
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<0x17816000 0x1000>,
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<0x179d1000 0x1000>,
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<0x17914800 0x800>,
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<0x17814800 0x800>,
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<0x00784130 0x8>,
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<0x1791101c 0x8>;
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reg-names = "osm", "pwrcl_pll", "perfcl_pll",
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"apcs_common", "pwrcl_acd", "perfcl_acd",
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"perfcl_efuse", "debug";
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qcom,acdtd-val = <0x00009611 0x00009611>;
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qcom,acdcr-val = <0x002b5ffd 0x002b5ffd>;
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qcom,acdsscr-val = <0x00000501 0x00000501>;
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qcom,acdextint0-val = <0x2cf9ae8 0x2cf9ae8>;
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qcom,acdextint1-val = <0x2cf9afe 0x2cf9afe>;
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qcom,acdautoxfer-val = <0x00000015 0x00000015>;
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qcom,pwrcl-apcs-mem-acc-threshold-voltage = <852000>;
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qcom,perfcl-apcs-mem-acc-threshold-voltage = <852000>;
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qcom,apm-threshold-voltage = <800000>;
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/delete-property/ qcom,llm-sw-overr;
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qcom,pwrcl-speedbin0-v0 =
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< 300000000 0x0004000f 0x01200020 0x1 1 >,
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< 364800000 0x05040013 0x01200020 0x1 2 >,
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< 441600000 0x05040017 0x02200020 0x1 3 >,
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< 518400000 0x0504001b 0x02200020 0x1 4 >,
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< 595200000 0x0504001f 0x02200020 0x1 5 >,
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< 672000000 0x05040023 0x03200020 0x1 6 >,
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< 748800000 0x05040027 0x03200020 0x1 7 >,
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< 825600000 0x0404002b 0x03220022 0x1 8 >,
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< 883200000 0x0404002e 0x04250025 0x1 9 >,
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< 960000000 0x04040032 0x04280028 0x1 10 >,
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< 1036800000 0x04040036 0x042b002b 0x1 11 >,
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< 1094400000 0x04040039 0x052e002e 0x2 12 >,
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< 1171200000 0x0404003d 0x05310031 0x2 13 >,
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< 1248000000 0x04040041 0x05340034 0x2 14 >,
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< 1324800000 0x04040045 0x06370037 0x2 15 >,
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< 1401600000 0x04040049 0x063a003a 0x2 16 >,
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< 1478400000 0x0404004d 0x073e003e 0x2 17 >,
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< 1555200000 0x04040051 0x07410041 0x2 18 >,
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< 1670400000 0x04040057 0x08460046 0x2 19 >,
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< 1747200000 0x0404005b 0x08490049 0x2 20 >,
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< 1824000000 0x0404005f 0x084c004c 0x3 21 >,
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< 1900800000 0x04040063 0x094f004f 0x3 22 >;
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qcom,perfcl-speedbin0-v0 =
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< 300000000 0x0004000f 0x01200020 0x1 1 >,
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< 345600000 0x05040012 0x01200020 0x1 2 >,
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< 422400000 0x05040016 0x02200020 0x1 3 >,
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< 499200000 0x0504001a 0x02200020 0x1 4 >,
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< 576000000 0x0504001e 0x02200020 0x1 5 >,
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< 652800000 0x05040022 0x03200020 0x1 6 >,
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< 729600000 0x05040026 0x03200020 0x1 7 >,
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< 806400000 0x0504002a 0x03220022 0x1 8 >,
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< 902400000 0x0404002f 0x04260026 0x1 9 >,
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< 979200000 0x04040033 0x04290029 0x1 10 >,
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< 1056000000 0x04040037 0x052c002c 0x1 11 >,
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< 1132800000 0x0404003b 0x052f002f 0x1 12 >,
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< 1190400000 0x0404003e 0x05320032 0x2 13 >,
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< 1267200000 0x04040042 0x06350035 0x2 14 >,
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< 1344000000 0x04040046 0x06380038 0x2 15 >,
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< 1420800000 0x0404004a 0x063b003b 0x2 16 >,
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< 1497600000 0x0404004e 0x073e003e 0x2 17 >,
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< 1574400000 0x04040052 0x07420042 0x2 18 >,
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< 1651200000 0x04040056 0x07450045 0x2 19 >,
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< 1728000000 0x0404005a 0x08480048 0x2 20 >,
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< 1804800000 0x0404005e 0x084b004b 0x2 21 >,
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< 1881600000 0x04040062 0x094e004e 0x2 22 >,
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< 1958400000 0x04040066 0x09520052 0x2 23 >,
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< 2035200000 0x0404006a 0x09550055 0x3 24 >,
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< 2112000000 0x0404006e 0x0a580058 0x3 25 >,
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< 2208000000 0x04040073 0x0a5c005c 0x3 26 >,
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< 2265600000 0x04010076 0x0a5e005e 0x3 26 >,
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< 2265600000 0x04040076 0x0a5e005e 0x3 27 >,
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< 2342400000 0x0401007a 0x0a620062 0x3 27 >,
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< 2342400000 0x0404007a 0x0a620062 0x3 28 >,
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< 2419200000 0x0401007e 0x0a650065 0x3 28 >,
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< 2419200000 0x0404007e 0x0a650065 0x3 29 >,
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< 2496000000 0x04010082 0x0a680068 0x3 29 >,
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< 2457600000 0x04040080 0x0a660066 0x3 30 >,
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< 2553600000 0x04010085 0x0a6a006a 0x3 30 >,
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< 2476800000 0x04040081 0x0a670067 0x3 31 >,
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< 2572800000 0x04010086 0x0a6b006b 0x3 31 >,
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< 2496000000 0x04040082 0x0a680068 0x3 32 >,
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< 2592000000 0x04010087 0x0a6c006c 0x3 32 >;
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qcom,perfcl-speedbin1-v0 =
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< 300000000 0x0004000f 0x01200020 0x1 1 >,
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< 345600000 0x05040012 0x01200020 0x1 2 >,
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< 422400000 0x05040016 0x02200020 0x1 3 >,
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< 499200000 0x0504001a 0x02200020 0x1 4 >,
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< 576000000 0x0504001e 0x02200020 0x1 5 >,
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< 652800000 0x05040022 0x03200020 0x1 6 >,
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< 729600000 0x05040026 0x03200020 0x1 7 >,
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< 806400000 0x0504002a 0x03220022 0x1 8 >,
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< 902400000 0x0404002f 0x04260026 0x1 9 >,
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< 979200000 0x04040033 0x04290029 0x1 10 >,
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< 1056000000 0x04040037 0x052c002c 0x1 11 >,
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< 1132800000 0x0404003b 0x052f002f 0x1 12 >,
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< 1190400000 0x0404003e 0x05320032 0x2 13 >,
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< 1267200000 0x04040042 0x06350035 0x2 14 >,
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< 1344000000 0x04040046 0x06380038 0x2 15 >,
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< 1420800000 0x0404004a 0x063b003b 0x2 16 >,
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< 1497600000 0x0404004e 0x073e003e 0x2 17 >,
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< 1574400000 0x04040052 0x07420042 0x2 18 >,
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< 1651200000 0x04040056 0x07450045 0x2 19 >,
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< 1728000000 0x0404005a 0x08480048 0x2 20 >,
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< 1804800000 0x0404005e 0x084b004b 0x2 21 >,
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< 1881600000 0x04040062 0x094e004e 0x2 22 >,
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< 1958400000 0x04040066 0x09520052 0x2 23 >,
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< 2035200000 0x0404006a 0x09550055 0x3 24 >,
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< 2112000000 0x0404006e 0x0a580058 0x3 25 >,
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< 2208000000 0x04040073 0x0a5c005c 0x3 26 >,
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< 2304000000 0x04010078 0x0a600060 0x3 26 >;
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qcom,perfcl-speedbin2-v0 =
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< 300000000 0x0004000f 0x01200020 0x1 1 >,
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< 345600000 0x05040012 0x01200020 0x1 2 >,
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< 422400000 0x05040016 0x02200020 0x1 3 >,
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< 499200000 0x0504001a 0x02200020 0x1 4 >,
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< 576000000 0x0504001e 0x02200020 0x1 5 >,
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< 652800000 0x05040022 0x03200020 0x1 6 >,
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< 729600000 0x05040026 0x03200020 0x1 7 >,
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< 806400000 0x0504002a 0x03220022 0x1 8 >,
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< 902400000 0x0404002f 0x04260026 0x1 9 >,
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< 979200000 0x04040033 0x04290029 0x1 10 >,
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< 1056000000 0x04040037 0x052c002c 0x1 11 >,
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< 1132800000 0x0404003b 0x052f002f 0x1 12 >,
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< 1190400000 0x0404003e 0x05320032 0x2 13 >,
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< 1267200000 0x04040042 0x06350035 0x2 14 >,
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< 1344000000 0x04040046 0x06380038 0x2 15 >,
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< 1420800000 0x0404004a 0x063b003b 0x2 16 >,
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< 1497600000 0x0404004e 0x073e003e 0x2 17 >,
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< 1574400000 0x04040052 0x07420042 0x2 18 >,
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< 1651200000 0x04040056 0x07450045 0x2 19 >,
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< 1728000000 0x0404005a 0x08480048 0x2 20 >,
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< 1804800000 0x0404005e 0x084b004b 0x2 21 >,
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< 1881600000 0x04040062 0x094e004e 0x2 22 >,
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< 1958400000 0x04040066 0x09520052 0x2 23 >,
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< 2035200000 0x0404006a 0x09550055 0x3 24 >,
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< 2112000000 0x0404006e 0x0a580058 0x3 25 >,
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< 2208000000 0x04040073 0x0a5c005c 0x3 26 >,
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< 2265600000 0x04010076 0x0a5e005e 0x3 26 >,
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< 2265600000 0x04040076 0x0a5e005e 0x3 27 >,
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< 2342400000 0x0401007a 0x0a620062 0x3 27 >,
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< 2323200000 0x04040079 0x0a610061 0x3 28 >,
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< 2419200000 0x0401007e 0x0a650065 0x3 28 >,
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< 2342400000 0x0404007a 0x0a620062 0x3 29 >,
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< 2438400000 0x0401007f 0x0a660066 0x3 29 >,
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< 2361600000 0x0404007b 0x0a620062 0x3 30 >,
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< 2457600000 0x04010080 0x0a660066 0x3 30 >;
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qcom,perfcl-speedbin3-v0 =
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< 300000000 0x0004000f 0x01200020 0x1 1 >,
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< 345600000 0x05040012 0x01200020 0x1 2 >,
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< 422400000 0x05040016 0x02200020 0x1 3 >,
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< 499200000 0x0504001a 0x02200020 0x1 4 >,
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< 576000000 0x0504001e 0x02200020 0x1 5 >,
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< 652800000 0x05040022 0x03200020 0x1 6 >,
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< 729600000 0x05040026 0x03200020 0x1 7 >,
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< 806400000 0x0504002a 0x03220022 0x1 8 >,
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< 902400000 0x0404002f 0x04260026 0x1 9 >,
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< 979200000 0x04040033 0x04290029 0x1 10 >,
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< 1056000000 0x04040037 0x052c002c 0x1 11 >,
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< 1132800000 0x0404003b 0x052f002f 0x1 12 >,
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< 1190400000 0x0404003e 0x05320032 0x2 13 >,
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< 1267200000 0x04040042 0x06350035 0x2 14 >,
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< 1344000000 0x04040046 0x06380038 0x2 15 >,
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< 1420800000 0x0404004a 0x063b003b 0x2 16 >,
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< 1497600000 0x0404004e 0x073e003e 0x2 17 >,
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< 1574400000 0x04040052 0x07420042 0x2 18 >,
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< 1651200000 0x04040056 0x07450045 0x2 19 >,
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< 1728000000 0x0404005a 0x08480048 0x2 20 >,
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< 1804800000 0x0404005e 0x084b004b 0x2 21 >,
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< 1881600000 0x04040062 0x094e004e 0x2 22 >,
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< 1958400000 0x04040066 0x09520052 0x2 23 >,
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< 2035200000 0x0404006a 0x09550055 0x3 24 >,
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< 2112000000 0x0404006e 0x0a580058 0x3 25 >,
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< 2208000000 0x04040073 0x0a5c005c 0x3 26 >,
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< 2265600000 0x04010076 0x0a5e005e 0x3 26 >,
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< 2265600000 0x04040076 0x0a5e005e 0x3 27 >,
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< 2342400000 0x0401007a 0x0a620062 0x3 27 >,
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< 2323200000 0x04040079 0x0a610061 0x3 28 >,
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< 2419200000 0x0401007e 0x0a650065 0x3 28 >,
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< 2342400000 0x0404007a 0x0a620062 0x3 29 >,
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< 2438400000 0x0401007f 0x0a660066 0x3 29 >,
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< 2361600000 0x0404007b 0x0a620062 0x3 30 >,
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< 2457600000 0x04010080 0x0a660066 0x3 30 >;
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};
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&msm_cpufreq {
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qcom,cpufreq-table-0 =
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< 300000 >,
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< 364800 >,
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< 441600 >,
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< 518400 >,
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< 595200 >,
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< 672000 >,
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< 748800 >,
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< 825600 >,
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< 883200 >,
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< 960000 >,
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< 1036800 >,
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< 1094400 >,
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< 1171200 >,
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< 1248000 >,
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< 1324800 >,
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< 1401600 >,
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< 1478400 >,
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< 1555200 >,
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< 1670400 >,
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< 1747200 >,
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< 1824000 >,
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< 1900800 >;
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qcom,cpufreq-table-4 =
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< 300000 >,
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< 345600 >,
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< 422400 >,
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< 499200 >,
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< 576000 >,
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< 652800 >,
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< 729600 >,
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< 806400 >,
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< 902400 >,
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< 979200 >,
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< 1056000 >,
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< 1132800 >,
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< 1190400 >,
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< 1267200 >,
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< 1344000 >,
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< 1420800 >,
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< 1497600 >,
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< 1574400 >,
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< 1651200 >,
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< 1728000 >,
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< 1804800 >,
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< 1881600 >,
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< 1958400 >,
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< 2035200 >,
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< 2112000 >,
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< 2208000 >,
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< 2265600 >,
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< 2304000 >,
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< 2323200 >,
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< 2342400 >,
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< 2361600 >,
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< 2419200 >,
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< 2457600 >,
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< 2476800 >,
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< 2496000 >,
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< 2592000 >;
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};
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&bwmon {
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compatible = "qcom,bimc-bwmon4";
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qcom,hw-timer-hz = <19200000>;
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};
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&devfreq_cpufreq {
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mincpubw-cpufreq {
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cpu-to-dev-map-0 =
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< 1900800 1525 >;
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cpu-to-dev-map-4 =
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< 2112000 1525 >,
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< 2342400 5195 >,
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< 2496000 13763 >;
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};
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};
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&devfreq_memlat_0 {
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qcom,core-dev-table =
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< 300000 1525 >,
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< 595200 3143 >,
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< 1324800 4173 >,
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< 1555200 5859 >,
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< 1747200 5859 >,
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< 1900800 7759 >;
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};
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&devfreq_memlat_4 {
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qcom,core-dev-table =
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< 576000 3143 >,
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< 1132800 4173 >,
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< 1344000 5859 >,
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< 1728000 7759 >,
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< 1958400 11863 >,
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< 2208000 13763 >;
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};
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&clock_gcc {
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compatible = "qcom,gcc-8998-v2";
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};
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&clock_mmss {
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compatible = "qcom,mmsscc-8998-v2";
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};
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&clock_gpu {
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compatible = "qcom,gpucc-8998-v2";
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};
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&clock_gfx {
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compatible = "qcom,gfxcc-8998-v2";
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qcom,gfxfreq-speedbin0 =
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< 0 0 0 >,
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< 180000000 1 RPM_SMD_REGULATOR_LEVEL_SVS >,
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< 257000000 2 RPM_SMD_REGULATOR_LEVEL_SVS >,
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< 342000000 3 RPM_SMD_REGULATOR_LEVEL_SVS >,
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< 414000000 4 RPM_SMD_REGULATOR_LEVEL_SVS >,
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< 515000000 5 RPM_SMD_REGULATOR_LEVEL_NOM >,
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< 596000000 6 RPM_SMD_REGULATOR_LEVEL_NOM >,
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< 670000000 7 RPM_SMD_REGULATOR_LEVEL_TURBO >,
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< 710000000 8 RPM_SMD_REGULATOR_LEVEL_TURBO >;
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qcom,gfxfreq-mx-speedbin0 =
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< 0 0 >,
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< 180000000 RPM_SMD_REGULATOR_LEVEL_SVS >,
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< 257000000 RPM_SMD_REGULATOR_LEVEL_SVS >,
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< 342000000 RPM_SMD_REGULATOR_LEVEL_SVS >,
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< 414000000 RPM_SMD_REGULATOR_LEVEL_SVS >,
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< 515000000 RPM_SMD_REGULATOR_LEVEL_NOM >,
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< 596000000 RPM_SMD_REGULATOR_LEVEL_NOM >,
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< 670000000 RPM_SMD_REGULATOR_LEVEL_TURBO >,
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< 710000000 RPM_SMD_REGULATOR_LEVEL_TURBO >;
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};
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&mdss_mdp {
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qcom,vbif-settings = <0x00d0 0x00002020>;
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qcom,max-bandwidth-low-kbps = <9400000>;
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qcom,max-bandwidth-high-kbps = <9400000>;
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qcom,max-bandwidth-per-pipe-kbps = <4700000>;
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};
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&pm8998_s10 {
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regulator-min-microvolt = <568000>;
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regulator-max-microvolt = <1056000>;
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};
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&pm8998_s13 {
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regulator-min-microvolt = <568000>;
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regulator-max-microvolt = <1136000>;
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|
};
|
|
|
|
&pcie0 {
|
|
qcom,phy-sequence = <0x804 0x01 0x00
|
|
0x034 0x14 0x00
|
|
0x138 0x30 0x00
|
|
0x048 0x0f 0x00
|
|
0x15c 0x06 0x00
|
|
0x090 0x01 0x00
|
|
0x088 0x20 0x00
|
|
0x0f0 0x00 0x00
|
|
0x0f8 0x01 0x00
|
|
0x0f4 0xc9 0x00
|
|
0x11c 0xff 0x00
|
|
0x120 0x3f 0x00
|
|
0x164 0x01 0x00
|
|
0x154 0x00 0x00
|
|
0x148 0x0a 0x00
|
|
0x05C 0x19 0x00
|
|
0x038 0x90 0x00
|
|
0x0b0 0x82 0x00
|
|
0x0c0 0x03 0x00
|
|
0x0bc 0x55 0x00
|
|
0x0b8 0x55 0x00
|
|
0x0a0 0x00 0x00
|
|
0x09c 0x0d 0x00
|
|
0x098 0x04 0x00
|
|
0x13c 0x00 0x00
|
|
0x060 0x08 0x00
|
|
0x068 0x16 0x00
|
|
0x070 0x34 0x00
|
|
0x15c 0x06 0x00
|
|
0x138 0x33 0x00
|
|
0x03c 0x02 0x00
|
|
0x040 0x07 0x00
|
|
0x080 0x04 0x00
|
|
0x0dc 0x00 0x00
|
|
0x0d8 0x3f 0x00
|
|
0x00c 0x09 0x00
|
|
0x010 0x01 0x00
|
|
0x01c 0x40 0x00
|
|
0x020 0x01 0x00
|
|
0x014 0x02 0x00
|
|
0x018 0x00 0x00
|
|
0x024 0x7e 0x00
|
|
0x028 0x15 0x00
|
|
0x244 0x02 0x00
|
|
0x2a4 0x12 0x00
|
|
0x260 0x10 0x00
|
|
0x28c 0x06 0x00
|
|
0x504 0x03 0x00
|
|
0x500 0x1c 0x00
|
|
0x50c 0x14 0x00
|
|
0x4d4 0x0a 0x00
|
|
0x4d8 0x04 0x00
|
|
0x4dc 0x1a 0x00
|
|
0x434 0x4b 0x00
|
|
0x414 0x04 0x00
|
|
0x40c 0x04 0x00
|
|
0x4f8 0x00 0x00
|
|
0x4fc 0x80 0x00
|
|
0x51c 0x40 0x00
|
|
0x444 0x71 0x00
|
|
0x43c 0x40 0x00
|
|
0x854 0x04 0x00
|
|
0x62c 0x52 0x00
|
|
0x9ac 0x00 0x00
|
|
0x8a0 0x01 0x00
|
|
0x9e0 0x00 0x00
|
|
0x9dc 0x20 0x00
|
|
0x9a8 0x00 0x00
|
|
0x8a4 0x01 0x00
|
|
0x8a8 0x73 0x00
|
|
0x9d8 0x99 0x00
|
|
0x9b0 0x03 0x00
|
|
0x804 0x03 0x00
|
|
0x800 0x00 0x00
|
|
0x808 0x03 0x00>;
|
|
};
|
|
|
|
&apc0_cpr {
|
|
compatible = "qcom,cprh-msm8998-v2-kbss-regulator";
|
|
qcom,cpr-corner-switch-delay-time = <1042>;
|
|
qcom,cpr-aging-ref-voltage = <1056000>;
|
|
qcom,apm-threshold-voltage = <800000>;
|
|
qcom,apm-hysteresis-voltage = <0>;
|
|
qcom,mem-acc-threshold-voltage = <852000>;
|
|
qcom,mem-acc-crossover-voltage = <852000>;
|
|
};
|
|
|
|
&apc0_pwrcl_vreg {
|
|
regulator-max-microvolt = <23>;
|
|
|
|
qcom,cpr-fuse-combos = <32>;
|
|
qcom,cpr-speed-bins = <4>;
|
|
qcom,cpr-speed-bin-corners = <22 22 22 22>;
|
|
qcom,cpr-corners = <22>;
|
|
|
|
qcom,cpr-corner-fmax-map = <8 11 18 22>;
|
|
|
|
qcom,cpr-voltage-ceiling =
|
|
<828000 828000 828000 828000 828000
|
|
828000 828000 828000 828000 828000
|
|
828000 900000 900000 900000 900000
|
|
900000 900000 900000 952000 952000
|
|
1056000 1056000>;
|
|
|
|
qcom,cpr-voltage-floor =
|
|
<568000 568000 568000 568000 568000
|
|
568000 568000 568000 568000 568000
|
|
568000 632000 632000 632000 632000
|
|
632000 632000 632000 712000 712000
|
|
772000 772000>;
|
|
|
|
qcom,cpr-floor-to-ceiling-max-range =
|
|
<32000 32000 32000 32000
|
|
32000 32000 32000 32000
|
|
32000 32000 32000 32000
|
|
32000 32000 32000 32000
|
|
32000 32000 40000 40000
|
|
40000 40000>;
|
|
|
|
qcom,corner-frequencies =
|
|
<300000000 364800000 441600000
|
|
518400000 595200000 672000000
|
|
748800000 825600000 883200000
|
|
960000000 1036800000 1094400000
|
|
1171200000 1248000000 1324800000
|
|
1401600000 1478400000 1555200000
|
|
1670400000 1747200000 1824000000
|
|
1900800000>;
|
|
|
|
qcom,cpr-ro-scaling-factor =
|
|
<2595 2794 2577 2762 2471 2674 2199
|
|
2553 3189 3255 3192 2962 3054 2982
|
|
2042 2945>,
|
|
<2595 2794 2577 2762 2471 2674 2199
|
|
2553 3189 3255 3192 2962 3054 2982
|
|
2042 2945>,
|
|
<2391 2550 2483 2638 2382 2564 2259
|
|
2555 2766 3041 2988 2935 2873 2688
|
|
2013 2784>,
|
|
<2066 2153 2300 2434 2220 2386 2288
|
|
2465 2028 2511 2487 2734 2554 2117
|
|
1892 2377>;
|
|
|
|
qcom,cpr-open-loop-voltage-fuse-adjustment =
|
|
/* Speed bin 0 */
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
/* Speed bin 1 */
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
/* Speed bin 2 */
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
/* Speed bin 3 */
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>,
|
|
<40000 24000 12000 30000>;
|
|
|
|
qcom,cpr-closed-loop-voltage-fuse-adjustment =
|
|
/* Speed bin 0 */
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
/* Speed bin 1 */
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
/* Speed bin 2 */
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
/* Speed bin 3 */
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>,
|
|
<20000 26000 12000 30000>;
|
|
|
|
qcom,cpr-open-loop-voltage-adjustment =
|
|
/* Speed bin 0 */
|
|
< 0 0 0 0 0
|
|
0 0 0 0 0
|
|
0 (-12000) (-12000) (-12000) (-12000)
|
|
(-12000) (-16000) (-16000) (-20000) (-24000)
|
|
(-28000) (-28000)>,
|
|
/* Speed bin 1 */
|
|
< 0 0 0 0 0
|
|
0 0 0 0 0
|
|
0 (-12000) (-12000) (-12000) (-12000)
|
|
(-12000) (-16000) (-16000) (-20000) (-24000)
|
|
(-28000) (-28000)>,
|
|
/* Speed bin 2 */
|
|
< 0 0 0 0 0
|
|
0 0 0 0 0
|
|
0 (-12000) (-12000) (-12000) (-12000)
|
|
(-12000) (-16000) (-16000) (-20000) (-24000)
|
|
(-28000) (-28000)>,
|
|
/* Speed bin 3 */
|
|
< 0 0 0 0 0
|
|
0 0 0 0 0
|
|
0 (-12000) (-12000) (-12000) (-12000)
|
|
(-12000) (-16000) (-16000) (-20000) (-24000)
|
|
(-28000) (-28000)>;
|
|
|
|
qcom,cpr-closed-loop-voltage-adjustment =
|
|
/* Speed bin 0 */
|
|
< 0 0 0 0 0
|
|
0 0 0 0 0
|
|
0 (-10000) (-11000) (-12000) (-13000)
|
|
(-14000) (-14000) (-15000) (-21000) (-24000)
|
|
(-26000) (-28000)>,
|
|
/* Speed bin 1 */
|
|
< 0 0 0 0 0
|
|
0 0 0 0 0
|
|
0 (-10000) (-11000) (-12000) (-13000)
|
|
(-14000) (-14000) (-15000) (-21000) (-24000)
|
|
(-26000) (-28000)>,
|
|
/* Speed bin 2 */
|
|
< 0 0 0 0 0
|
|
0 0 0 0 0
|
|
0 (-10000) (-11000) (-12000) (-13000)
|
|
(-14000) (-14000) (-15000) (-21000) (-24000)
|
|
(-26000) (-28000)>,
|
|
/* Speed bin 3 */
|
|
< 0 0 0 0 0
|
|
0 0 0 0 0
|
|
0 (-10000) (-11000) (-12000) (-13000)
|
|
(-14000) (-14000) (-15000) (-21000) (-24000)
|
|
(-26000) (-28000)>;
|
|
|
|
qcom,allow-voltage-interpolation;
|
|
qcom,allow-quotient-interpolation;
|
|
qcom,cpr-scaled-open-loop-voltage-as-ceiling;
|
|
|
|
qcom,cpr-aging-ref-corner = <22>;
|
|
qcom,cpr-aging-ro-scaling-factor = <1620>;
|
|
qcom,allow-aging-voltage-adjustment = <0>;
|
|
};
|
|
|
|
&apc1_cpr {
|
|
compatible = "qcom,cprh-msm8998-v2-kbss-regulator";
|
|
qcom,cpr-corner-switch-delay-time = <1042>;
|
|
qcom,cpr-aging-ref-voltage = <1136000>;
|
|
qcom,apm-threshold-voltage = <800000>;
|
|
qcom,apm-hysteresis-voltage = <0>;
|
|
qcom,mem-acc-threshold-voltage = <852000>;
|
|
qcom,mem-acc-crossover-voltage = <852000>;
|
|
};
|
|
|
|
&apc1_perfcl_vreg {
|
|
regulator-max-microvolt = <34>;
|
|
|
|
qcom,cpr-fuse-combos = <32>;
|
|
qcom,cpr-speed-bins = <4>;
|
|
qcom,cpr-speed-bin-corners = <32 26 30 31>;
|
|
qcom,cpr-corners =
|
|
/* Speed bin 0 */
|
|
<32 32 32 32 32 32 32 32>,
|
|
/* Speed bin 1 */
|
|
<26 26 26 26 26 26 26 26>,
|
|
/* Speed bin 2 */
|
|
<30 30 30 30 30 30 30 30>,
|
|
/* Speed bin 3 */
|
|
<31 31 31 31 31 31 31 31>;
|
|
|
|
qcom,cpr-corner-fmax-map =
|
|
/* Speed bin 0 */
|
|
<8 12 20 32>,
|
|
/* Speed bin 1 */
|
|
<8 12 20 26>,
|
|
/* Speed bin 2 */
|
|
<8 12 20 30>,
|
|
/* Speed bin 3 */
|
|
<8 12 20 31>;
|
|
|
|
qcom,cpr-voltage-ceiling =
|
|
/* Speed bin 0 */
|
|
<828000 828000 828000 828000 828000
|
|
828000 828000 828000 828000 828000
|
|
828000 828000 900000 900000 900000
|
|
900000 900000 900000 900000 900000
|
|
952000 952000 952000 1136000 1136000
|
|
1136000 1136000 1136000 1136000 1136000
|
|
1136000 1136000>,
|
|
/* Speed bin 1 */
|
|
<828000 828000 828000 828000 828000
|
|
828000 828000 828000 828000 828000
|
|
828000 828000 900000 900000 900000
|
|
900000 900000 900000 900000 900000
|
|
952000 952000 952000 1136000 1136000
|
|
1136000>,
|
|
/* Speed bin 2 */
|
|
<828000 828000 828000 828000 828000
|
|
828000 828000 828000 828000 828000
|
|
828000 828000 900000 900000 900000
|
|
900000 900000 900000 900000 900000
|
|
952000 952000 952000 1136000 1136000
|
|
1136000 1136000 1136000 1136000 1136000>,
|
|
/* Speed bin 3 */
|
|
<828000 828000 828000 828000 828000
|
|
828000 828000 828000 828000 828000
|
|
828000 828000 900000 900000 900000
|
|
900000 900000 900000 900000 900000
|
|
952000 952000 952000 1136000 1136000
|
|
1136000 1136000 1136000 1136000 1136000
|
|
1136000>;
|
|
|
|
qcom,cpr-voltage-floor =
|
|
/* Speed bin 0 */
|
|
<568000 568000 568000 568000 568000
|
|
568000 568000 568000 568000 568000
|
|
568000 568000 632000 632000 632000
|
|
632000 632000 632000 632000 632000
|
|
712000 712000 712000 772000 772000
|
|
772000 772000 772000 772000 772000
|
|
772000 772000>,
|
|
/* Speed bin 1 */
|
|
<568000 568000 568000 568000 568000
|
|
568000 568000 568000 568000 568000
|
|
568000 568000 632000 632000 632000
|
|
632000 632000 632000 632000 632000
|
|
712000 712000 712000 772000 772000
|
|
772000>,
|
|
/* Speed bin 2 */
|
|
<568000 568000 568000 568000 568000
|
|
568000 568000 568000 568000 568000
|
|
568000 568000 632000 632000 632000
|
|
632000 632000 632000 632000 632000
|
|
712000 712000 712000 772000 772000
|
|
772000 772000 772000 772000 772000>,
|
|
/* Speed bin 3 */
|
|
<568000 568000 568000 568000 568000
|
|
568000 568000 568000 568000 568000
|
|
568000 568000 632000 632000 632000
|
|
632000 632000 632000 632000 632000
|
|
712000 712000 712000 772000 772000
|
|
772000 772000 772000 772000 772000
|
|
772000>;
|
|
|
|
qcom,cpr-floor-to-ceiling-max-range =
|
|
/* Speed bin 0 */
|
|
<32000 32000 32000 32000
|
|
32000 32000 32000 32000
|
|
32000 32000 32000 32000
|
|
32000 32000 32000 32000
|
|
32000 32000 32000 32000
|
|
40000 40000 40000 40000
|
|
40000 40000 40000 40000
|
|
40000 40000 40000 40000>,
|
|
/* Speed bin 1 */
|
|
<32000 32000 32000 32000
|
|
32000 32000 32000 32000
|
|
32000 32000 32000 32000
|
|
32000 32000 32000 32000
|
|
32000 32000 32000 32000
|
|
40000 40000 40000 40000
|
|
40000 40000>,
|
|
/* Speed bin 2 */
|
|
<32000 32000 32000 32000
|
|
32000 32000 32000 32000
|
|
32000 32000 32000 32000
|
|
32000 32000 32000 32000
|
|
32000 32000 32000 32000
|
|
40000 40000 40000 40000
|
|
40000 40000 40000 40000
|
|
40000 40000>,
|
|
/* Speed bin 3 */
|
|
<32000 32000 32000 32000
|
|
32000 32000 32000 32000
|
|
32000 32000 32000 32000
|
|
32000 32000 32000 32000
|
|
32000 32000 32000 32000
|
|
40000 40000 40000 40000
|
|
40000 40000 40000 40000
|
|
40000 40000 40000>;
|
|
|
|
qcom,corner-frequencies =
|
|
/* Speed bin 0 */
|
|
<300000000 345600000 422400000
|
|
499200000 576000000 652800000
|
|
729600000 806400000 902400000
|
|
979200000 1056000000 1132800000
|
|
1190400000 1267200000 1344000000
|
|
1420800000 1497600000 1574400000
|
|
1651200000 1728000000 1804800000
|
|
1881600000 1958400000 2035200000
|
|
2112000000 2208000000 2265600000
|
|
2342400000 2419200000 2457600000
|
|
2476800000 2496000000>,
|
|
/* Speed bin 1 */
|
|
<300000000 345600000 422400000
|
|
499200000 576000000 652800000
|
|
729600000 806400000 902400000
|
|
979200000 1056000000 1132800000
|
|
1190400000 1267200000 1344000000
|
|
1420800000 1497600000 1574400000
|
|
1651200000 1728000000 1804800000
|
|
1881600000 1958400000 2035200000
|
|
2112000000 2208000000>,
|
|
/* Speed bin 2 */
|
|
<300000000 345600000 422400000
|
|
499200000 576000000 652800000
|
|
729600000 806400000 902400000
|
|
979200000 1056000000 1132800000
|
|
1190400000 1267200000 1344000000
|
|
1420800000 1497600000 1574400000
|
|
1651200000 1728000000 1804800000
|
|
1881600000 1958400000 2035200000
|
|
2112000000 2208000000 2265600000
|
|
2323200000 2342400000 2361600000>,
|
|
/* Speed bin 3 */
|
|
<300000000 345600000 422400000
|
|
499200000 576000000 652800000
|
|
729600000 806400000 902400000
|
|
979200000 1056000000 1132800000
|
|
1190400000 1267200000 1344000000
|
|
1420800000 1497600000 1574400000
|
|
1651200000 1728000000 1804800000
|
|
1881600000 1958400000 2035200000
|
|
2112000000 2208000000 2265600000
|
|
2323200000 2342400000 2361600000
|
|
2457600000>;
|
|
|
|
qcom,cpr-ro-scaling-factor =
|
|
<2857 3057 2828 2952 2699 2798 2446
|
|
2631 2629 2578 2244 3344 3289 3137
|
|
3164 2655>,
|
|
<2857 3057 2828 2952 2699 2798 2446
|
|
2631 2629 2578 2244 3344 3289 3137
|
|
3164 2655>,
|
|
<2603 2755 2676 2777 2573 2685 2465
|
|
2610 2312 2423 2243 3104 3022 3036
|
|
2740 2303>,
|
|
<1901 2016 2096 2228 2034 2161 2077
|
|
2188 1565 1870 1925 2235 2205 2413
|
|
1762 1478>;
|
|
|
|
qcom,cpr-open-loop-voltage-fuse-adjustment =
|
|
/* Speed bin 0 */
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
/* Speed bin 1 */
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
/* Speed bin 2 */
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
/* Speed bin 3 */
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>,
|
|
< 8000 0 12000 52000>;
|
|
|
|
qcom,cpr-closed-loop-voltage-fuse-adjustment =
|
|
/* Speed bin 0 */
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
/* Speed bin 1 */
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
/* Speed bin 2 */
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
/* Speed bin 3 */
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>,
|
|
< 0 0 12000 50000>;
|
|
|
|
qcom,cpr-open-loop-voltage-adjustment =
|
|
/* Speed bin 0 */
|
|
< 0 0 0 0 0
|
|
0 0 0 0 0
|
|
0 (-8000) (-12000) (-12000) (-12000)
|
|
(-12000) (-12000) (-12000) (-16000) (-16000)
|
|
(-20000) (-16000) (-16000) (-16000) (-12000)
|
|
(-28000) (-28000) (-28000) (-28000) (-28000)
|
|
(-28000) (-28000)>,
|
|
/* Speed bin 1 */
|
|
< 0 0 0 0 0
|
|
0 0 0 0 0
|
|
0 (-8000) (-12000) (-12000) (-12000)
|
|
(-12000) (-12000) (-12000) (-16000) (-16000)
|
|
(-20000) (-16000) (-16000) (-16000) (-16000)
|
|
(-28000)>,
|
|
/* Speed bin 2 */
|
|
< 0 0 0 0 0
|
|
0 0 0 0 0
|
|
0 (-8000) (-12000) (-12000) (-12000)
|
|
(-12000) (-12000) (-12000) (-16000) (-16000)
|
|
(-20000) (-16000) (-16000) (-16000) (-12000)
|
|
(-28000) (-28000) (-28000) (-28000) (-28000)>,
|
|
/* Speed bin 3 */
|
|
< 0 0 0 0 0
|
|
0 0 0 0 0
|
|
0 (-8000) (-12000) (-12000) (-12000)
|
|
(-12000) (-12000) (-12000) (-16000) (-16000)
|
|
(-20000) (-16000) (-16000) (-16000) (-12000)
|
|
(-28000) (-28000) (-28000) (-28000) (-28000)
|
|
(-28000)>;
|
|
|
|
qcom,cpr-closed-loop-voltage-adjustment =
|
|
/* Speed bin 0 */
|
|
< 0 0 0 0 0
|
|
0 0 0 0 0
|
|
0 (-10000) (-10000) (-11000) (-12000)
|
|
(-12000) (-13000) (-14000) (-14000) (-15000)
|
|
(-16000) (-16000) (-17000) (-15000) (-13000)
|
|
(-26000) (-26000) (-27000) (-27000) (-28000)
|
|
(-28000) (-28000)>,
|
|
/* Speed bin 1 */
|
|
< 0 0 0 0 0
|
|
0 0 0 0 0
|
|
0 (-10000) (-10000) (-11000) (-12000)
|
|
(-12000) (-13000) (-14000) (-14000) (-15000)
|
|
(-16000) (-16000) (-17000) (-16000) (-15000)
|
|
(-28000)>,
|
|
/* Speed bin 2 */
|
|
< 0 0 0 0 0
|
|
0 0 0 0 0
|
|
0 (-10000) (-10000) (-11000) (-12000)
|
|
(-12000) (-13000) (-14000) (-14000) (-15000)
|
|
(-16000) (-16000) (-17000) (-15000) (-14000)
|
|
(-27000) (-27000) (-28000) (-28000) (-28000)>,
|
|
/* Speed bin 3 */
|
|
< 0 0 0 0 0
|
|
0 0 0 0 0
|
|
0 (-10000) (-10000) (-11000) (-12000)
|
|
(-12000) (-13000) (-14000) (-14000) (-15000)
|
|
(-16000) (-16000) (-17000) (-15000) (-14000)
|
|
(-26000) (-27000) (-27000) (-28000) (-28000)
|
|
(-28000)>;
|
|
|
|
qcom,allow-voltage-interpolation;
|
|
qcom,allow-quotient-interpolation;
|
|
qcom,cpr-scaled-open-loop-voltage-as-ceiling;
|
|
|
|
qcom,cpr-aging-ref-corner = <32 26 30 31>;
|
|
qcom,cpr-aging-ro-scaling-factor = <1700>;
|
|
qcom,allow-aging-voltage-adjustment = <0>;
|
|
};
|
|
|
|
&pm8005_s1 {
|
|
regulator-min-microvolt = <516000>;
|
|
regulator-max-microvolt = <1088000>;
|
|
};
|
|
|
|
&gfx_cpr {
|
|
compatible = "qcom,cpr4-msm8998-v2-mmss-regulator";
|
|
qcom,cpr-aging-ref-voltage = <1088000>;
|
|
};
|
|
|
|
&gfx_vreg {
|
|
regulator-min-microvolt = <1>;
|
|
regulator-max-microvolt = <8>;
|
|
|
|
qcom,cpr-fuse-corners = <4>;
|
|
qcom,cpr-fuse-combos = <8>;
|
|
qcom,cpr-corners = <8>;
|
|
|
|
qcom,cpr-corner-fmax-map = <1 3 5 8>;
|
|
|
|
qcom,cpr-voltage-ceiling =
|
|
<716000 716000 772000 880000 908000 948000 1016000 1088000>,
|
|
<724000 724000 772000 832000 916000 968000 1024000 1088000>,
|
|
<724000 724000 772000 832000 916000 968000 1024000 1088000>,
|
|
<724000 724000 772000 832000 916000 968000 1024000 1088000>,
|
|
<724000 724000 772000 832000 916000 968000 1024000 1088000>,
|
|
<724000 724000 772000 832000 916000 968000 1024000 1088000>,
|
|
<724000 724000 772000 832000 916000 968000 1024000 1088000>,
|
|
<724000 724000 772000 832000 916000 968000 1024000 1088000>;
|
|
|
|
qcom,cpr-voltage-floor =
|
|
<516000 516000 532000 584000 632000 672000 712000 756000>;
|
|
|
|
qcom,mem-acc-voltage = <1 1 1 2 2 2 2 2>;
|
|
|
|
qcom,corner-frequencies =
|
|
<180000000 257000000 342000000 414000000
|
|
515000000 596000000 670000000 710000000>;
|
|
|
|
qcom,cpr-target-quotients =
|
|
< 0 0 0 0 331 357 0 0
|
|
0 0 0 0 0 0 115 0>,
|
|
< 0 0 0 0 467 500 0 0
|
|
0 0 0 0 0 0 199 0>,
|
|
< 0 0 0 0 628 665 0 0
|
|
0 0 0 0 0 0 290 0>,
|
|
< 0 0 0 0 762 805 0 0
|
|
0 0 0 0 0 0 397 0>,
|
|
< 0 0 0 0 964 1013 0 0
|
|
0 0 1143 0 1138 1055 0 0>,
|
|
< 0 0 0 0 0 0 0 0
|
|
0 0 1306 0 1289 1168 0 0>,
|
|
< 0 0 0 0 0 0 0 0
|
|
0 0 1468 0 1429 1256 0 0>,
|
|
< 0 0 0 0 0 0 0 0
|
|
0 0 1627 0 1578 1353 0 0>;
|
|
|
|
qcom,cpr-ro-scaling-factor =
|
|
< 0 0 0 0 2377 2571 0 0
|
|
0 0 2168 0 2209 1849 1997 0>,
|
|
< 0 0 0 0 2377 2571 0 0
|
|
0 0 2168 0 2209 1849 1997 0>,
|
|
< 0 0 0 0 2377 2571 0 0
|
|
0 0 2168 0 2209 1849 1997 0>,
|
|
< 0 0 0 0 2377 2571 0 0
|
|
0 0 2168 0 2209 1849 1997 0>,
|
|
< 0 0 0 0 2377 2571 0 0
|
|
0 0 2168 0 2209 1849 1997 0>,
|
|
< 0 0 0 0 2377 2571 0 0
|
|
0 0 2168 0 2209 1849 1997 0>,
|
|
< 0 0 0 0 2377 2571 0 0
|
|
0 0 2168 0 2209 1849 1997 0>,
|
|
< 0 0 0 0 2377 2571 0 0
|
|
0 0 2168 0 2209 1849 1997 0>;
|
|
|
|
qcom,cpr-open-loop-voltage-fuse-adjustment =
|
|
< 60000 0 0 0>,
|
|
< 60000 0 0 0>,
|
|
< 60000 0 0 0>,
|
|
< 60000 0 0 0>,
|
|
< 60000 0 0 0>,
|
|
< 60000 0 0 0>,
|
|
< 60000 0 0 0>,
|
|
< 60000 0 0 0>;
|
|
|
|
qcom,cpr-closed-loop-voltage-adjustment =
|
|
< 90000 38000 28000 8000
|
|
0 29000 11000 0>,
|
|
< 90000 38000 28000 8000
|
|
0 29000 11000 0>,
|
|
< 90000 38000 28000 8000
|
|
0 29000 11000 0>,
|
|
< 90000 38000 28000 8000
|
|
0 29000 11000 0>,
|
|
< 90000 38000 28000 8000
|
|
0 29000 11000 0>,
|
|
< 90000 38000 28000 8000
|
|
0 29000 11000 0>,
|
|
< 90000 38000 28000 8000
|
|
0 29000 11000 0>,
|
|
< 90000 38000 28000 8000
|
|
0 29000 11000 0>;
|
|
|
|
qcom,cpr-floor-to-ceiling-max-range =
|
|
<40000 40000 40000 40000 40000 40000 50000 50000>;
|
|
|
|
qcom,cpr-fused-closed-loop-voltage-adjustment-map =
|
|
<0 0 0 0 1 2 3 4>;
|
|
|
|
qcom,allow-voltage-interpolation;
|
|
qcom,cpr-scaled-open-loop-voltage-as-ceiling;
|
|
|
|
qcom,cpr-aging-max-voltage-adjustment = <15000>;
|
|
qcom,cpr-aging-ref-corner = <8>;
|
|
qcom,cpr-aging-ro-scaling-factor = <1620>;
|
|
qcom,allow-aging-voltage-adjustment = <0>;
|
|
};
|
|
|
|
&qusb_phy0 {
|
|
reg = <0x0c012000 0x2a8>,
|
|
<0x01fcb24c 0x4>,
|
|
<0x00784238 0x4>;
|
|
reg-names = "qusb_phy_base",
|
|
"tcsr_clamp_dig_n_1p8";
|
|
// "efuse_addr";
|
|
// qcom,efuse-bit-pos = <16>;
|
|
// qcom,efuse-num-bits = <4>;
|
|
qcom,qusb-phy-init-seq =
|
|
/* <value reg_offset> */
|
|
<0x13 0x04 /* analog_controls_two */
|
|
0x7c 0x18c /* pll_clock_inverter */
|
|
0x80 0x2c /* pll_cmode */
|
|
0x0a 0x184 /* pll_lock_delay */
|
|
0xa5 0x23c /* tune1 */
|
|
0x09 0x240 /* tune2 */
|
|
0x19 0xb4>; /* digital_timers_two */
|
|
};
|
|
|
|
&msm_vidc {
|
|
qcom,load-freq-tbl =
|
|
/* Encoders */
|
|
<1105920 533000000 0x55555555>, /* 4kx2304@30 */ /*TURBO*/
|
|
<1036800 444000000 0x55555555>, /* 720p@240, 1080p@120,1440p@60,
|
|
* UHD@30 */ /*NOMINAL*/
|
|
< 829440 355200000 0x55555555>, /* UHD/4096x2160@30 SVSL1 */
|
|
< 489600 269330000 0x55555555>, /* 1080p@60, 720p@120 SVS */
|
|
< 345600 200000000 0x55555555>, /* 2560x1440@24, 1080p@30 */
|
|
/* SVS2 */
|
|
|
|
/* Decoders */
|
|
<2211840 533000000 0xffffffff>, /* 4kx2304@60, 1080p@240 */
|
|
/* TURBO */
|
|
<1728000 444000000 0xffffffff>, /* 2560x1440@120 */
|
|
/* NOMINAL */
|
|
<1675472 355200000 0xffffffff>, /* 4kx2304@44 */ /*SVSL1*/
|
|
<1105920 269330000 0xffffffff>, /* UHD/4k2304@30, 1080p@120 */
|
|
/* SVS */
|
|
< 829440 200000000 0xffffffff>; /* 720p@120, 1080p@60 */
|
|
/* SVS2 */
|
|
|
|
qcom,imem-ab-tbl =
|
|
<200000000 1560000>,/* imem @ svs2 freq 75 Mhz */
|
|
<269330000 3570000>,/* imem @ svs freq 171 Mhz */
|
|
<355200000 3570000>,/* imem @ svs freq 171 Mhz */
|
|
<444000000 6750000>,/* imem @ nom freq 323 Mhz */
|
|
<533000000 8490000>;/* imem @ turbo freq 406 Mhz */
|
|
|
|
qcom,dcvs-tbl = /* minLoad LoadLow LoadHigh CodecCheck */
|
|
/* Decode */
|
|
/* Load > Nominal, Nominal <-> Turbo Eg.3840x2160@60 */
|
|
<1728000 1728000 2211840 0x3f00000c>,
|
|
/* Encoder */
|
|
/* Load > Nominal, Nominal <-> Turbo Eg. 4kx2304@30 */
|
|
<1036800 1036800 1105920 0x04000004>,
|
|
/* Load > SVSL1, SVSL1<-> Nominal Eg. 3840x2160@30 */
|
|
< 829440 829440 1036800 0x04000004>,
|
|
/* Load > SVS , SVS <-> SVSL1 Eg. 4kx2304@24 */
|
|
< 489600 489600 829440 0x04000004>;
|
|
|
|
qcom,dcvs-limit = /* Min Frame size, Min MBs/sec */
|
|
<32400 30>, /* Encoder 3840x2160@30 */
|
|
<32400 60>; /* Decoder 3840x2160@60 */
|
|
|
|
};
|
|
|
|
&soc {
|
|
/* Gold L2 SAW */
|
|
qcom,spm@178120000 {
|
|
qcom,saw2-avs-limit = <0x4700470>;
|
|
};
|
|
|
|
/* Silver L2 SAW */
|
|
qcom,spm@179120000 {
|
|
qcom,saw2-avs-limit = <0x4200420>;
|
|
};
|
|
};
|
|
|
|
/* GPU overrides */
|
|
&msm_gpu {
|
|
/* Updated chip ID */
|
|
qcom,chipid = <0x05040001>;
|
|
qcom,initial-pwrlevel = <6>;
|
|
|
|
qcom,gpu-pwrlevels {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
compatible = "qcom,gpu-pwrlevels";
|
|
|
|
qcom,gpu-pwrlevel@0 {
|
|
reg = <0>;
|
|
qcom,gpu-freq = <710000000>;
|
|
qcom,bus-freq = <12>;
|
|
qcom,bus-min = <12>;
|
|
qcom,bus-max = <12>;
|
|
};
|
|
|
|
qcom,gpu-pwrlevel@1 {
|
|
reg = <1>;
|
|
qcom,gpu-freq = <670000000>;
|
|
qcom,bus-freq = <12>;
|
|
qcom,bus-min = <11>;
|
|
qcom,bus-max = <12>;
|
|
};
|
|
|
|
qcom,gpu-pwrlevel@2 {
|
|
reg = <2>;
|
|
qcom,gpu-freq = <596000000>;
|
|
qcom,bus-freq = <11>;
|
|
qcom,bus-min = <9>;
|
|
qcom,bus-max = <12>;
|
|
};
|
|
|
|
qcom,gpu-pwrlevel@3 {
|
|
reg = <3>;
|
|
qcom,gpu-freq = <515000000>;
|
|
qcom,bus-freq = <11>;
|
|
qcom,bus-min = <9>;
|
|
qcom,bus-max = <12>;
|
|
};
|
|
|
|
qcom,gpu-pwrlevel@4 {
|
|
reg = <4>;
|
|
qcom,gpu-freq = <414000000>;
|
|
qcom,bus-freq = <9>;
|
|
qcom,bus-min = <8>;
|
|
qcom,bus-max = <11>;
|
|
};
|
|
|
|
qcom,gpu-pwrlevel@5 {
|
|
reg = <5>;
|
|
qcom,gpu-freq = <342000000>;
|
|
qcom,bus-freq = <8>;
|
|
qcom,bus-min = <5>;
|
|
qcom,bus-max = <9>;
|
|
};
|
|
|
|
qcom,gpu-pwrlevel@6 {
|
|
reg = <6>;
|
|
qcom,gpu-freq = <257000000>;
|
|
qcom,bus-freq = <5>;
|
|
qcom,bus-min = <3>;
|
|
qcom,bus-max = <8>;
|
|
};
|
|
|
|
qcom,gpu-pwrlevel@7 {
|
|
reg = <7>;
|
|
qcom,gpu-freq = <27000000>;
|
|
qcom,bus-freq = <0>;
|
|
qcom,bus-min = <0>;
|
|
qcom,bus-max = <0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&spss_utils {
|
|
qcom,spss-test-firmware-name = "spss2t"; /* 8 chars max */
|
|
qcom,spss-prod-firmware-name = "spss2p"; /* 8 chars max */
|
|
qcom,spss-hybr-firmware-name = "spss2h"; /* 8 chars max */
|
|
};
|
|
|
|
&ufs1 {
|
|
clock-names =
|
|
"core_clk",
|
|
"bus_aggr_clk",
|
|
"iface_clk",
|
|
"core_clk_unipro",
|
|
"core_clk_ice",
|
|
"ref_clk",
|
|
"tx_lane0_sync_clk",
|
|
"rx_lane0_sync_clk",
|
|
"rx_lane1_sync_clk";
|
|
clocks =
|
|
<&clock_gcc clk_gcc_ufs_axi_hw_ctl_clk>,
|
|
<&clock_gcc clk_gcc_aggre1_ufs_axi_clk>,
|
|
<&clock_gcc clk_gcc_ufs_ahb_clk>,
|
|
<&clock_gcc clk_gcc_ufs_unipro_core_hw_ctl_clk>,
|
|
<&clock_gcc clk_gcc_ufs_ice_core_hw_ctl_clk>,
|
|
<&clock_gcc clk_ln_bb_clk1>,
|
|
<&clock_gcc clk_gcc_ufs_tx_symbol_0_clk>,
|
|
<&clock_gcc clk_gcc_ufs_rx_symbol_0_clk>,
|
|
<&clock_gcc clk_gcc_ufs_rx_symbol_1_clk>;
|
|
freq-table-hz =
|
|
<50000000 200000000>,
|
|
<0 0>,
|
|
<0 0>,
|
|
<37500000 150000000>,
|
|
<75000000 300000000>,
|
|
<0 0>,
|
|
<0 0>,
|
|
<0 0>,
|
|
<0 0>;
|
|
|
|
lanes-per-direction = <2>;
|
|
};
|
|
|
|
&ssc_sensors {
|
|
qcom,firmware-name = "slpi_v2";
|
|
};
|