df5314d4c2
On some MIPS systems, a subset of devices may have DMA coherent with CPU caches. For example in systems including a MIPS I/O Coherence Unit (IOCU), some devices may be connected to that IOCU whilst others are not. Prior to this patch, we have a plat_device_is_coherent() function but no implementation which does anything besides return a global true or false, optionally chosen at runtime. For devices such as those described above this is insufficient. Fix this by tracking DMA coherence on a per-device basis with a dma_coherent field in struct dev_archdata. Setting this from arch_setup_dma_ops() takes care of devices which set the dma-coherent property via device tree, and any PCI devices beneath a bridge described in DT, automatically. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14349/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> (cherry picked from commit 20d330645cfb8cfecfb82b369e4d3084e429e68a) Signed-off-by: Greg Kroah-Hartman <gregkh@google.com> |
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| .. | ||
| cpu-feature-overrides.h | ||
| dma-coherence.h | ||
| floppy.h | ||
| ide.h | ||
| ioremap.h | ||
| irq.h | ||
| kernel-entry-init.h | ||
| kmalloc.h | ||
| mangle-port.h | ||
| mc146818rtc.h | ||
| spaces.h | ||
| topology.h | ||
| war.h | ||